[dv,chip] Add a working rom_ctrl skip-middle at chip-level for Earlgrey

[rswarbrick]

Now that the PRs needed by the PR have been merged, it just contains the following commit:

[rom_ctrl,dv] Teach chip test to understand +skip_middle_of_rom

This works by running a copy of rom_ctrl_skip_middle_with_digest_vseq
to force the address and also the digest responses in rom_ctrl,
causing it to skip over reading the ROM at the start of the test.

The only other tricky thing that needs doing is to disable some of the
checks in the bound-in rom_ctrl_scoreboard. The problem is that we
force the signals when they arrive at the FSM. This is much easier,
because it's rather messy to get a hierarchical up-reference to a port
of rom_ctrl itself. To do so would mean that rom_ctrl_bound_if would
need all the parameters of rom_ctrl itself and then would have to
refer to it with all of them.

If we just force a signal on a port of the FSM, that works perfectly
well... except that rom_ctrl_scoreboard can't see that we forced it! I
think the right thing to do in this situation is just to disable the
checks that are based on knowing what the KMAC response contained.

This now allows a trivial change to turn on the behaviour by passing +skip_middle_of_rom=1 in tests that should use the machinery.

[vogelpi]

Thanks @rswarbrick , this looks very nice!

[rswarbrick]

Changes in force-push (prompted by review from the Claude tool):

• I've tightened up the scoreboard checks. We have to disable checks
  of the digest_* registers, but there's no need to also disable
  checks of the exp_digest_* registers.

• I removed a duplicate dependency from rom_ctrl_env.core.