MCPWM Peripheral functions - #415
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Added some Enums for capture status for rising and falling edge, added an Enum for capture mode to specify between none, falling edge, rising edge, and both edges. Those were put into the common_patches\mcpwm.yaml file. The 3 supported chips for MCPWM had their interrupts get some features to get based of the channel number, timer number, and fault number. This will allow developing the MCPWM driver further.
Moved around how they include the common mcpwn.yaml. mcpwm_collect.yaml shouldn't have been touched as its not shared between all 3 chips. All 3 chips build
… patches to a few more chips
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Please rearrange this PR into two commits - one that touches the yaml files, and one that is just the |
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Pull request overview
This PR extends the MCPWM SVD patching and generated PAC APIs to better support indexed access (timers/operators/capture channels) and more uniform interrupt field arrays, as preparation for a fuller MCPWM HAL implementation.
Changes:
- Adds/extends MCPWM SVD patches across multiple chips (ESP32, ESP32-S3, ESP32-H2, ESP32-C6, ESP32-C5, ESP32-P4), including new shared
common_patches/mcpwm.yaml. - Regenerates PAC register modules to provide indexed field accessors/iterators (e.g.
timer_syncisel(n),operator_timersel(n)) while keeping per-instance convenience methods. - Refactors interrupt clear/raw/status/enable register fields into array-based definitions for several targets.
Reviewed changes
Copilot reviewed 57 out of 63 changed files in this pull request and generated 2 comments.
Show a summary per file
| File | Description |
|---|---|
| esp32s3/svd/patches/esp32s3.yaml | Includes shared MCPWM patch alongside existing interrupt stripping. |
| esp32s3/svd/patches/_mcpwm.yml | Adds INT_* array definitions for MCPWM0. |
| esp32s3/src/mcpwm0/timer_synci_cfg.rs | Adds indexed/iter accessors for timer sync selection and external sync invert fields. |
| esp32s3/src/mcpwm0/operator_timersel.rs | Adds indexed/iter accessors for operator timer selection. |
| esp32s3/src/mcpwm0/int_clr.rs | Refactors INT_CLR into array-based writer helpers and per-bit convenience methods. |
| esp32s3/src/mcpwm0/cap_status.rs | Adds enum-backed capture edge reading + indexed/iter accessors. |
| esp32s3/src/mcpwm0/cap_ch_cfg.rs | Adds enum-backed capture mode field. |
| esp32p4/svd/patches/esp32p4.yaml | Includes the new chip-local MCPWM patch file. |
| esp32p4/svd/patches/_mcpwm.yml | Adds MCPWM patching for CAP_* enums, TIMER/OPERATOR arrays, and INT_* arrays. |
| esp32p4/src/mcpwm0/timer_synci_cfg.rs | Adds indexed/iter accessors for timer sync selection and external sync invert fields. |
| esp32p4/src/mcpwm0/operator_timersel.rs | Adds indexed/iter accessors for operator timer selection. |
| esp32p4/src/mcpwm0/cap_status.rs | Adds enum-backed capture edge reading + indexed/iter accessors. |
| esp32p4/src/mcpwm0/cap_ch_cfg.rs | Renames/adjusts capture mode field API to enum-backed CAP_MODE. |
| esp32h2/svd/patches/esp32h2.yaml | Adds chip-local MCPWM patch include and includes shared MCPWM patch under MCPWM0. |
| esp32h2/svd/patches/_mcpwm.yml | Adds INT_* array definitions for MCPWM0. |
| esp32h2/src/mcpwm0/timer_synci_cfg.rs | Adds indexed/iter accessors for timer sync selection and external sync invert fields. |
| esp32h2/src/mcpwm0/operator_timersel.rs | Adds indexed/iter accessors for operator timer selection. |
| esp32h2/src/mcpwm0/cap_status.rs | Adds enum-backed capture edge reading + indexed/iter accessors. |
| esp32h2/src/mcpwm0/cap_ch_cfg.rs | Adds enum-backed capture mode field. |
| esp32c6/svd/patches/esp32c6.yaml | Includes chip-local MCPWM patch include and includes shared MCPWM patch under MCPWM0. |
| esp32c6/svd/patches/_mcpwm.yml | Adds MCPWM patching including INT_* arrays (and additional helper-generation directives). |
| esp32c6/src/mcpwm0/timer_synci_cfg.rs | Adds indexed/iter accessors for timer sync selection and external sync invert fields. |
| esp32c6/src/mcpwm0/operator_timersel.rs | Adds indexed/iter accessors for operator timer selection. |
| esp32c6/src/mcpwm0/cap_status.rs | Adds enum-backed capture edge reading + indexed/iter accessors. |
| esp32c6/src/mcpwm0/cap_ch_cfg.rs | Adds enum-backed capture mode field. |
| esp32c5/svd/patches/esp32c5.yaml | Includes the new chip-local MCPWM patch file and updates MCPWM0 include formatting. |
| esp32c5/svd/patches/_mcpwm.yml | Adds MCPWM patching for CAP_* enums, TIMER/OPERATOR arrays, and INT_* arrays. |
| esp32c5/src/mcpwm0/timer_synci_cfg.rs | Adds indexed/iter accessors for timer sync selection and external sync invert fields. |
| esp32c5/src/mcpwm0/operator_timersel.rs | Adds indexed/iter accessors for operator timer selection. |
| esp32c5/src/mcpwm0/cap_status.rs | Adds enum-backed capture edge reading + indexed/iter accessors. |
| esp32c5/src/mcpwm0/cap_ch_cfg.rs | Adds enum-backed capture mode field. |
| esp32/svd/patches/esp32.yaml | Includes chip-local MCPWM patch include and includes shared MCPWM patch under MCPWM0. |
| esp32/svd/patches/_mcpwm.yml | Adds MCPWM INT_* arrays and a CAP_TIMER_PHASE field rename. |
| esp32/src/mcpwm0/timer_synci_cfg.rs | Adds indexed/iter accessors for timer sync selection and external sync invert fields. |
| esp32/src/mcpwm0/operator_timersel.rs | Adds indexed/iter accessors for operator timer selection. |
| esp32/src/mcpwm0/int_clr.rs | Refactors INT_CLR into array-based writer helpers and per-bit convenience methods. |
| esp32/src/mcpwm0/cap_timer_phase.rs | Renames CAP_TIMER_PHASE field accessor to cap_phase. |
| esp32/src/mcpwm0/cap_status.rs | Adds enum-backed capture edge reading + indexed/iter accessors. |
| esp32/src/mcpwm0/cap_ch_cfg.rs | Adds enum-backed capture mode field. |
| common_patches/mcpwm.yaml | Introduces shared MCPWM patch definitions (CAP_* enums + timer/operator arrays). |
| common_patches/mcpwm_collect.yaml | Fixes include indentation for interrupt stripping. |
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| # Define a unified Event enum covering all 10 event types | ||
| _enums: | ||
| EVENT: | ||
| description: | | ||
| MCPWM event types representing all interrupt sources | ||
| Maps to register field bit positions across INT_RAW, INT_ST, INT_ENA, INT_CLR | ||
| variants: | ||
| TIMER_STOP: | ||
| value: 0 | ||
| description: Timer stop event | ||
| TIMER_TEZ: | ||
| value: 1 | ||
| description: Timer equal zero event | ||
| TIMER_TEP: | ||
| value: 2 | ||
| description: Timer equal period event | ||
| CAPTURE: | ||
| value: 3 | ||
| description: Capture event | ||
| CMPR_TEA: | ||
| value: 4 | ||
| description: Compare A event | ||
| CMPR_TEB: | ||
| value: 5 | ||
| description: Compare B event | ||
| FAULT: | ||
| value: 6 | ||
| description: Fault event | ||
| FAULT_CLR: | ||
| value: 7 | ||
| description: Fault clear event | ||
| TZ_CBC: | ||
| value: 8 | ||
| description: Fault cycle-by-cycle event | ||
| TZ_OST: | ||
| value: 9 | ||
| description: Fault one-shot event | ||
|
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| # INT_RAW: Raw interrupt status (read-only) | ||
| INT_RAW: | ||
| _field_lookup: | ||
| # Tells the SVD/PAC generator to create a helper method | ||
| enum: EVENT | ||
|
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| # This mapping tells the generator how to convert Event variants to register fields | ||
| mapping: | ||
| TIMER_STOP: TIMER?_STOP | ||
| TIMER_TEZ: TIMER?_TEZ | ||
| TIMER_TEP: TIMER?_TEP | ||
| CAPTURE: CAP? | ||
| CMPR_TEA: CMPR?_TEA | ||
| CMPR_TEB: CMPR?_TEB | ||
| FAULT: FAULT? | ||
| FAULT_CLR: FAULT?_CLR | ||
| TZ_CBC: TZ?_CBC | ||
| TZ_OST: TZ?_OST | ||
|
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| # Helper method generation directive | ||
| generate_helpers: | ||
| # Generate: pub fn event_bit(&self, event: Event, unit: u8) -> bool | ||
| - name: event_bit | ||
| signature: "fn event_bit(&self, event: Event, unit: u8) -> bool" | ||
| implementation: | | ||
| match event { | ||
| Event::TimerStop => self.timer_stop(unit).bit(), | ||
| Event::TimerTez => self.timer_tez(unit).bit(), | ||
| Event::TimerTep => self.timer_tep(unit).bit(), | ||
| Event::Capture => self.cap(unit).bit(), | ||
| Event::CmprTea => self.cmpr_tea(unit).bit(), | ||
| Event::CmprTeb => self.cmpr_teb(unit).bit(), | ||
| Event::Fault => self.fault(unit).bit(), | ||
| Event::FaultClr => self.fault_clr(unit).bit(), | ||
| Event::TzCbc => self.tz_cbc(unit).bit(), | ||
| Event::TzOst => self.tz_ost(unit).bit(), | ||
| } |
bugadani
reviewed
Aug 10, 2026
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| # INT_RAW: Raw interrupt status (read-only) | ||
| INT_RAW: | ||
| _field_lookup: |
Contributor
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I don't think this is valid a svdtools patch directive 🤔 In any case, because these patches act on the SVDs, they can't generate Rust code, so at least part of this should be removed.
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Adding register functions for capture, timer, sync, and operator based on indices. In anticipation of a pull request for
https://github.com/Alex3404/esp-hal-mcpwm-cap for a mostly complete implementation of the MCPWM module.