spi-master

Must-have verilog systemverilog modules

Scriptable cross-platform data terminal which supports: serial port, UDP, TCP, SPI, I2C and CAN.

SPI master and SPI slave for FPGA written in VHDL

A simple Verilog SPI master / slave implementation featuring all 4 modes.

Implementation of a Serial Peripheral Interface(SPI) using Verilog and testing various modes of the SPI Device

Customizable multi chip select supporting Serial Peripheral Interface master.

spi driver for stm32 f4 family of microcontrollers . The library includes two flavor of apis which is blocking and non blocking ( interrupt based ) . library includes Apis to send and receive data .

Verification of spi protocol

1-wire port expander

SPI master+slave IP core in SystemVerilog. All 4 modes (CPOL/CPHA), parametrizable bit-width, FIFO, optional AXI4-Lite wrapper.

Cross-platform software SPI driver for master device

SPI-Master Controller example + peripheral devices simulation

SPI (bus) expander to control multiple devices from the one SPI master.

Systemverilog code to output 16bit ADC data to an external SPI/QSPI memory

An 8-bit SPI Mater designed in Verilog HDL, verified through simulation in EDA Playground, with schematic and PCB design completed using KiCad.

Simple program written in Assembly for initialing device as master using SPI protocol

Phase-2 Cycle-1: RTL Protocol Foundations

Configurable Multi-Mode SPI Master RTL design in SystemVerilog with support for all 4 SPI modes, MSB/LSB-first transmission, automated functional verification, Questa simulation, and Quartus synthesis analysis.

AVR ATmega2560 example codes for interfacing peripherals including ADC, push button, LCD 16x2, motor drivers (A4988, TB6612, Cytron), SPI master/slave, UART, rotary encoder, timers, and more. Ideal for embedded systems projects and learning.