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24 changes: 24 additions & 0 deletions esp32c5/src/ledc_gamma_ram.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,24 @@
#[repr(C)]
#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
#[doc = "Register block"]
pub struct RegisterBlock {
channel: [CHANNEL; 6],
}
impl RegisterBlock {
#[doc = "0x00..0x180 - LEDC gamma fade configuration RAM for channel %s (16 entries, 64 bytes)."]
#[inline(always)]
pub const fn channel(&self, n: usize) -> &CHANNEL {
&self.channel[n]
}
#[doc = "Iterator for array of:"]
#[doc = "0x00..0x180 - LEDC gamma fade configuration RAM for channel %s (16 entries, 64 bytes)."]
#[inline(always)]
pub fn channel_iter(&self) -> impl Iterator<Item = &CHANNEL> {
self.channel.iter()
}
}
#[doc = "LEDC gamma fade configuration RAM for channel %s (16 entries, 64 bytes)."]
pub use self::channel::CHANNEL;
#[doc = r"Cluster"]
#[doc = "LEDC gamma fade configuration RAM for channel %s (16 entries, 64 bytes)."]
pub mod channel;
23 changes: 23 additions & 0 deletions esp32c5/src/ledc_gamma_ram/channel.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,23 @@
#[repr(C)]
#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
#[doc = "LEDC gamma fade configuration RAM for channel %s (16 entries, 64 bytes)."]
pub struct CHANNEL {
entry: [ENTRY; 16],
}
impl CHANNEL {
#[doc = "0x00..0x40 - LEDC gamma fade configuration RAM entry %s."]
#[inline(always)]
pub const fn entry(&self, n: usize) -> &ENTRY {
&self.entry[n]
}
#[doc = "Iterator for array of:"]
#[doc = "0x00..0x40 - LEDC gamma fade configuration RAM entry %s."]
#[inline(always)]
pub fn entry_iter(&self) -> impl Iterator<Item = &ENTRY> {
self.entry.iter()
}
}
#[doc = "ENTRY (rw) register accessor: LEDC gamma fade configuration RAM entry %s.\n\nYou can [`read`](crate::Reg::read) this register and get [`entry::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`entry::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@entry`] module"]
pub type ENTRY = crate::Reg<entry::ENTRY_SPEC>;
#[doc = "LEDC gamma fade configuration RAM entry %s."]
pub mod entry;
88 changes: 88 additions & 0 deletions esp32c5/src/ledc_gamma_ram/channel/entry.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,88 @@
#[doc = "Register `ENTRY%s` reader"]
pub type R = crate::R<ENTRY_SPEC>;
#[doc = "Register `ENTRY%s` writer"]
pub type W = crate::W<ENTRY_SPEC>;
#[doc = "Field `DUTY_INC` reader - Configures whether to increase duty in this fade range."]
pub type DUTY_INC_R = crate::BitReader;
#[doc = "Field `DUTY_INC` writer - Configures whether to increase duty in this fade range."]
pub type DUTY_INC_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `DUTY_CYCLE` reader - Configures PWM overflows between duty updates in this fade range."]
pub type DUTY_CYCLE_R = crate::FieldReader<u16>;
#[doc = "Field `DUTY_CYCLE` writer - Configures PWM overflows between duty updates in this fade range."]
pub type DUTY_CYCLE_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
#[doc = "Field `SCALE` reader - Configures duty delta per update in this fade range."]
pub type SCALE_R = crate::FieldReader<u16>;
#[doc = "Field `SCALE` writer - Configures duty delta per update in this fade range."]
pub type SCALE_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
#[doc = "Field `DUTY_NUM` reader - Configures number of duty updates in this fade range."]
pub type DUTY_NUM_R = crate::FieldReader<u16>;
#[doc = "Field `DUTY_NUM` writer - Configures number of duty updates in this fade range."]
pub type DUTY_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
impl R {
#[doc = "Bit 0 - Configures whether to increase duty in this fade range."]
#[inline(always)]
pub fn duty_inc(&self) -> DUTY_INC_R {
DUTY_INC_R::new((self.bits & 1) != 0)
}
#[doc = "Bits 1:10 - Configures PWM overflows between duty updates in this fade range."]
#[inline(always)]
pub fn duty_cycle(&self) -> DUTY_CYCLE_R {
DUTY_CYCLE_R::new(((self.bits >> 1) & 0x03ff) as u16)
}
#[doc = "Bits 11:20 - Configures duty delta per update in this fade range."]
#[inline(always)]
pub fn scale(&self) -> SCALE_R {
SCALE_R::new(((self.bits >> 11) & 0x03ff) as u16)
}
#[doc = "Bits 21:30 - Configures number of duty updates in this fade range."]
#[inline(always)]
pub fn duty_num(&self) -> DUTY_NUM_R {
DUTY_NUM_R::new(((self.bits >> 21) & 0x03ff) as u16)
}
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for R {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("ENTRY")
.field("duty_inc", &self.duty_inc())
.field("duty_cycle", &self.duty_cycle())
.field("scale", &self.scale())
.field("duty_num", &self.duty_num())
.finish()
}
}
impl W {
#[doc = "Bit 0 - Configures whether to increase duty in this fade range."]
#[inline(always)]
pub fn duty_inc(&mut self) -> DUTY_INC_W<'_, ENTRY_SPEC> {
DUTY_INC_W::new(self, 0)
}
#[doc = "Bits 1:10 - Configures PWM overflows between duty updates in this fade range."]
#[inline(always)]
pub fn duty_cycle(&mut self) -> DUTY_CYCLE_W<'_, ENTRY_SPEC> {
DUTY_CYCLE_W::new(self, 1)
}
#[doc = "Bits 11:20 - Configures duty delta per update in this fade range."]
#[inline(always)]
pub fn scale(&mut self) -> SCALE_W<'_, ENTRY_SPEC> {
SCALE_W::new(self, 11)
}
#[doc = "Bits 21:30 - Configures number of duty updates in this fade range."]
#[inline(always)]
pub fn duty_num(&mut self) -> DUTY_NUM_W<'_, ENTRY_SPEC> {
DUTY_NUM_W::new(self, 21)
}
}
#[doc = "LEDC gamma fade configuration RAM entry %s.\n\nYou can [`read`](crate::Reg::read) this register and get [`entry::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`entry::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct ENTRY_SPEC;
impl crate::RegisterSpec for ENTRY_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [`entry::R`](R) reader structure"]
impl crate::Readable for ENTRY_SPEC {}
#[doc = "`write(|w| ..)` method takes [`entry::W`](W) writer structure"]
impl crate::Writable for ENTRY_SPEC {
type Safety = crate::Unsafe;
}
#[doc = "`reset()` method sets ENTRY%s to value 0"]
impl crate::Resettable for ENTRY_SPEC {}
12 changes: 12 additions & 0 deletions esp32c5/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -514,6 +514,15 @@ impl core::fmt::Debug for LEDC {
}
#[doc = "LED Control PWM (Pulse Width Modulation)"]
pub mod ledc;
#[doc = "LEDC gamma fade configuration RAM."]
pub type LEDC_GAMMA_RAM = crate::Periph<ledc_gamma_ram::RegisterBlock, 0x6000_7400>;
impl core::fmt::Debug for LEDC_GAMMA_RAM {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("LEDC_GAMMA_RAM").finish()
}
}
#[doc = "LEDC gamma fade configuration RAM."]
pub mod ledc_gamma_ram;
#[doc = "LPPERI Peripheral"]
pub type LPPERI = crate::Periph<lpperi::RegisterBlock, 0x600b_2800>;
impl core::fmt::Debug for LPPERI {
Expand Down Expand Up @@ -953,6 +962,8 @@ pub struct Peripherals {
pub KEYMNG: KEYMNG,
#[doc = "LEDC"]
pub LEDC: LEDC,
#[doc = "LEDC_GAMMA_RAM"]
pub LEDC_GAMMA_RAM: LEDC_GAMMA_RAM,
#[doc = "LPPERI"]
pub LPPERI: LPPERI,
#[doc = "LP_ANA"]
Expand Down Expand Up @@ -1087,6 +1098,7 @@ impl Peripherals {
IO_MUX: IO_MUX::steal(),
KEYMNG: KEYMNG::steal(),
LEDC: LEDC::steal(),
LEDC_GAMMA_RAM: LEDC_GAMMA_RAM::steal(),
LPPERI: LPPERI::steal(),
LP_ANA: LP_ANA::steal(),
LP_AON: LP_AON::steal(),
Expand Down
48 changes: 48 additions & 0 deletions esp32c5/svd/patches/_ledc_gamma_ram.yml
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_add:
LEDC_GAMMA_RAM:
description: LEDC gamma fade configuration RAM.
groupName: LEDC_GAMMA_RAM
baseAddress: 0x60007400
addressBlock:
- offset: 0x0
size: 0x180
usage: "Registers"

LEDC_GAMMA_RAM:

@bugadani bugadani Mar 4, 2026

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This shouldn't be its own peripheral, but a register block under LEDC, I think? Similar to how ECC and the other crypto drivers define their own little memories.

_add:
_clusters:
CHANNEL%s:
description: LEDC gamma fade configuration RAM for channel %s (16 entries, 64 bytes).
addressOffset: 0x0
dim: 6
dimIncrement: 0x40
registers:
ENTRY%s:
description: LEDC gamma fade configuration RAM entry %s.
addressOffset: 0x0
dim: 16
dimIncrement: 0x4
access: read-write
size: 32
resetValue: 0x0
fields:
DUTY_INC:
description: Configures whether to increase duty in this fade range.
bitOffset: 0
bitWidth: 1
access: read-write
DUTY_CYCLE:
description: Configures PWM overflows between duty updates in this fade range.
bitOffset: 1
bitWidth: 10
access: read-write
SCALE:
description: Configures duty delta per update in this fade range.
bitOffset: 11
bitWidth: 10
access: read-write
DUTY_NUM:
description: Configures number of duty updates in this fade range.
bitOffset: 21
bitWidth: 10
access: read-write
1 change: 1 addition & 0 deletions esp32c5/svd/patches/esp32c5.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,7 @@ _include:
- ../../../common_patches/ieee802154.yaml
- _i2c.yml
- _interrupt.yml
- _ledc_gamma_ram.yml
- _lp_apm.yml
- _lp_io.yml
- _modem_lpcon.yml
Expand Down