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Fix for out of range rotate amount during lower #131909
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| Original file line number | Diff line number | Diff line change |
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@@ -535,6 +535,12 @@ GenTree* Lowering::LowerNode(GenTree* node) | |
| return next; | ||
| } | ||
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| #if defined(TARGET_XARCH) || defined(TARGET_ARM64) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64) | ||
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Member
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Also TARGET_WASM
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. sure, fyi this same ifdef appears something like 5 times in this file in (unchanged) places, I assume at some point we'd want to allow WASM through this path at least?
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. If you'd rather defer fixing the Wasm aspects and open a follow-up issue for Wasm that's fine by me.
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. I'll push the WASM changes, if stuff fails though I'll probably back it out and instead do it as a follow up Would existing test coverage in PR hit that shift path, hypothetically?
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Possibly, but there isn't much that gets tested yet. |
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| // These targets mask the rotate amount implicitly, so strip a redundant | ||
| // AND(amount, mask) before lowering the rotate. | ||
| TryRemoveShiftRotateMask(node->AsOp()); | ||
| #endif | ||
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| LowerRotate(node); | ||
| break; | ||
| } | ||
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@@ -8812,30 +8818,30 @@ bool Lowering::TryFoldBinop(GenTreeOp* node) | |
| } | ||
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| //------------------------------------------------------------------------ | ||
| // LowerShift: Lower shift nodes | ||
| // TryRemoveShiftRotateMask: Remove a redundant mask on a shift or rotate count. | ||
| // | ||
| // Arguments: | ||
| // shift - the shift node (GT_LSH, GT_RSH or GT_RSZ) | ||
| // op - the shift or rotate node (GT_LSH, GT_RSH, GT_RSZ, GT_ROL or GT_ROR) | ||
| // | ||
| // Notes: | ||
| // Remove unnecessary shift count masking, xarch shift instructions | ||
| // mask the shift count to 5 bits (or 6 bits for 64 bit operations). | ||
| // Some targets' shift/rotate instructions mask their count to bitsize. | ||
| // Remove the explicit AND(count, mask) that keeps at least those low bits. | ||
| // | ||
| void Lowering::LowerShift(GenTreeOp* shift) | ||
| void Lowering::TryRemoveShiftRotateMask(GenTreeOp* op) | ||
| { | ||
| assert(shift->OperIs(GT_LSH, GT_RSH, GT_RSZ)); | ||
| assert(op->OperIs(GT_LSH, GT_RSH, GT_RSZ, GT_ROL, GT_ROR)); | ||
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| size_t mask = 0x1f; | ||
| #ifdef TARGET_64BIT | ||
| if (varTypeIsLong(shift->TypeGet())) | ||
| if (varTypeIsLong(op->TypeGet())) | ||
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dhartglassMSFT marked this conversation as resolved.
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| { | ||
| mask = 0x3f; | ||
| } | ||
| #else | ||
| assert(!varTypeIsLong(shift->TypeGet())); | ||
| assert(!varTypeIsLong(op->TypeGet())); | ||
| #endif | ||
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| for (GenTree* andOp = shift->gtGetOp2(); andOp->OperIs(GT_AND); andOp = andOp->gtGetOp1()) | ||
| for (GenTree* andOp = op->gtGetOp2(); andOp->OperIs(GT_AND); andOp = andOp->gtGetOp1()) | ||
| { | ||
| GenTree* maskOp = andOp->gtGetOp2(); | ||
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@@ -8849,12 +8855,29 @@ void Lowering::LowerShift(GenTreeOp* shift) | |
| break; | ||
| } | ||
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| shift->gtOp2 = andOp->gtGetOp1(); | ||
| op->gtOp2 = andOp->gtGetOp1(); | ||
| BlockRange().Remove(andOp); | ||
| BlockRange().Remove(maskOp); | ||
| // The parent was replaced, clear contain and regOpt flag. | ||
| shift->gtOp2->ClearContained(); | ||
| op->gtOp2->ClearContained(); | ||
| } | ||
| } | ||
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| //------------------------------------------------------------------------ | ||
| // LowerShift: Lower shift nodes | ||
| // | ||
| // Arguments: | ||
| // shift - the shift node (GT_LSH, GT_RSH or GT_RSZ) | ||
| // | ||
| // Notes: | ||
| // Remove unnecessary shift count masking, xarch shift instructions | ||
| // mask the shift count to 5 bits (or 6 bits for 64 bit operations). | ||
| // | ||
| void Lowering::LowerShift(GenTreeOp* shift) | ||
| { | ||
| assert(shift->OperIs(GT_LSH, GT_RSH, GT_RSZ)); | ||
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| TryRemoveShiftRotateMask(shift); | ||
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| ContainCheckShiftRotate(shift); | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,62 @@ | ||
| // Licensed to the .NET Foundation under one or more agreements. | ||
| // The .NET Foundation licenses this file to you under the MIT license. | ||
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| // Testcase exposed an ROR node with an out of range operand on arm64, | ||
| // asserted in lowering | ||
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| using System; | ||
| using System.Numerics; | ||
| using System.Runtime.CompilerServices; | ||
| using Xunit; | ||
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| public class Runtime_129298 | ||
| { | ||
| private static volatile uint Input_p0 = 1; | ||
| private static volatile uint Input_p1 = 1; | ||
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| [MethodImpl(MethodImplOptions.NoInlining | MethodImplOptions.AggressiveOptimization)] | ||
| public static uint Fn(uint p0, uint p1) | ||
| { | ||
| unchecked | ||
| { | ||
| uint v1, v3, v5, v6, v8, v11, v15, v16, v22, v26, v28; | ||
| uint v33 = 0, v40, v44; | ||
| uint v21 = 0; | ||
| int v2, v4, v7, v9, v10, v29; | ||
| v1 = p0 % p1; | ||
| v2 = BitOperations.LeadingZeroCount(v1); v3 = (uint)v2; | ||
| v4 = BitOperations.LeadingZeroCount(v1); v5 = (uint)v4; | ||
| v6 = BitOperations.RotateLeft(p0, 0); | ||
| v7 = BitOperations.IsPow2(0x80000000u) ? 1 : 0; v8 = (uint)v7; | ||
| v9 = (p1 < p0) ? 1 : 0; | ||
| if (v9 == 0) | ||
| { | ||
| v22 = Math.Min(0xFFFFFFFEu, 0xFFFFFFFFu); | ||
| return v22; | ||
| } | ||
| v10 = (v1 > p1) ? 1 : 0; v11 = (uint)v10; | ||
| v15 = v6 + 0x12345u; v16 = v11 + p1; | ||
| v26 = BitOperations.RotateLeft(0xFFFFFFFFu, (int)v21); | ||
| v28 = p1 ^ 3u; | ||
| v29 = (v15 <= v16) ? 1 : 0; | ||
| if (v29 != 0) | ||
| { | ||
| v33 = (uint)BitOperations.TrailingZeroCount(v16); | ||
| return v33 ^ v5; | ||
| } | ||
| // unreached at runtime; v33 = 0 (default-init) reaches Lowering. | ||
| v40 = BitOperations.RotateLeft(p0, (int)(0x7FFFFFFEu % v33)); | ||
| v44 = v40 ^ v5; | ||
| return v44; | ||
| } | ||
| } | ||
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| [Fact] | ||
| public static void TestEntryPoint() | ||
| { | ||
| // The JIT must compile Fn (including the dead rotate block) under | ||
| // FullOpts without asserting. For the given inputs Fn takes the first | ||
| // early return, so the result is Math.Min(0xFFFFFFFE, 0xFFFFFFFF). | ||
| Assert.Equal(0xFFFFFFFEu, Fn(Input_p0, Input_p1)); | ||
| } | ||
| } |
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