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Share DeepNVMe pinned-tensor manager and route swap buffers through I/O handles - #8212

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Share DeepNVMe pinned-tensor manager and route swap buffers through I/O handles#8212
sfc-gh-truwase merged 3 commits into
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Summary

DeepNVMe skips the bounce-buffer copy only when a buffer is torch-pinned or managed by the handle's pinned-tensor manager. That manager was per-handle and recognized only exact base pointers, so buffers allocated by one handle — or narrows/views of a shared pool submitted through a different read/write handle — were not recognized and always bounced.

This PR makes the pinned-tensor manager a process-wide shared instance with range-based recognition, and switches the swap subsystem to obtain pinned memory and query pinned status through its I/O handles.

Changes

  • C++
    • deepspeed_pin_tensor_t is now a process-wide shared() singleton guarded by a std::mutex; is_managed is range-based so slices/views of a locked buffer are recognized.
    • deepspeed_io_handle_t and cpu_op_desc_t hold the manager via std::shared_ptr.
    • Added handle.is_pinned(buffer) with bindings in py_ds_aio.cpp and py_ds_gds.cpp (GDS inherits the base).
  • Python (swap subsystem only)
    • SwapBufferManager/SwapBufferPool and the optimizer swappers take an aio_handle; buffers are allocated via new_cpu_locked_tensor and pinned status is queried via handle.is_pinned.
    • Optimizer-swapper subclasses create their handle before super().__init__ so it can be threaded through.
  • Test: tests/unit/v1/nvme/test_pinned_manager.py covers narrow/view recognition and cross-handle sharing.

Test plan

  • pre-commit (yapf/flake8/clang-format/check-license) on all touched files.
  • tests/unit/v1/nvme/test_pinned_manager.py — 3/3 pass (narrow recognition, cross-handle sharing, unmanaged buffer).
  • tests/unit/v1/nvme/ + tests/unit/utils/test_pin_memory.py + tests/unit/v1/accelerator/test_accelerator.py — 146 pass.
  • Swap smoke test (tests/unit/runtime/zero/test_nvme_checkpointing.py): reproduces the pre-existing baseline exactly (no regression; the failing optimizer-on-NVMe configs fail identically on master).

Made with Cursor

…/O handles

DeepNVMe skips the bounce-buffer copy only when a buffer is torch-pinned or
managed by the handle's pinned-tensor manager. That manager was per-handle and
recognized only exact base pointers, so buffers allocated by one handle (or
narrows/views of a shared pool submitted through a different read/write handle)
were not recognized and always bounced.

- C++: make deepspeed_pin_tensor_t a process-wide shared() singleton guarded by
  a mutex, and make is_managed range-based so slices/views of a locked buffer
  are recognized. Switch deepspeed_io_handle_t and cpu_op_desc_t to hold the
  manager via shared_ptr, and add handle.is_pinned() with aio/gds bindings.
- Python: the swap subsystem now obtains pinned host memory via
  new_cpu_locked_tensor and queries pinned status via handle.is_pinned instead
  of the accelerator. SwapBufferManager/SwapBufferPool and the optimizer
  swappers take an aio_handle; optimizer-swapper subclasses create the handle
  before super().__init__ so it can be threaded through.
- Add a focused nvme test for narrow recognition and cross-handle sharing.

Signed-off-by: Olatunji Ruwase <tunji.ruwase@snowflake.com>
Co-authored-by: Cursor <cursoragent@cursor.com>

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Comment thread deepspeed/runtime/swap_tensor/partitioned_param_swapper.py
Comment thread deepspeed/runtime/swap_tensor/utils.py
- handle.is_pinned() now returns is_pinned() || is_managed(), mirroring
  cpu_op_desc_t's direct-I/O eligibility check. Reporting only is_managed()
  misclassified torch-pinned destinations (e.g. ZeRO-3 fp16 flat CPU memory) as
  unpinned, needlessly forcing the swap-buffer path and risking pool exhaustion.
- SwapBufferManager now releases its page-locked buffers via
  free_cpu_locked_tensor() on destruction. With the process-wide pinned-tensor
  manager, dropping a manager no longer reclaims its buffers, so repeatedly
  building NVMe swappers would otherwise accumulate locked memory.

Signed-off-by: Olatunji Ruwase <tunji.ruwase@snowflake.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
@sfc-gh-truwase
sfc-gh-truwase requested review from delock and removed request for loadams and tohtana August 4, 2026 21:32
Comment thread csrc/aio/py_lib/deepspeed_pin_tensor.cpp Outdated
@delock

delock commented Aug 5, 2026

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After this PR, no caller passes align_bytes=0 in pin_memory (the three swap-subsystem call sites are migrated). This leaves the parameter as dead API surface. I can help clean it up in #8207

is_managed() only checked that a buffer's start pointer fell inside a locked
region, so a buffer beginning inside a region but ending past it (an unpinned
tail) was misreported as managed. Also require the buffer's end (ptr + nbytes)
to fall within the same region. Legitimate swap narrows/views are unaffected
since they lie fully within their allocation.

Signed-off-by: Olatunji Ruwase <tunji.ruwase@snowflake.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
@sfc-gh-truwase

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fter this PR, no caller passes align_bytes=0 in pin_memory (the three swap-subsystem call sites are migrated). This leaves the parameter as dead API surface. I can help clean it up in #8207

@delock yes please help with the cleanup.

FYI, I am working to promote DeepSpeed pin memory to a first class utility in here. I think this is useful because of the tangible differences from torch version. Additionally, we shall make two changes to DeepSpeed code base

  1. pin_memory default True for all offloading options in with your fix(zero3): async grad offload + pinned offload buffers by default #8207
  2. Use native pin memory by default instead of torch

I will like to discuss more on these changes. Thanks!

@sfc-gh-truwase
sfc-gh-truwase added this pull request to the merge queue Aug 5, 2026
Merged via the queue into master with commit e1d6b4f Aug 5, 2026
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@sfc-gh-truwase
sfc-gh-truwase deleted the tjruwase/deepnvme-shared-pin-manager branch August 5, 2026 15:08
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