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LibreSDRB210 - USRP B210 Setup Guide

Important update: This project has been updated for the Artix-7 XC7A100T version, including IP upgrades and regenerated build targets. It was successfully compiled on Ubuntu MATE 24.04.4 LTS using Vivado ML Standard Edition 2024.1. In addition, the source DACx311_auto_spi.v was modified, compiled, and successfully validated for the DAC7311IDCKR.

This repository contains essential files and instructions for setting up the USRP B210 with custom firmware on Linux. Follow the steps below to install the required drivers and replace the default B210 image with the custom one from this repository.

Project Internal Visual Pipeline

The following diagrams describe the internal architecture pipeline of the project (signal/data/control/timing paths), not the build workflow.

1) Architecture Overview

Project Architecture Overview

2) Data Pipeline (RX and TX)

Project Data RX-TX Pipeline

3) Control and Timing Pipeline

Project Control and Timing Pipeline

Prerequisites

  • Ubuntu Linux or another Debian-based distribution
  • A USRP B210 LibreSDR clone (XC7A100T+AD9361 ONLY)
  • Git installed on your machine

Installation Steps

1. Install USRP Hardware Drivers (UHD)

First, you'll need to install the USRP Hardware Drivers (UHD) for your device.

Open a terminal and run the following commands:

$ sudo add-apt-repository ppa:ettusresearch/uhd
$ sudo apt update
$ sudo apt install libuhd-dev uhd-host

Install Python3 (If not already installed)

$ sudo apt install python3

Download UHD Images

Next, you need to download the UHD images used by the USRP devices. Run the following command to install the images:

sudo /usr/lib/uhd/utils/uhd_images_downloader.py

The images will be downloaded to: /opt/local/share/uhd/images

Replace the B210 Image

Replace the default B210 image in /opt/local/share/uhd/images with the custom image provided in this repository.

wget https://github.com/lmesserStep/LibreSDRB210/raw/main/usrp_b210_fpga.bin
cp usrp_b210_fpga.bin /opt/local/share/uhd/images

Verify

$ uhd_usrp_probe
[INFO] [UHD] Mac OS; Clang version 15.0.0 (clang-1500.1.0.2.5); Boost_107100; UHD_3.15.0.0-MacPorts-Release
[INFO] [B200] Detected Device: B210
[INFO] [B200] Loading FPGA image: /opt/local/share/uhd/images/usrp_b210_fpga.bin...
[INFO] [B200] Operating over USB 3.
[INFO] [B200] Detecting internal GPSDO.... 
[INFO] [GPS] No GPSDO found
[INFO] [B200] Initialize CODEC control...
[INFO] [B200] Initialize Radio control...
[INFO] [B200] Performing register loopback test... 
[INFO] [B200] Register loopback test passed
[INFO] [B200] Performing register loopback test... 
[INFO] [B200] Register loopback test passed
[INFO] [B200] Setting master clock rate selection to 'automatic'.
[INFO] [B200] Asking for clock rate 16.000000 MHz... 
[INFO] [B200] Actually got clock rate 16.000000 MHz.

Any of the changes needed will require Vivado, this is a working bin. Please note, this has been tested on versions 4.0-7.0 UHD from Ettus Labs.

About

This is a repository for the LibreSDR using the Artix 7 XC7A100T and AD9361

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