feat(attention): add strict bitwise ROCm path - #319
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Signed-off-by: inaniloquentee <3051000145@qq.com>
Signed-off-by: inaniloquentee <3051000145@qq.com>
Signed-off-by: inaniloquentee <3051000145@qq.com>
Signed-off-by: inaniloquentee <3051000145@qq.com>
Signed-off-by: inaniloquentee <3051000145@qq.com>
Signed-off-by: JLiu4Coding <lzwgre@126.com>
Signed-off-by: JLiu4Coding <lzwgre@126.com>
Signed-off-by: inaniloquentee <3051000145@qq.com>
Freeze the WS1 numerical SSOT for issue #267: four-judgment tolerance rows, dtype/TF32/FP8 policy, comparison roles, chain logprob aggregates, shared resolver, and op_checks wiring so forward and gradient accuracy no longer share one threshold path. Add schema tests, usage docs, and a migration checklist for remaining private-atol call sites (C3/C4/C8). Closes #267
Freeze the full Qwen3-8B Dense logical workload SSOT for WS1 closeout C2: manifest pins (config fingerprint, weight content hash, 2x2 Batch/Chunk matrix, varlen fixtures, packing, dual backend profiles, representative case_ids), logical identity restore after pad/pack/chunk, singleton_aggregate vs BN multiset plan, registry-resolved candidate binding, and a single reference command. Document registry-vs-runtime actual boundary and Triton missing_required reds without silent fallback. Closes #268
Add the shared forward accuracy/invariance API, C2 config matrix, backend provenance fail-closed checks, selected-logprob smoke, GPU gate CLI, CPU tests, and closeout evidence for WS1 C3.
Shared training-style gradient comparison across the C2 Batch/Chunk matrix: accuracy (vs FP32 VJP) and invariance (cross-config) are separate C1 judgments, thresholds come only from the contract resolver, and the report schema is what C8/C10 must reuse. Adapters execute on config.physical_layout — packed runs one batched call, chunked splits per chunk, padded uses the real pad grid, permuted keeps the permuted sample order — and return physical tensors that the harness restores through C2's map. Seeding autograd.grad with an upstream that is a pure function of logical identity keeps the comparison free of physical summation order, so a failure means the operator's own backward moved. TestPhysicalLayout locks the matrix down: a layout-sensitive synthetic op must be judged red, a logical-identity-only op green, B=N must be one batched call, chunking must split it, and padding must reach the operator. Without those guards a layout-blind adapter makes every bitwise verdict a tautology. A required differentiable node with no backward now raises MissingBackwardError and is reported as a categorised red rather than an autograd stack trace. scripts/sweep_gradient_invariance.py runs every adapter x required profile and classifies each cell. Current tally on sm89: green=8, red_verdict=6, red_no_backward=1, blocked_hardware=4, blocked_c2=3, skipped=4. Two open findings are recorded in the closeout evidence as Blocker candidates, not fixed here (C4 audits declared candidates, it does not rewrite kernels): RMSNorm/QK-Norm dweight and det_gemm dW re-associate when the token stream is split across launches, and the CUDA plain-logp candidates are not wired through torch.autograd so dlogits cannot be produced at all. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01GNxzCbwwa2BbZYrEXokt1a
Port remaining WS1 ops onto the shared C3/C4 runners, add the C5 inventory and C8 four-judgment sweep, and record sm86 reds in-repo.
Land remaining gtest registrations (qk_norm, pack), Triton attention VJP, fail-closed SM90 candidates, C8 execute sweep provenance, and C5/C2 scope docs. linear_logp stays optional_fused; pack stays N/A with CPU C3/C4 evidence. SM90 logp tests now match the no-fallback contract.
C3 reports backend_family (cuda/triton). C8 actual_backend_id should match the declared candidate (cuda, cuda-sm90, or triton).
Regenerate the four-judgment matrix with invariance provenance, environment, and the source commit SHA. Counts remain green=176, N/A=16, red=0.
Signed-off-by: lamentropetion <3051000145@qq.com>
feat(distributed): add deterministic TP8 all-gather
[ws1]: WS1 Full Qwen3-8B Dense Train-Inference Closeout
…live # Conflicts: # ci/run_gpu_ci.sh # rl_engine/testing/__init__.py
inaniloquentee
requested review from
EthanZero2Hero,
Flink-ddd,
KJLdefeated and
bitborne
as code owners
August 19, 2026 09:22
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Summary
This PR adds the ROCm strict Attention path for #235. It reuses qualified high-performance vendor operators where their reduction behavior is controllable, and keeps RL-Kernel implementations where vendor paths did not pass the expanded bitwise probes.
aiter.ops.mha.mha_fwd/mha_bwdnum_splits=1provenancerlkernel.rocm.deterministic_roperccl_ag_rsrlkernel.attention.strict_ring_state.v1The self-owned deterministic Attention core remains a reference/debug oracle, not the ROCm production arithmetic path. Strict equality is defined within the same ROCm hardware and runtime stack; this PR makes no cross-vendor bitwise claim.
ROCm Validation
Arithmetic validation is bound to
9ff0e6dc5a82d348d755f155c5ccc7790840343b. Current head1bc4177only narrows the test-injected AITER callable types for mypy; the platform tests remain unchanged.gfx942)2.12.0+rocm7.14.0a20260608/7.14.608502.28.9aiter.ops.mha, source fingerprint recorded in every report2.14.0.dev0+e6ede467tests/test_attention_correctness.py+tests/test_flashinfer_pr7_attention.py156 passed, 41 skipped0; no fallback0; batch/page-layout invariant0; batch/page-layout invariant000Every strict report records
fallback=false,native_attention_arithmetic=true,actual_backend=aiter.rocm.ck_dense_mha, deterministic backward, disabled Split-KV, andcommunication_backend=rccl_ag_rs.Reproduce
Related to #235 and #294. Q/K RMSNorm wrapper integration is in #230.