Add a check that GLC has the coarsest coupling frequency

[billsacks]

Description of changes

This was implicitly assumed but not checked.

Specific notes

Contributors other than yourself, if any:

CMEPS Issues Fixed (include github issue #):

• Resolves Logic for creating run sequence assumes that GLC couples less frequently than other components, but doesn't check this condition #688

Are changes expected to change answers? (specify if bfb, different at roundoff, more substantial) bfb

Any User Interface Changes (namelist or namelist defaults changes)? no

Testing performed

Just tested namelist generation, since this branch just adds error checking at namelist-generation time, and doesn't change any other behavior.

(1) Created case SMS_Ld2.ne30pg3_t232.B1850C_LTso.green_gnu - confirmed that no error is generated at preview_namelists time

(2) In that test, changed GLC_NCPL=8 (matching ROF_NCPL) - confirmed that no error is generated at preview_namelists time (though there is a duplicate @10800 loop; this is okay as noted below)

(3) In that test, changed GLC_NCPL=24 - confirmed that an error IS generated

(4) Created an F compset test SMS.ne30pg3_t232.HIST_CAM60_CLM50%SP_CICE%PRES_DOCN%DOM_MOSART_DGLC%NOEVOLVE_SWAV_SESP.green_gnu - confirmed that no error is generated at preview_namelists time

(5) Created an I compset test SMS.ne30pg3_t232.HIST_DATM%GSWP3v1_CLM50%SP_SICE_SOCN_MOSART_DGLC%NOEVOLVE_SWAV_SESP.green_gnu - confirmed that no error is generated at preview_namelists time

(6) Confirmed that it is okay to have two loops with the same time frequency (as suggested by @mvertens ): Ran test SMS_Ld2.ne30pg3_t232.B1850C_LTso.derecho_intel.allactive-defaultio where I changed GLC_NCPL=8. Compared (a) a version with the auto-generated nuopc.runseq against (b) a version where I made this change:

--- CaseDocs/nuopc.runseq	2026-08-14 14:05:01.000000000 -0600
+++ nuopc.runseq	2026-08-14 14:07:28.000000000 -0600
@@ -1,6 +1,5 @@
 runSeq::
 @10800
-@10800
 @3600
 @1800
   MED med_phases_aofluxes_run
@@ -50,7 +49,6 @@
   ROF
   ROF -> MED :remapMethod=redist
   MED med_phases_post_rof
-@
   MED med_phases_prep_glc
   MED -> GLC :remapMethod=redist
   GLC

Both tests pass and are bit-for-bit with each other.

[billsacks]

@mvertens - FYI (but I know you won't be able to review this before we merge it)

[ekluzek]

LGTM. I really like having this checked so that the model doesn't crash when it's done accidentally.

Thanks for bringing this in!