From ada3d668d6360e72ecbe4329c9c632ab79b58519 Mon Sep 17 00:00:00 2001 From: Kirill Mikhailov Date: Thu, 23 Jul 2026 17:04:14 +0200 Subject: [PATCH 1/4] Generate SVDs from internal CSVs in esp-pacs, avoiding internal tools --- Cargo.lock | 88 ++- xtask/Cargo.toml | 4 + xtask/regdesc/chips/esp32/interrupts.yml | 208 +++++++ xtask/regdesc/chips/esp32/peripherals.yml | 139 +++++ xtask/regdesc/chips/esp32/regdesc.yml | 2 + xtask/regdesc/chips/esp32c2/interrupts.yml | 131 +++++ xtask/regdesc/chips/esp32c2/peripherals.yml | 82 +++ xtask/regdesc/chips/esp32c2/regdesc.yml | 43 ++ xtask/regdesc/chips/esp32c3/interrupts.yml | 187 +++++++ xtask/regdesc/chips/esp32c3/peripherals.yml | 112 ++++ xtask/regdesc/chips/esp32c3/regdesc.yml | 51 ++ xtask/regdesc/chips/esp32c5/interrupts.yml | 256 +++++++++ xtask/regdesc/chips/esp32c5/peripherals.yml | 229 ++++++++ xtask/regdesc/chips/esp32c5/regdesc.yml | 61 +++ xtask/regdesc/chips/esp32c6-lp/interrupts.yml | 25 + .../regdesc/chips/esp32c6-lp/peripherals.yml | 40 ++ xtask/regdesc/chips/esp32c6-lp/regdesc.yml | 15 + xtask/regdesc/chips/esp32c6/interrupts.yml | 232 ++++++++ xtask/regdesc/chips/esp32c6/peripherals.yml | 199 +++++++ xtask/regdesc/chips/esp32c6/regdesc.yml | 96 ++++ xtask/regdesc/chips/esp32h2/interrupts.yml | 196 +++++++ xtask/regdesc/chips/esp32h2/peripherals.yml | 190 +++++++ xtask/regdesc/chips/esp32h2/regdesc.yml | 77 +++ xtask/regdesc/chips/esp32p4/interrupts.yml | 385 +++++++++++++ xtask/regdesc/chips/esp32p4/peripherals.yml | 275 ++++++++++ xtask/regdesc/chips/esp32p4/regdesc.yml | 97 ++++ .../regdesc/chips/esp32s2-ulp/interrupts.yml | 28 + .../regdesc/chips/esp32s2-ulp/peripherals.yml | 13 + xtask/regdesc/chips/esp32s2-ulp/regdesc.yml | 3 + xtask/regdesc/chips/esp32s2/interrupts.yml | 286 ++++++++++ xtask/regdesc/chips/esp32s2/peripherals.yml | 130 +++++ xtask/regdesc/chips/esp32s2/regdesc.yml | 39 ++ .../regdesc/chips/esp32s3-ulp/interrupts.yml | 37 ++ .../regdesc/chips/esp32s3-ulp/peripherals.yml | 13 + xtask/regdesc/chips/esp32s3-ulp/regdesc.yml | 9 + xtask/regdesc/chips/esp32s3/interrupts.yml | 286 ++++++++++ xtask/regdesc/chips/esp32s3/peripherals.yml | 163 ++++++ xtask/regdesc/chips/esp32s3/regdesc.yml | 78 +++ xtask/regdesc/chips/esp32s31/interrupts.yml | 510 ++++++++++++++++++ xtask/regdesc/chips/esp32s31/peripherals.yml | 334 ++++++++++++ xtask/regdesc/chips/esp32s31/regdesc.yml | 106 ++++ xtask/regdesc/peripheral_descriptions.yml | 175 ++++++ xtask/src/main.rs | 39 +- xtask/src/regdesc/config.rs | 183 +++++++ xtask/src/regdesc/csv.rs | 508 +++++++++++++++++ xtask/src/regdesc/merge.rs | 322 +++++++++++ xtask/src/regdesc/mod.rs | 73 +++ xtask/src/regdesc/model.rs | 406 ++++++++++++++ xtask/src/regdesc/svd.rs | 425 +++++++++++++++ xtask/src/regdesc/util.rs | 160 ++++++ 50 files changed, 7724 insertions(+), 22 deletions(-) create mode 100644 xtask/regdesc/chips/esp32/interrupts.yml create mode 100644 xtask/regdesc/chips/esp32/peripherals.yml create mode 100644 xtask/regdesc/chips/esp32/regdesc.yml create mode 100644 xtask/regdesc/chips/esp32c2/interrupts.yml create mode 100644 xtask/regdesc/chips/esp32c2/peripherals.yml create mode 100644 xtask/regdesc/chips/esp32c2/regdesc.yml create mode 100644 xtask/regdesc/chips/esp32c3/interrupts.yml create mode 100644 xtask/regdesc/chips/esp32c3/peripherals.yml create mode 100644 xtask/regdesc/chips/esp32c3/regdesc.yml create mode 100644 xtask/regdesc/chips/esp32c5/interrupts.yml create mode 100644 xtask/regdesc/chips/esp32c5/peripherals.yml create mode 100644 xtask/regdesc/chips/esp32c5/regdesc.yml create mode 100644 xtask/regdesc/chips/esp32c6-lp/interrupts.yml create mode 100644 xtask/regdesc/chips/esp32c6-lp/peripherals.yml create mode 100644 xtask/regdesc/chips/esp32c6-lp/regdesc.yml create mode 100644 xtask/regdesc/chips/esp32c6/interrupts.yml create mode 100644 xtask/regdesc/chips/esp32c6/peripherals.yml create mode 100644 xtask/regdesc/chips/esp32c6/regdesc.yml create mode 100644 xtask/regdesc/chips/esp32h2/interrupts.yml create mode 100644 xtask/regdesc/chips/esp32h2/peripherals.yml create mode 100644 xtask/regdesc/chips/esp32h2/regdesc.yml create mode 100644 xtask/regdesc/chips/esp32p4/interrupts.yml create mode 100644 xtask/regdesc/chips/esp32p4/peripherals.yml create mode 100644 xtask/regdesc/chips/esp32p4/regdesc.yml create mode 100644 xtask/regdesc/chips/esp32s2-ulp/interrupts.yml create mode 100644 xtask/regdesc/chips/esp32s2-ulp/peripherals.yml create mode 100644 xtask/regdesc/chips/esp32s2-ulp/regdesc.yml create mode 100644 xtask/regdesc/chips/esp32s2/interrupts.yml create mode 100644 xtask/regdesc/chips/esp32s2/peripherals.yml create mode 100644 xtask/regdesc/chips/esp32s2/regdesc.yml create mode 100644 xtask/regdesc/chips/esp32s3-ulp/interrupts.yml create mode 100644 xtask/regdesc/chips/esp32s3-ulp/peripherals.yml create mode 100644 xtask/regdesc/chips/esp32s3-ulp/regdesc.yml create mode 100644 xtask/regdesc/chips/esp32s3/interrupts.yml create mode 100644 xtask/regdesc/chips/esp32s3/peripherals.yml create mode 100644 xtask/regdesc/chips/esp32s3/regdesc.yml create mode 100644 xtask/regdesc/chips/esp32s31/interrupts.yml create mode 100644 xtask/regdesc/chips/esp32s31/peripherals.yml create mode 100644 xtask/regdesc/chips/esp32s31/regdesc.yml create mode 100644 xtask/regdesc/peripheral_descriptions.yml create mode 100644 xtask/src/regdesc/config.rs create mode 100644 xtask/src/regdesc/csv.rs create mode 100644 xtask/src/regdesc/merge.rs create mode 100644 xtask/src/regdesc/mod.rs create mode 100644 xtask/src/regdesc/model.rs create mode 100644 xtask/src/regdesc/svd.rs create mode 100644 xtask/src/regdesc/util.rs diff --git a/Cargo.lock b/Cargo.lock index 3e7d0045c2..00a3b1ade4 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -141,7 +141,7 @@ dependencies = [ "heck", "proc-macro2", "quote", - "syn", + "syn 2.0.106", ] [[package]] @@ -215,6 +215,27 @@ dependencies = [ "typenum", ] +[[package]] +name = "csv" +version = "1.4.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "52cd9d68cf7efc6ddfaaee42e7288d3a99d613d4b50f76ce9827ae0c6e14f938" +dependencies = [ + "csv-core", + "itoa", + "ryu", + "serde_core", +] + +[[package]] +name = "csv-core" +version = "0.1.13" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "704a3c26996a80471189265814dbc2c257598b96b8a7feae2d31ace646bb9782" +dependencies = [ + "memchr", +] + [[package]] name = "deranged" version = "0.4.0" @@ -242,7 +263,7 @@ checksum = "97369cbbc041bc366949bc74d34658d6cda5621039731c6310521892a3a20ae0" dependencies = [ "proc-macro2", "quote", - "syn", + "syn 2.0.106", ] [[package]] @@ -321,7 +342,7 @@ dependencies = [ "prettyplease", "proc-macro2", "quote", - "syn", + "syn 2.0.106", ] [[package]] @@ -593,7 +614,7 @@ checksum = "03343451ff899767262ec32146f6d559dd759fdadf42ff0e227c7c48f72594b4" dependencies = [ "proc-macro2", "quote", - "syn", + "syn 2.0.106", ] [[package]] @@ -655,7 +676,7 @@ checksum = "de66c928222984aea59fcaed8ba627f388aaac3c1f57dcb05cc25495ef8faefe" dependencies = [ "proc-macro2", "quote", - "syn", + "syn 2.0.106", ] [[package]] @@ -754,7 +775,7 @@ dependencies = [ "pest_meta", "proc-macro2", "quote", - "syn", + "syn 2.0.106", ] [[package]] @@ -797,7 +818,7 @@ dependencies = [ "phf_shared", "proc-macro2", "quote", - "syn", + "syn 2.0.106", ] [[package]] @@ -846,7 +867,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "ff24dfcda44452b9816fff4cd4227e1bb73ff5a2f1bc1105aa92fb8565ce44d2" dependencies = [ "proc-macro2", - "syn", + "syn 2.0.106", ] [[package]] @@ -961,22 +982,32 @@ checksum = "56e6fa9c48d24d85fb3de5ad847117517440f6beceb7798af16b4a87d616b8d0" [[package]] name = "serde" -version = "1.0.219" +version = "1.0.229" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5f0e2c6ed6606019b4e29e69dbaba95b11854410e5347d525002456dbbb786b6" +checksum = "4148590afebada386688f18773da617792bf2ef03ffc1e4cbd2b1d45b023e0ba" +dependencies = [ + "serde_core", + "serde_derive", +] + +[[package]] +name = "serde_core" +version = "1.0.229" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "67dca2c9c51e58a4791a4b1ed58308b39c64224d349a935ab5039aa360942a48" dependencies = [ "serde_derive", ] [[package]] name = "serde_derive" -version = "1.0.219" +version = "1.0.229" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5b0276cf7f2c73365f7157c8123c21cd9a50fbbd844757af28ca1f5925fc2a00" +checksum = "e7a5d71263a5a7d47b41f6b3f06ba276f10cc18b0931f1799f710578e2309348" dependencies = [ "proc-macro2", "quote", - "syn", + "syn 3.0.3", ] [[package]] @@ -1076,7 +1107,7 @@ dependencies = [ "heck", "proc-macro2", "quote", - "syn", + "syn 2.0.106", ] [[package]] @@ -1130,7 +1161,7 @@ dependencies = [ "serde_yaml 0.9.34+deprecated", "svd-parser", "svd-rs", - "syn", + "syn 2.0.106", "thiserror 2.0.15", "url", ] @@ -1177,6 +1208,17 @@ dependencies = [ "unicode-ident", ] +[[package]] +name = "syn" +version = "3.0.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "53e9bae58849f64dfa4f5d5ae372c8341f7305f82a3868709269343628b659a3" +dependencies = [ + "proc-macro2", + "quote", + "unicode-ident", +] + [[package]] name = "synstructure" version = "0.13.2" @@ -1185,7 +1227,7 @@ checksum = "728a70f3dbaf5bab7f0c4b1ac8d7ae5ea60a4b5549c8a5914361c99147a709d2" dependencies = [ "proc-macro2", "quote", - "syn", + "syn 2.0.106", ] [[package]] @@ -1223,7 +1265,7 @@ checksum = "4fee6c4efc90059e10f81e6d42c60a18f76588c3d74cb83a0b242a2b6c7504c1" dependencies = [ "proc-macro2", "quote", - "syn", + "syn 2.0.106", ] [[package]] @@ -1234,7 +1276,7 @@ checksum = "44d29feb33e986b6ea906bd9c3559a856983f92371b3eaa5e83782a351623de0" dependencies = [ "proc-macro2", "quote", - "syn", + "syn 2.0.106", ] [[package]] @@ -1580,11 +1622,15 @@ version = "0.0.0" dependencies = [ "anyhow", "clap", + "csv", "env_logger 0.11.8", "form", "log", "rayon", + "regex", "semver", + "serde", + "serde_yaml 0.9.34+deprecated", "strum", "svd2rust", "svdtools", @@ -1631,7 +1677,7 @@ checksum = "38da3c9736e16c5d3c8c597a9aaa5d1fa565d0532ae05e27c24aa62fb32c0ab6" dependencies = [ "proc-macro2", "quote", - "syn", + "syn 2.0.106", "synstructure", ] @@ -1652,7 +1698,7 @@ checksum = "d71e5d6e06ab090c67b5e44993ec16b72dcbaabc526db883a360057678b48502" dependencies = [ "proc-macro2", "quote", - "syn", + "syn 2.0.106", "synstructure", ] @@ -1686,5 +1732,5 @@ checksum = "5b96237efa0c878c64bd89c436f661be4e46b2f3eff1ebb976f7ef2321d2f58f" dependencies = [ "proc-macro2", "quote", - "syn", + "syn 2.0.106", ] diff --git a/xtask/Cargo.toml b/xtask/Cargo.toml index 78e3f6884a..7abb0ec7d9 100644 --- a/xtask/Cargo.toml +++ b/xtask/Cargo.toml @@ -7,11 +7,15 @@ publish = false [dependencies] anyhow = "1.0.99" clap = { version = "4.5.45", features = ["derive"] } +csv = "1.3.1" env_logger = "0.11.8" form = "0.13.0" log = "0.4.27" rayon = "1.11.0" +regex = "1.11.1" semver = "1.0.26" +serde = { version = "1.0.219", features = ["derive"] } +serde_yaml = "0.9.34" strum = { version = "0.27.2", features = ["derive"] } svd2rust = { git = "https://github.com/MabezDev/svd2rust", branch = "skip-peripherals-struct-0.37.1", features = ["serde", "yaml"], default-features = false } svdtools = "0.5.0" diff --git a/xtask/regdesc/chips/esp32/interrupts.yml b/xtask/regdesc/chips/esp32/interrupts.yml new file mode 100644 index 0000000000..a7011abf5b --- /dev/null +++ b/xtask/regdesc/chips/esp32/interrupts.yml @@ -0,0 +1,208 @@ +peripheral_interrupts: + - name: WIFI_MAC + instance: DPORT + value: 0 + - name: WIFI_NMI + instance: DPORT + value: 1 + - name: WIFI_BB + instance: DPORT + value: 2 + - name: BT_MAC + instance: DPORT + value: 3 + - name: BT_BB + instance: DPORT + value: 4 + - name: BT_BB_NMI + instance: DPORT + value: 5 + - name: RWBT + instance: DPORT + value: 6 + - name: RWBLE + instance: DPORT + value: 7 + - name: RWBT_NMI + instance: DPORT + value: 8 + - name: RWBLE_NMI + instance: DPORT + value: 9 + - name: SLC0 + instance: SLC0 + value: 10 + - name: SLC1 + instance: SLC1 + value: 11 + - name: UHCI0 + instance: UHCI0 + value: 12 + - name: UHCI1 + instance: UHCI1 + value: 13 + - name: TG0_T0_LEVEL + instance: TIMG0 + value: 14 + - name: TG0_T1_LEVEL + instance: TIMG0 + value: 15 + - name: TG0_WDT_LEVEL + instance: TIMG0 + value: 16 + - name: TG0_LACT_LEVEL + instance: TIMG0 + value: 17 + - name: TG1_T0_LEVEL + instance: TIMG1 + value: 18 + - name: TG1_T1_LEVEL + instance: TIMG1 + value: 19 + - name: TG1_WDT_LEVEL + instance: TIMG1 + value: 20 + - name: TG1_LACT_LEVEL + instance: TIMG1 + value: 21 + - name: GPIO + instance: GPIO + value: 22 + - name: GPIO_NMI + instance: GPIO + value: 23 + - name: FROM_CPU_INTR0 + instance: DPORT + value: 24 + - name: FROM_CPU_INTR1 + instance: DPORT + value: 25 + - name: FROM_CPU_INTR2 + instance: DPORT + value: 26 + - name: FROM_CPU_INTR3 + instance: DPORT + value: 27 + - name: SPI0 + instance: SPI0 + value: 28 + - name: SPI1 + instance: SPI1 + value: 29 + - name: SPI2 + instance: SPI2 + value: 30 + - name: SPI3 + instance: SPI3 + value: 31 + - name: I2S0 + instance: I2S0 + value: 32 + - name: I2S1 + instance: I2S1 + value: 33 + - name: UART0 + instance: UART0 + value: 34 + - name: UART1 + instance: UART1 + value: 35 + - name: UART2 + instance: UART2 + value: 36 + - name: SDIO_HOST + instance: DPORT + value: 37 + - name: ETH_MAC + instance: DPORT + value: 38 + - name: MCPWM0 + instance: MCPWM0 + value: 39 + - name: MCPWM1 + instance: MCPWM0 + value: 40 + - name: MCPWM2 + instance: MCPWM0 + value: 41 + - name: MCPWM3 + instance: MCPWM0 + value: 42 + - name: LEDC + instance: LEDC + value: 43 + - name: EFUSE + instance: EFUSE + value: 44 + - name: TWAI0 + instance: TWAI0 + value: 45 + - name: RTC_CORE + instance: RTC_CNTL + value: 46 + - name: RMT + instance: RMT + value: 47 + - name: PCNT + instance: PCNT + value: 48 + - name: I2C_EXT0 + instance: I2C0 + value: 49 + - name: I2C_EXT1 + instance: I2C1 + value: 50 + - name: RSA + instance: RSA + value: 51 + - name: SPI1_DMA + instance: SPI1 + value: 52 + - name: SPI2_DMA + instance: SPI2 + value: 53 + - name: SPI3_DMA + instance: SPI3 + value: 54 + - name: WDT + instance: DPORT + value: 55 + - name: TIMER1 + instance: LEDC + value: 56 + - name: TIMER2 + instance: LEDC + value: 57 + - name: TG0_T0_EDGE + instance: TIMG0 + value: 58 + - name: TG0_T1_EDGE + instance: TIMG0 + value: 59 + - name: TG0_WDT_EDGE + instance: TIMG0 + value: 60 + - name: TG0_LACT_EDGE + instance: TIMG0 + value: 61 + - name: TG1_T0_EDGE + instance: TIMG1 + value: 62 + - name: TG1_T1_EDGE + instance: TIMG1 + value: 63 + - name: TG1_WDT_EDGE + instance: TIMG1 + value: 64 + - name: TG1_LACT_EDGE + instance: TIMG1 + value: 65 + - name: MMU_IA + instance: DPORT + value: 66 + - name: MPU_IA + instance: DPORT + value: 67 + - name: CACHE_IA + instance: DPORT + value: 68 diff --git a/xtask/regdesc/chips/esp32/peripherals.yml b/xtask/regdesc/chips/esp32/peripherals.yml new file mode 100644 index 0000000000..c6c4a3c886 --- /dev/null +++ b/xtask/regdesc/chips/esp32/peripherals.yml @@ -0,0 +1,139 @@ +peripheral_instances: + - name: AES + peripheral: AES + base_addr: 0x3ff01000 + - name: APB_CTRL + peripheral: APB_CTRL + base_addr: 0x3ff66000 + - name: BB + peripheral: BB + base_addr: 0x3ff5D000 + - name: DPORT + peripheral: DPORT + base_addr: 0x3ff00000 + - name: EFUSE + peripheral: EFUSE + base_addr: 0x3ff5a000 + - name: EMAC_DMA + peripheral: EMAC_DMA + base_addr: 0x3ff69000 + - name: EMAC_EXT + peripheral: EMAC_EXT + base_addr: 0x3ff69800 + - name: EMAC_MAC + peripheral: EMAC_MAC + base_addr: 0x3ff6A000 + - name: FLASH_ENCRYPTION + peripheral: FLASH_ENCRYPTION + base_addr: 0x3ff46000 + - name: FRC_TIMER + peripheral: FRC + base_addr: 0x3ff47000 + - name: GPIO + peripheral: GPIO + base_addr: 0x3ff44000 + - name: GPIO_SD + peripheral: GPIO_SIGMADELTA + base_addr: 0x3ff44f00 + - name: HINF + peripheral: HINF + base_addr: 0x3ff4B000 + - name: I2C0 + peripheral: I2C + base_addr: 0x3ff53000 + - name: I2C1 + peripheral: I2C + base_addr: 0x3ff67000 + - name: I2S0 + peripheral: I2S + base_addr: 0x3ff4f000 + - name: I2S1 + peripheral: I2S + base_addr: 0x3FF6D000 + - name: IO_MUX + peripheral: IO_MUX + base_addr: 0x3ff49000 + - name: LEDC + peripheral: LEDC + base_addr: 0x3ff59000 + - name: MCPWM0 + peripheral: MCPWM + base_addr: 0x3ff5E000 + - name: MCPWM1 + peripheral: MCPWM + base_addr: 0x3ff6C000 + - name: NRX + peripheral: NRX + base_addr: 0x3ff5CC00 + - name: PCNT + peripheral: PCNT + base_addr: 0x3ff57000 + - name: RMT + peripheral: RMT + base_addr: 0x3ff56000 + - name: RNG + peripheral: RNG + base_addr: 0x60035000 + - name: RSA + peripheral: RSA + base_addr: 0x3ff02000 + - name: RTC_CNTL + peripheral: RTC_CNTL + base_addr: 0x3ff48000 + - name: RTC_IO + peripheral: RTC_GPIO + base_addr: 0x3ff48400 + - name: RTC_I2C + peripheral: RTC_I2C + base_addr: 0x3ff48C00 + - name: SDHOST + peripheral: SDHOST + base_addr: 0x3ff68000 + - name: SENS + peripheral: SENS + base_addr: 0x3ff48800 + - name: SHA + peripheral: SHA + base_addr: 0x3ff03000 + - name: SLC + peripheral: SLC + base_addr: 0x3ff58000 + - name: SLCHOST + peripheral: SLCHOST + base_addr: 0x3ff55000 + - name: SPI0 + peripheral: SPI + base_addr: 0x3ff43000 + - name: SPI1 + peripheral: SPI + base_addr: 0x3ff42000 + - name: SPI2 + peripheral: SPI + base_addr: 0x3ff64000 + - name: SPI3 + peripheral: SPI + base_addr: 0x3ff65000 + - name: TIMG0 + peripheral: TIMG + base_addr: 0x3ff5F000 + - name: TIMG1 + peripheral: TIMG + base_addr: 0x3ff60000 + - name: TWAI0 + peripheral: TWAI + base_addr: 0x3ff6B000 + - name: UART0 + peripheral: UART + base_addr: 0x3ff40000 + - name: UART1 + peripheral: UART + base_addr: 0x3ff50000 + - name: UART2 + peripheral: UART + base_addr: 0x3ff6e000 + - name: UHCI0 + peripheral: UHCI + base_addr: 0x3ff54000 + - name: UHCI1 + peripheral: UHCI + base_addr: 0x3ff4C000 diff --git a/xtask/regdesc/chips/esp32/regdesc.yml b/xtask/regdesc/chips/esp32/regdesc.yml new file mode 100644 index 0000000000..623da7beb0 --- /dev/null +++ b/xtask/regdesc/chips/esp32/regdesc.yml @@ -0,0 +1,2 @@ +--- +twai_reg.csv: {} diff --git a/xtask/regdesc/chips/esp32c2/interrupts.yml b/xtask/regdesc/chips/esp32c2/interrupts.yml new file mode 100644 index 0000000000..d07dfadc46 --- /dev/null +++ b/xtask/regdesc/chips/esp32c2/interrupts.yml @@ -0,0 +1,131 @@ +peripheral_interrupts: + - name: WIFI_MAC + instance: INTERRUPT_CORE0 + value: 0 + - name: WIFI_MAC_NMI + instance: INTERRUPT_CORE0 + value: 1 + - name: WIFI_PWR + instance: INTERRUPT_CORE0 + value: 2 + - name: WIFI_BB + instance: INTERRUPT_CORE0 + value: 3 + - name: BT_MAC + instance: INTERRUPT_CORE0 + value: 4 + - name: BT_BB + instance: INTERRUPT_CORE0 + value: 5 + - name: BT_BB_NMI + instance: INTERRUPT_CORE0 + value: 6 + - name: LP_TIMER + instance: INTERRUPT_CORE0 + value: 7 + - name: COEX + instance: INTERRUPT_CORE0 + value: 8 + - name: BLE_TIMER + instance: INTERRUPT_CORE0 + value: 9 + - name: BLE_SEC + instance: INTERRUPT_CORE0 + value: 10 + - name: I2C_MST + instance: I2C0 + value: 11 + - name: APB_CTRL + instance: APB_CTRL + value: 12 + - name: GPIO + instance: GPIO + value: 13 + - name: GPIO_NMI + instance: GPIO + value: 14 + - name: SPI_INTR_1 + instance: SPI2 + value: 15 + - name: SPI_INTR_2 + instance: SPI2 + value: 16 + - name: UART0 + instance: UART0 + value: 17 + - name: UART1 + instance: UART1 + value: 18 + - name: LEDC + instance: LEDC + value: 19 + - name: EFUSE + instance: EFUSE + value: 20 + - name: RTC_CORE + instance: RTC_CNTL + value: 21 + - name: I2C_EXT0 + instance: I2C0 + value: 22 + - name: TG0_T0_LEVEL + instance: TIMG0 + value: 23 + - name: TG0_WDT_LEVEL + instance: TIMG0 + value: 24 + - name: CACHE_IA + instance: INTERRUPT_CORE0 + value: 25 + - name: SYSTIMER_TARGET0 + instance: SYSTIMER + value: 26 + - name: SYSTIMER_TARGET1 + instance: SYSTIMER + value: 27 + - name: SYSTIMER_TARGET2 + instance: SYSTIMER + value: 28 + - name: SPI_MEM_REJECT_CACHE + instance: SPI0 + value: 29 + - name: ICACHE_PRELOAD0 + instance: INTERRUPT_CORE0 + value: 30 + - name: ICACHE_SYNC0 + instance: INTERRUPT_CORE0 + value: 31 + - name: APB_ADC + instance: APB_SARADC + value: 32 + - name: DMA_CH0 + instance: DMA + value: 33 + - name: SHA + instance: SHA + value: 34 + - name: ECC + instance: INTERRUPT_CORE0 + value: 35 + - name: FROM_CPU_INTR0 + instance: INTERRUPT_CORE0 + value: 36 + - name: FROM_CPU_INTR1 + instance: INTERRUPT_CORE0 + value: 37 + - name: FROM_CPU_INTR2 + instance: INTERRUPT_CORE0 + value: 38 + - name: FROM_CPU_INTR3 + instance: INTERRUPT_CORE0 + value: 39 + - name: ASSIST_DEBUG + description: Assist debug interrupt + instance: ASSIST_DEBUG + value: 40 + - name: ETS_CORE0_PIF_PMS_SIZE + instance: INTERRUPT_CORE0 + value: 41 + - name: ETS_CACHE_CORE0_ACS + instance: + value: 42 diff --git a/xtask/regdesc/chips/esp32c2/peripherals.yml b/xtask/regdesc/chips/esp32c2/peripherals.yml new file mode 100644 index 0000000000..000276dd7d --- /dev/null +++ b/xtask/regdesc/chips/esp32c2/peripherals.yml @@ -0,0 +1,82 @@ +peripheral_instances: + - name: APB_CTRL + peripheral: APB_CTRL + base_addr: 0x60026000 + - name: APB_SARADC + peripheral: APB_SARADC + base_addr: 0x60040000 + - name: ASSIST_DEBUG + peripheral: ASSIST_DEBUG + base_addr: 0x600ce000 + - name: BB + peripheral: BB + base_addr: 0x6001D000 + - name: DMA + peripheral: DMA + base_addr: 0x6003f000 + - name: EFUSE + peripheral: EFUSE + base_addr: 0x60008800 + - name: ECC + peripheral: ECC + base_addr: 0x6003e000 + - name: EXTMEM + peripheral: EXTMEM + base_addr: 0x600c4000 + - name: GPIO + peripheral: GPIO + base_addr: 0x60004000 + - name: I2C0 + peripheral: I2C + base_addr: 0x60013000 + - name: INTERRUPT_CORE0 + peripheral: INTERRUPT_CORE0 + base_addr: 0x600c2000 + - name: IO_MUX + peripheral: IO_MUX + base_addr: 0x60009000 + - name: LEDC + peripheral: LEDC + base_addr: 0x60019000 + - name: MODEM_CLKRST + peripheral: MODEM_CLKRST + base_addr: 0x6004d800 + - name: RNG + peripheral: RNG + base_addr: 0x60026000 + - name: RTC_CNTL + peripheral: RTC_CNTL + base_addr: 0x60008000 + - name: SENSITIVE + peripheral: SENSITIVE + base_addr: 0x600c1000 + - name: SHA + peripheral: SHA + base_addr: 0x6003b000 + - name: SPI0 + peripheral: SPI0 + base_addr: 0x60003000 + - name: SPI1 + peripheral: SPI1 + base_addr: 0x60002000 + - name: SPI2 + peripheral: SPI2 + base_addr: 0x60024000 + - name: SYSTIMER + peripheral: SYSTIMER + base_addr: 0x60023000 + - name: SYSTEM + peripheral: SYSTEM + base_addr: 0x600c0000 + - name: TIMG0 + peripheral: TIMG + base_addr: 0x6001F000 + - name: UART0 + peripheral: UART + base_addr: 0x60000000 + - name: UART1 + peripheral: UART + base_addr: 0x60010000 + - name: XTS_AES + peripheral: XTS_AES + base_addr: 0x600CC000 diff --git a/xtask/regdesc/chips/esp32c2/regdesc.yml b/xtask/regdesc/chips/esp32c2/regdesc.yml new file mode 100644 index 0000000000..23f95f0ec9 --- /dev/null +++ b/xtask/regdesc/chips/esp32c2/regdesc.yml @@ -0,0 +1,43 @@ +--- +apb_ctrl_reg.csv: {} +apb_saradc_reg.csv: + name: APB_SARADC + wno: + - reg-names + - field-names +assist_debug_reg.csv: {} +dma_reg.csv: {} +ecc_mult_reg.csv: + name: ECC + wno: + - field-names +efuse_software.csv: {} +extmem_reg.csv: {} +gpio_reg.csv: {} +i2c_ext.csv: {} +interrupt_core0_reg.csv: {} +io_mux_reg.csv: {} +ledc_6ch_reg_for_trm.csv: {} +rtc_cntl_reg_sw_pass_for_trm.csv: {} +sensitive_reg.csv: {} +sha_reg_for_trm.csv: {} +spi1_mem_reg.csv: + name: SPI1 + wno: + - reg-names + - field-names +spi2_reg.csv: + name: SPI2 + wno: + - reg-names + - field-names +spi_mem_reg.csv: + name: SPI0 + wno: + - reg-names + - field-names +sys_timer_reg_for_trm.csv: {} +system_reg.csv: {} +timers_single_reg_for_trm.csv: {} +Uart_reg.csv: {} +xts_aes_reg_for_trm.csv: {} diff --git a/xtask/regdesc/chips/esp32c3/interrupts.yml b/xtask/regdesc/chips/esp32c3/interrupts.yml new file mode 100644 index 0000000000..dbb988a5a0 --- /dev/null +++ b/xtask/regdesc/chips/esp32c3/interrupts.yml @@ -0,0 +1,187 @@ +peripheral_interrupts: + - name: WIFI_MAC + instance: INTERRUPT_CORE0 + value: 0 + - name: WIFI_MAC_NMI + instance: INTERRUPT_CORE0 + value: 1 + - name: WIFI_PWR + instance: INTERRUPT_CORE0 + value: 2 + - name: WIFI_BB + instance: INTERRUPT_CORE0 + value: 3 + - name: BT_MAC + instance: INTERRUPT_CORE0 + value: 4 + - name: BT_BB + instance: INTERRUPT_CORE0 + value: 5 + - name: BT_BB_NMI + instance: INTERRUPT_CORE0 + value: 6 + - name: RWBT + instance: INTERRUPT_CORE0 + value: 7 + - name: RWBLE + instance: INTERRUPT_CORE0 + value: 8 + - name: RWBT_NMI + instance: INTERRUPT_CORE0 + value: 9 + - name: RWBLE_NMI + instance: INTERRUPT_CORE0 + value: 10 + - name: I2C_MASTER + instance: I2C0 + value: 11 + - name: SLC0 + instance: INTERRUPT_CORE0 + value: 12 + - name: SLC1 + instance: INTERRUPT_CORE0 + value: 13 + - name: APB_CTRL + instance: APB_CTRL + value: 14 + - name: UHCI0 + instance: UHCI0 + value: 15 + - name: GPIO + instance: GPIO + value: 16 + - name: GPIO_NMI + instance: GPIO + value: 17 + - name: SPI1 + instance: SPI1 + value: 18 + - name: SPI2 + instance: SPI2 + value: 19 + - name: I2S0 + instance: I2S0 + value: 20 + - name: UART0 + instance: UART0 + value: 21 + - name: UART1 + instance: UART1 + value: 22 + - name: LEDC + instance: LEDC + value: 23 + - name: EFUSE + instance: EFUSE + value: 24 + - name: TWAI0 + instance: TWAI0 + value: 25 + - name: USB_DEVICE + instance: USB_DEVICE + value: 26 + - name: RTC_CORE + instance: RTC_CNTL + value: 27 + - name: RMT + instance: RMT + value: 28 + - name: I2C_EXT0 + instance: I2C0 + value: 29 + - name: TIMER1 + instance: LEDC + value: 30 + - name: TIMER2 + instance: LEDC + value: 31 + - name: TG0_T0_LEVEL + instance: TIMG0 + value: 32 + - name: TG0_WDT_LEVEL + instance: TIMG0 + value: 33 + - name: TG1_T0_LEVEL + instance: TIMG1 + value: 34 + - name: TG1_WDT_LEVEL + instance: TIMG1 + value: 35 + - name: CACHE_IA + instance: INTERRUPT_CORE0 + value: 36 + - name: SYSTIMER_TARGET0 + instance: SYSTIMER + value: 37 + - name: SYSTIMER_TARGET1 + instance: SYSTIMER + value: 38 + - name: SYSTIMER_TARGET2 + instance: SYSTIMER + value: 39 + - name: SPI_MEM_REJECT_CACHE + instance: SPI0 + value: 40 + - name: ICACHE_PRELOAD0 + instance: INTERRUPT_CORE0 + value: 41 + - name: ICACHE_SYNC0 + instance: INTERRUPT_CORE0 + value: 42 + - name: APB_ADC + instance: APB_SARADC + value: 43 + - name: DMA_CH0 + instance: DMA + value: 44 + - name: DMA_CH1 + instance: DMA + value: 45 + - name: DMA_CH2 + instance: DMA + value: 46 + - name: RSA + instance: RSA + value: 47 + - name: AES + instance: AES + value: 48 + - name: SHA + instance: SHA + value: 49 + - name: FROM_CPU_INTR0 + instance: INTERRUPT_CORE0 + value: 50 + - name: FROM_CPU_INTR1 + instance: INTERRUPT_CORE0 + value: 51 + - name: FROM_CPU_INTR2 + instance: INTERRUPT_CORE0 + value: 52 + - name: FROM_CPU_INTR3 + instance: INTERRUPT_CORE0 + value: 53 + - name: ASSIST_DEBUG + instance: ASSIST_DEBUG + value: 54 + - name: DMA_APBPERI_PMS + instance: DMA + value: 55 + - name: CORE0_IRAM0_PMS + instance: INTERRUPT_CORE0 + value: 56 + - name: CORE0_DRAM0_PMS + instance: INTERRUPT_CORE0 + value: 57 + - name: CORE0_PIF_PMS + instance: INTERRUPT_CORE0 + value: 58 + - name: CORE0_PIF_PMS_SIZE + instance: INTERRUPT_CORE0 + value: 59 + - name: BAK_PMS_VIOLATE + instance: INTERRUPT_CORE0 + value: 60 + - name: CACHE_CORE0_ACS + instance: INTERRUPT_CORE0 + value: 61 diff --git a/xtask/regdesc/chips/esp32c3/peripherals.yml b/xtask/regdesc/chips/esp32c3/peripherals.yml new file mode 100644 index 0000000000..27603a486f --- /dev/null +++ b/xtask/regdesc/chips/esp32c3/peripherals.yml @@ -0,0 +1,112 @@ +peripheral_instances: + - name: AES + peripheral: AES + base_addr: 0x6003a000 + - name: APB_CTRL + peripheral: APB_CTRL + base_addr: 0x60026000 + - name: APB_SARADC + peripheral: APB_SARADC + base_addr: 0x60040000 + - name: ASSIST_DEBUG + peripheral: ASSIST_DEBUG + base_addr: 0x600ce000 + - name: BB + peripheral: BB + base_addr: 0x6001D000 + - name: DMA + peripheral: DMA + base_addr: 0x6003f000 + - name: DS + peripheral: DS + base_addr: 0x6003d000 + - name: EFUSE + peripheral: EFUSE + base_addr: 0x60008800 + - name: EXTMEM + peripheral: EXTMEM + base_addr: 0x600c4000 + - name: GPIO + peripheral: GPIO + base_addr: 0x60004000 + - name: GPIO_SD + peripheral: GPIOSD + base_addr: 0x60004f00 + - name: HMAC + peripheral: HMAC + base_addr: 0x6003e000 + - name: I2C0 + peripheral: I2C + base_addr: 0x60013000 + - name: I2S0 + peripheral: I2S + base_addr: 0x6002d000 + - name: INTERRUPT_CORE0 + peripheral: INTERRUPT_CORE0 + base_addr: 0x600c2000 + - name: IO_MUX + peripheral: IO_MUX + base_addr: 0x60009000 + - name: LEDC + peripheral: LEDC + base_addr: 0x60019000 + - name: RMT + peripheral: RMT + base_addr: 0x60016000 + - name: RNG + peripheral: RNG + base_addr: 0x60026000 + - name: RSA + peripheral: RSA + base_addr: 0x6003c000 + - name: RTC_CNTL + peripheral: RTC_CNTL + base_addr: 0x60008000 + - name: SENSITIVE + peripheral: SENSITIVE + base_addr: 0x600c1000 + - name: SHA + peripheral: SHA + base_addr: 0x6003b000 + - name: SPI0 + peripheral: SPI0 + base_addr: 0x60003000 + - name: SPI1 + peripheral: SPI1 + base_addr: 0x60002000 + - name: SPI2 + peripheral: SPI2 + base_addr: 0x60024000 + - name: SYSTEM + peripheral: SYSTEM + base_addr: 0x600c0000 + - name: SYSTIMER + peripheral: SYSTIMER + base_addr: 0x60023000 + - name: TIMG0 + peripheral: TIMG + base_addr: 0x6001f000 + - name: TIMG1 + peripheral: TIMG + base_addr: 0x60020000 + - name: TWAI0 + peripheral: TWAI + base_addr: 0x6002B000 + - name: UART0 + peripheral: UART + base_addr: 0x60000000 + - name: UART1 + peripheral: UART + base_addr: 0x60010000 + - name: UHCI0 + peripheral: UHCI + base_addr: 0x60014000 + - name: UHCI1 + peripheral: UHCI + base_addr: 0x6000c000 + - name: USB_DEVICE + peripheral: USB_DEVICE + base_addr: 0x60043000 + - name: XTS_AES + peripheral: XTS_AES + base_addr: 0x600cc000 diff --git a/xtask/regdesc/chips/esp32c3/regdesc.yml b/xtask/regdesc/chips/esp32c3/regdesc.yml new file mode 100644 index 0000000000..aabd26b0c3 --- /dev/null +++ b/xtask/regdesc/chips/esp32c3/regdesc.yml @@ -0,0 +1,51 @@ +--- +aes_reg.csv: {} +apb_ctrl_reg.csv: {} +apb_saradc_sw_pass.csv: {} +assist_debug_reg.csv: {} +core0_interrupt_reg.csv: {} +dma_reg.csv: {} +ds_reg.csv: + name: DS + wno: + - overlap +efuse_software_0720.csv: {} +extmem_reg_726.csv: {} +gpio_reg.csv: {} +gpio_sd_reg.csv: {} +hmac_reg.csv: + name: HMAC + wno: + - overlap +i2c_ext_sw.csv: {} +i2s1_reg.csv: {} +io_mux_reg.csv: {} +ledc_6ch_reg_sw.csv: {} +rmt_reg_sw.csv: {} +rsa_reg.csv: {} +rtc_cntl_reg_sw_pass.csv: {} +sensitive_reg.csv: {} +sha_reg.csv: {} +spi1_mem_reg.csv: + name: SPI1 + wno: + - reg-names + - field-names +spi2_reg.csv: + name: SPI2 + wno: + - reg-names + - field-names +spi_mem_reg.csv: + name: SPI0 + wno: + - reg-names + - field-names +sys_timer_reg_sw.csv: {} +system_reg.csv: {} +timers_single_reg_sw.csv: {} +twai_reg.csv: {} +Uart_reg.csv: {} +uhci_reg.csv: {} +usb_device_reg.csv: {} +xts_aes_reg.csv: {} diff --git a/xtask/regdesc/chips/esp32c5/interrupts.yml b/xtask/regdesc/chips/esp32c5/interrupts.yml new file mode 100644 index 0000000000..9b988ef0d1 --- /dev/null +++ b/xtask/regdesc/chips/esp32c5/interrupts.yml @@ -0,0 +1,256 @@ +peripheral_interrupts: +- name: WIFI_MAC + instance: INTERRUPT_CORE0 + value: 0 +- name: WIFI_MAC_NMI + instance: INTERRUPT_CORE0 + value: 1 +- name: WIFI_PWR + instance: INTERRUPT_CORE0 + value: 2 +- name: WIFI_BB + instance: INTERRUPT_CORE0 + value: 3 +- name: BT_MAC + instance: INTERRUPT_CORE0 + value: 4 +- name: BT_BB + instance: INTERRUPT_CORE0 + value: 5 +- name: BT_BB_NMI + instance: INTERRUPT_CORE0 + value: 6 +- name: LP_TIMER + instance: INTERRUPT_CORE0 + value: 7 +- name: COEX + instance: INTERRUPT_CORE0 + value: 8 +- name: BLE_TIMER + instance: INTERRUPT_CORE0 + value: 9 +- name: BLE_SEC + instance: INTERRUPT_CORE0 + value: 10 +- name: I2C_MASTER + instance: I2C0 + value: 11 +- name: ZB_MAC + instance: INTERRUPT_CORE0 + value: 12 +- name: PMU + instance: PMU + value: 13 +- name: EFUSE + instance: EFUSE + value: 14 +- name: LP_RTC_TIMER + instance: LP_TIMER + value: 15 +- name: LP_UART + instance: LP_UART + value: 16 +- name: LP_I2C + instance: LP_I2C0 + value: 17 +- name: LP_WDT + instance: LP_WDT + value: 18 +- name: LP_PERI_TIMEOUT + instance: LP_PERI + value: 19 +- name: LP_APM_M0 + instance: LP_APM0 + value: 20 +- name: LP_APM_M1 + instance: LP_APM0 + value: 21 +- name: HUK + instance: HUK + value: 22 +- name: FROM_CPU_INTR0 + instance: INTERRUPT_CORE0 + value: 23 +- name: FROM_CPU_INTR1 + instance: INTERRUPT_CORE0 + value: 24 +- name: FROM_CPU_INTR2 + instance: INTERRUPT_CORE0 + value: 25 +- name: FROM_CPU_INTR3 + instance: INTERRUPT_CORE0 + value: 26 +# - name: ASSIST_DEBUG +# instance: INTERRUPT_CORE0 +# value: 27 +- name: TRACE + instance: TRACE + value: 28 +- name: CACHE + instance: INTERRUPT_CORE0 + value: 29 +- name: CPU_PERI_TIMEOUT + instance: INTERRUPT_CORE0 + value: 30 +- name: GPIO + instance: GPIO + value: 31 +- name: GPIO_EXT + instance: GPIO_EXT + value: 32 +- name: PAU + instance: PAU + value: 33 +- name: HP_PERI_TIMEOUT + instance: HP_SYS + value: 34 +- name: MODEM_PERI_TIMEOUT + instance: HP_SYS + value: 35 +- name: HP_APM_M0 + instance: HP_APM + value: 36 +- name: HP_APM_M1 + instance: HP_APM + value: 37 +- name: HP_APM_M2 + instance: HP_APM + value: 38 +- name: HP_APM_M3 + instance: HP_APM + value: 39 +- name: HP_APM_M4 + instance: HP_APM + value: 40 +- name: LP_APM0 + instance: LP_APM0 + value: 41 +- name: CPU_APM_M0 + instance: INTERRUPT_CORE0 + value: 42 +- name: CPU_APM_M1 + instance: INTERRUPT_CORE0 + value: 43 +- name: MSPI + instance: SPI0 + value: 44 +- name: I2S + instance: I2S0 + value: 45 +- name: UHCI0 + instance: UHCI0 + value: 46 +- name: UART0 + instance: UART0 + value: 47 +- name: UART1 + instance: UART1 + value: 48 +- name: LEDC + instance: LEDC + value: 49 +- name: TWAI0 + instance: TWAI0 + value: 50 +- name: TWAI0_TIMER + instance: TWAI0 + value: 51 +- name: TWAI1 + instance: TWAI1 + value: 52 +- name: TWAI1_TIMER + instance: TWAI1 + value: 53 +- name: USB_SERIAL_JTAG + instance: USB_DEVICE + value: 54 +- name: RMT + instance: RMT + value: 55 +- name: I2C_EXT0 + instance: I2C0 + value: 56 +- name: TG0_T0_LEVEL + instance: TIMG0 + value: 57 +- name: TG0_WDT_LEVEL + instance: TIMG0 + value: 58 +- name: TG1_T0_LEVEL + instance: TIMG1 + value: 59 +- name: TG1_WDT_LEVEL + instance: TIMG1 + value: 60 +- name: SYSTIMER_TARGET0 + instance: SYSTIMER + value: 61 +- name: SYSTIMER_TARGET1 + instance: SYSTIMER + value: 62 +- name: SYSTIMER_TARGET2 + instance: SYSTIMER + value: 63 +- name: APB_ADC + instance: APB_SARADC + value: 64 +- name: MCPWM0 + instance: MCPWM0 + value: 65 +- name: PCNT + instance: PCNT + value: 66 +- name: PARL_IO_TX + instance: PARL_IO + value: 67 +- name: PARL_IO_RX + instance: PARL_IO + value: 68 +- name: SLC0 + instance: SLCHOST + value: 69 +- name: SLC1 + instance: SLCHOST + value: 70 +# - name: DMA_IN_CH0 +# instance: TODO +# value: 71 +# - name: DMA_IN_CH1 +# instance: TODO +# value: 72 +# - name: DMA_IN_CH2 +# instance: TODO +# value: 73 +# - name: DMA_OUT_CH0 +# instance: TODO +# value: 74 +# - name: DMA_OUT_CH1 +# instance: TODO +# value: 75 +# - name: DMA_OUT_CH2 +# instance: TODO +# value: 76 +- name: GPSPI2 + instance: SPI2 + value: 77 +- name: AES + instance: AES + value: 78 +- name: SHA + instance: SHA + value: 79 +- name: RSA + instance: RSA + value: 80 +- name: ECC + instance: ECC + value: 81 +- name: ECDSA + instance: ECDSA + value: 82 +# - name: KM +# instance: TODO +# value: 83 +# - name: MAX +# instance: TODO +# value: 84 diff --git a/xtask/regdesc/chips/esp32c5/peripherals.yml b/xtask/regdesc/chips/esp32c5/peripherals.yml new file mode 100644 index 0000000000..e518962cb7 --- /dev/null +++ b/xtask/regdesc/chips/esp32c5/peripherals.yml @@ -0,0 +1,229 @@ +peripheral_instances: +- name: AES + peripheral: AES + base_addr: 0x60088000 +- name: AHB_DMA + peripheral: AHB_DMA + base_addr: 0x60080000 +- name: APB_SARADC + peripheral: APB_SARADC + base_addr: 0x6000E000 +- name: ATOMIC + peripheral: ATOMIC + base_addr: 0x60011000 +- name: BITSCRAMBLER + peripheral: BITSCRAMBLER + base_addr: 0x60082000 +- name: BUS_MONITOR + peripheral: BUS_MONITOR + base_addr: 0x600C2000 +- name: CACHE + peripheral: CACHE + base_addr: 0x600C8000 +- name: CLINT_M + peripheral: CLINT_M + base_addr: 0x20000000 +- name: CPU_APM + peripheral: CPU_APM + base_addr: 0x6009A000 +- name: DS + peripheral: DS + base_addr: 0x6008C000 +- name: ECC + peripheral: ECC_MULT + base_addr: 0x6008B000 +- name: ECDSA + peripheral: ECDSA + base_addr: 0x6008E000 +- name: EFUSE + peripheral: EFUSE + base_addr: 0x600B4800 +- name: GPIO + peripheral: GPIO + base_addr: 0x60091000 +- name: GPIO_EXT + peripheral: GPIO_EXT + base_addr: 0x60091e00 +- name: HINF + peripheral: HINF + base_addr: 0x60016000 +- name: HMAC + peripheral: HMAC + base_addr: 0x6008D000 +- name: HP_APM + peripheral: HP_APM + base_addr: 0x60099000 +- name: HP_SYSTEM + peripheral: HP_SYSTEM + base_addr: 0x60095000 +- name: HUK + peripheral: HUK + base_addr: 0x600B3000 +- name: I2C0 + peripheral: I2C + base_addr: 0x60004000 +- name: I2C_ANA_MST + peripheral: I2C_ANA_MST + base_addr: 0x600AF800 +- name: I2S0 + peripheral: I2S + base_addr: 0x6000C000 +- name: INTPRI + peripheral: INTPRI + base_addr: 0x600C5000 +- name: INTERRUPT_CORE0 + peripheral: INTERRUPT_CORE0 + base_addr: 0x60010000 +- name: IO_MUX + peripheral: IO_MUX + base_addr: 0x60090000 +- name: KEYMNG + peripheral: KEYMNG + base_addr: 0x60087000 +- name: LEDC + peripheral: LEDC + base_addr: 0x60007000 +- name: LP_ANA + peripheral: LP_ANA + base_addr: 0x600B2C00 +- name: LP_APM0 + peripheral: LP_APM + base_addr: 0x600B3800 +- name: LP_AON + peripheral: LP_AON + base_addr: 0x600B1000 +- name: LP_CLKRST + peripheral: LP_CLKRST + base_addr: 0x600B0400 +- name: LP_IO + peripheral: LP_GPIO + base_addr: 0x600B4400 +- name: LP_IO_MUX + peripheral: LP_IO_MUX + base_addr: 0x600B4000 +- name: LP_I2C0 + peripheral: LP_I2C + base_addr: 0x600B1800 +- name: LP_I2C_ANA_MST + peripheral: LP_I2C_ANA_MST + base_addr: 0x600B2400 +- name: LP_TEE + peripheral: LP_TEE + base_addr: 0x600B3400 +- name: LP_TIMER + peripheral: LP_TIMER + base_addr: 0x600B0C00 +- name: LP_UART + peripheral: LP_UART + base_addr: 0x600B1400 +- name: LP_WDT + peripheral: LP_WDT + base_addr: 0x600B1C00 +- name: LPPERI + peripheral: LPPERI + base_addr: 0x600B2800 +- name: MCPWM0 + peripheral: MCPWM + base_addr: 0x60014000 +- name: MEM_MONITOR + peripheral: MEM_MONITOR + base_addr: 0x60092000 +- name: MISC + peripheral: MISC + base_addr: 0x6009F000 +- name: MODEM0 + peripheral: MODEM0 + base_addr: 0x600A0000 +- name: MODEM1 + peripheral: MODEM1 + base_addr: 0x600AC000 +- name: MODEM_PWR0 + peripheral: MODEM_PWR0 + base_addr: 0x600AD000 +- name: MODEM_PWR1 + peripheral: MODEM_PWR1 + base_addr: 0x600AF000 +- name: OTP_DEBUG + peripheral: OTP_DEBUG + base_addr: 0x600B4D00 +- name: PARL_IO + peripheral: PARL_IO + base_addr: 0x60015000 +- name: PAU + peripheral: PAU + base_addr: 0x60093000 +- name: PCR + peripheral: PCR + base_addr: 0x60096000 +- name: PCNT + peripheral: PCNT + base_addr: 0x60012000 +- name: PMU + peripheral: PMU + base_addr: 0x600B0000 +- name: PSRAM_MEM_MONITOR + peripheral: PSRAM_MEM_MONITOR + base_addr: 0x6001A000 +- name: PVT + peripheral: PVT + base_addr: 0x60019000 +- name: RMT + peripheral: RMT + base_addr: 0x60006000 +- name: RSA + peripheral: RSA + base_addr: 0x6008A000 +- name: SHA + peripheral: SHA + base_addr: 0x60089000 +- name: SLC + peripheral: SLC + base_addr: 0x60017000 +- name: SLCHOST + peripheral: SLCHOST + base_addr: 0x60018000 +- name: SOC_ETM + peripheral: SOC_ETM + base_addr: 0x60013000 +- name: SPI0 + peripheral: SPI + base_addr: 0x60002000 +- name: SPI1 + peripheral: SPI1 + base_addr: 0x60003000 +- name: SPI2 + peripheral: SPI2 + base_addr: 0x60081000 +- name: SYSTIMER + peripheral: SYSTIMER + base_addr: 0x6000A000 +- name: TEE + peripheral: TEE + base_addr: 0x60098000 +- name: TIMG0 + peripheral: TIMG + base_addr: 0x60008000 +- name: TIMG1 + peripheral: TIMG + base_addr: 0x60009000 +- name: TRACE + peripheral: TRACE + base_addr: 0x600C0000 +- name: TWAI0 + peripheral: TWAIFD + base_addr: 0x6000B000 +- name: TWAI1 + peripheral: TWAIFD + base_addr: 0x6000D000 +- name: UART0 + peripheral: UART + base_addr: 0x60000000 +- name: UART1 + peripheral: UART + base_addr: 0x60001000 +- name: UHCI0 + peripheral: UHCI + base_addr: 0x60005000 +- name: USB_DEVICE + peripheral: USB_SERIAL_JTAG + base_addr: 0x6000F000 diff --git a/xtask/regdesc/chips/esp32c5/regdesc.yml b/xtask/regdesc/chips/esp32c5/regdesc.yml new file mode 100644 index 0000000000..5020abc6f1 --- /dev/null +++ b/xtask/regdesc/chips/esp32c5/regdesc.yml @@ -0,0 +1,61 @@ +--- +aes_reg.csv: {} +ahb_dma_reg.csv: {} +apb_saradc_reg.csv: {} +bitscrambler_reg.csv: {} +bus_monitor_reg.csv: {} +cache_reg.csv: {} +ds_reg.csv: {} +ecc_mult_reg.csv: {} +ecdsa_reg.csv: {} +efuse_mem_reg.csv: {} +gpio_ext_reg.csv: {} +gpio_reg.csv: {} +hmac_reg.csv: {} +hp_apm_reg.csv: {} +hp_system_reg.csv: {} +huk_reg.csv: {} +i2c_ext_reg.csv: {} +i2s_reg.csv: {} +interrupt_matrix_reg.csv: {} +intpri_reg.csv: {} +io_mux_reg.csv: {} +keymng_reg.csv: {} +ledc_reg.csv: {} +lp_ana_reg.csv: {} +lp_aon_reg.csv: {} +lp_apm_reg.csv: {} +lp_apm0_reg.csv: {} +lp_clkrst_reg.csv: {} +lp_gpio_reg.csv: {} +lp_i2c_ana_mst_reg.csv: {} +lp_i2c_ext_reg.csv: {} +lp_io_mux_reg.csv: {} +lp_tee_reg.csv: {} +lp_timer_reg.csv: {} +lp_uart_reg.csv: {} +lp_wdt_reg.csv: {} +lpperi_reg.csv: {} +mem_monitor_reg.csv: {} +parl_io_reg.csv: {} +pau_reg.csv: {} +pcnt_reg.csv: {} +pcr_reg.csv: {} +pmu_reg.csv: {} +pvt_reg.csv: {} +pwm_reg.csv: {} +rmt_reg.csv: {} +rsa_reg.csv: {} +sha_reg.csv: {} +soc_etm_reg.csv: {} +spi_mem_reg.csv: {} +spi1_mem_reg.csv: {} +spi2_reg.csv: {} +sys_timer_reg.csv: {} +tee_reg.csv: {} +timers_reg.csv: {} +trace_reg.csv: {} +twaifd_reg.csv: {} +uart_reg.csv: {} +uhci_reg.csv: {} +usb_serial_jtag_reg.csv: {} \ No newline at end of file diff --git a/xtask/regdesc/chips/esp32c6-lp/interrupts.yml b/xtask/regdesc/chips/esp32c6-lp/interrupts.yml new file mode 100644 index 0000000000..c005fcbe44 --- /dev/null +++ b/xtask/regdesc/chips/esp32c6-lp/interrupts.yml @@ -0,0 +1,25 @@ +peripheral_interrupts: + - name: LP_TIMER + instance: LP_TIMER + value: 7 + - name: LP_RTC_TIMER + instance: LP_RTC_TIMER + value: 15 + - name: LP_UART + instance: LP_UART + value: 16 + - name: LP_I2C + instance: LP_I2C0 + value: 17 + - name: LP_WDT + instance: LP_WDT + value: 18 + - name: LP_PERI_TIMEOUT + instance: LP_PERI + value: 19 + - name: LP_APM_M0 + instance: LP_APM + value: 20 + - name: LP_APM_M1 + instance: LP_APM + value: 21 diff --git a/xtask/regdesc/chips/esp32c6-lp/peripherals.yml b/xtask/regdesc/chips/esp32c6-lp/peripherals.yml new file mode 100644 index 0000000000..b3ed5cb16f --- /dev/null +++ b/xtask/regdesc/chips/esp32c6-lp/peripherals.yml @@ -0,0 +1,40 @@ +peripheral_instances: + - name: LP_I2C0 + peripheral: I2C + base_addr: 0x600B1800 + - name: LP_PERI + peripheral: LPPERI + base_addr: 0x600B2800 + - name: LP_ANA_PERI + peripheral: LP_ANA + base_addr: 0x600B2C00 + - name: LP_AON + peripheral: LP_AON + base_addr: 0x600B1000 + - name: LP_APM + peripheral: LP_APM + base_addr: 0x600B3800 + # - name: LP_APM0 + # peripheral: LP_APM0 + # base_addr: 0x0 + - name: LP_CLKRST + peripheral: LP_CLKRST + base_addr: 0x600B0400 + - name: LP_I2C_ANA_MST + peripheral: LP_I2C_ANA_MST + base_addr: 0x600B2400 + - name: LP_IO + peripheral: LP_IO + base_addr: 0x600B2000 + - name: LP_TEE + peripheral: LP_TEE + base_addr: 0x600B3400 + - name: LP_TIMER + peripheral: LP_TIMER + base_addr: 0x600B0C00 + - name: LP_UART + peripheral: LP_UART + base_addr: 0x600B1400 + - name: LP_WDT + peripheral: LP_WDT + base_addr: 0x600B1C00 diff --git a/xtask/regdesc/chips/esp32c6-lp/regdesc.yml b/xtask/regdesc/chips/esp32c6-lp/regdesc.yml new file mode 100644 index 0000000000..e6bcc308c9 --- /dev/null +++ b/xtask/regdesc/chips/esp32c6-lp/regdesc.yml @@ -0,0 +1,15 @@ +# TODO: Do we need `hardware_lock_reg.csv` and `pcr_reg.csv` as well? Others? +--- +lp_analog_peri_reg.csv: {} +lp_aon_reg.csv: {} +lp_apm0_reg.csv: {} +lp_apm_reg.csv: {} +lp_clkrst_reg.csv: {} +lp_i2c_ana_mst_reg.csv: {} +lp_i2c_ext_reg.csv: {} +lp_io_reg.csv: {} +lp_tee_reg.csv: {} +lp_timer_reg.csv: {} +lp_uart_reg.csv: {} +lp_wdt_reg.csv: {} +lpperi_reg.csv: {} diff --git a/xtask/regdesc/chips/esp32c6/interrupts.yml b/xtask/regdesc/chips/esp32c6/interrupts.yml new file mode 100644 index 0000000000..39647af0be --- /dev/null +++ b/xtask/regdesc/chips/esp32c6/interrupts.yml @@ -0,0 +1,232 @@ +peripheral_interrupts: + - name: WIFI_MAC + instance: INTERRUPT_CORE0 + value: 0 + - name: WIFI_MAC_NMI + instance: INTERRUPT_CORE0 + value: 1 + - name: WIFI_PWR + instance: INTERRUPT_CORE0 + value: 2 + - name: WIFI_BB + instance: INTERRUPT_CORE0 + value: 3 + - name: BT_MAC + instance: INTERRUPT_CORE0 + value: 4 + - name: BT_BB + instance: INTERRUPT_CORE0 + value: 5 + - name: BT_BB_NMI + instance: INTERRUPT_CORE0 + value: 6 + - name: LP_TIMER + instance: INTERRUPT_CORE0 + value: 7 + - name: COEX + instance: INTERRUPT_CORE0 + value: 8 + - name: BLE_TIMER + instance: INTERRUPT_CORE0 + value: 9 + - name: BLE_SEC + instance: INTERRUPT_CORE0 + value: 10 + - name: I2C_MASTER + instance: I2C0 + value: 11 + - name: ZB_MAC + instance: INTERRUPT_CORE0 + value: 12 + - name: PMU + instance: PMU + value: 13 + - name: EFUSE + instance: EFUSE + value: 14 + - name: LP_RTC_TIMER + instance: LP_TIMER + value: 15 + - name: LP_UART + instance: LP_UART + value: 16 + - name: LP_I2C + instance: LP_I2C0 + value: 17 + - name: LP_WDT + instance: LP_WDT + value: 18 + - name: LP_PERI_TIMEOUT + instance: LP_PERI + value: 19 + - name: LP_APM_M0 + instance: LP_APM + value: 20 + - name: LP_APM_M1 + instance: LP_APM + value: 21 + - name: FROM_CPU_INTR0 + instance: INTERRUPT_CORE0 + value: 22 + - name: FROM_CPU_INTR1 + instance: INTERRUPT_CORE0 + value: 23 + - name: FROM_CPU_INTR2 + instance: INTERRUPT_CORE0 + value: 24 + - name: FROM_CPU_INTR3 + instance: INTERRUPT_CORE0 + value: 25 + - name: ASSIST_DEBUG + instance: ASSIST_DEBUG + value: 26 + - name: TRACE + instance: TRACE + value: 27 + - name: CACHE + instance: INTERRUPT_CORE0 + value: 28 + - name: CPU_PERI_TIMEOUT + instance: INTERRUPT_CORE0 + value: 29 + - name: GPIO + instance: GPIO + value: 30 + - name: GPIO_NMI + instance: GPIO + value: 31 + - name: PAU + instance: PAU + value: 32 + - name: HP_PERI_TIMEOUT + instance: HP_SYS + value: 33 + - name: MODEM_PERI_TIMEOUT + instance: HP_SYS + value: 34 + - name: HP_APM_M0 + instance: HP_APM + value: 35 + - name: HP_APM_M1 + instance: HP_APM + value: 36 + - name: HP_APM_M2 + instance: HP_APM + value: 37 + - name: HP_APM_M3 + instance: HP_APM + value: 38 + - name: LP_APM0 + instance: LP_APM + value: 39 + - name: MSPI + instance: SPI2 + value: 40 + - name: I2S0 + instance: I2S0 + value: 41 + - name: UHCI0 + instance: UHCI0 + value: 42 + - name: UART0 + instance: UART0 + value: 43 + - name: UART1 + instance: UART1 + value: 44 + - name: LEDC + instance: LEDC + value: 45 + - name: TWAI0 + instance: TWAI0 + value: 46 + - name: TWAI1 + instance: TWAI1 + value: 47 + - name: USB_DEVICE + instance: USB_DEVICE + value: 48 + - name: RMT + instance: RMT + value: 49 + - name: I2C_EXT0 + instance: I2C0 + value: 50 + - name: TG0_T0_LEVEL + instance: TIMG0 + value: 51 + - name: TG0_T1_LEVEL + instance: TIMG0 + value: 52 + - name: TG0_WDT_LEVEL + instance: TIMG0 + value: 53 + - name: TG1_T0_LEVEL + instance: TIMG1 + value: 54 + - name: TG1_T1_LEVEL + instance: TIMG1 + value: 55 + - name: TG1_WDT_LEVEL + instance: TIMG1 + value: 56 + - name: SYSTIMER_TARGET0 + instance: SYSTIMER + value: 57 + - name: SYSTIMER_TARGET1 + instance: SYSTIMER + value: 58 + - name: SYSTIMER_TARGET2 + instance: SYSTIMER + value: 59 + - name: APB_SARADC + instance: APB_SARADC + value: 60 + - name: MCPWM0 + instance: MCPWM0 + value: 61 + - name: PCNT + instance: PCNT + value: 62 + - name: PARL_IO + instance: PARL_IO + value: 63 + - name: SLC0 + instance: SLCHOST + value: 64 + - name: SLC1 + instance: SLCHOST + value: 65 + - name: DMA_IN_CH0 + instance: DMA + value: 66 + - name: DMA_IN_CH1 + instance: DMA + value: 67 + - name: DMA_IN_CH2 + instance: DMA + value: 68 + - name: DMA_OUT_CH0 + instance: DMA + value: 69 + - name: DMA_OUT_CH1 + instance: DMA + value: 70 + - name: DMA_OUT_CH2 + instance: DMA + value: 71 + - name: SPI2 + instance: SPI2 + value: 72 + - name: AES + instance: AES + value: 73 + - name: SHA + instance: SHA + value: 74 + - name: RSA + instance: RSA + value: 75 + - name: ECC + instance: ECC + value: 76 diff --git a/xtask/regdesc/chips/esp32c6/peripherals.yml b/xtask/regdesc/chips/esp32c6/peripherals.yml new file mode 100644 index 0000000000..d60f6adb4e --- /dev/null +++ b/xtask/regdesc/chips/esp32c6/peripherals.yml @@ -0,0 +1,199 @@ +peripheral_instances: + - name: AES + peripheral: AES + base_addr: 0x60088000 + - name: APB_SARADC + peripheral: APB_SARADC + base_addr: 0x6000E000 + - name: ASSIST_DEBUG + peripheral: ASSIST_DEBUG + base_addr: 0x600C2000 + - name: ATOMIC + peripheral: ATOMIC + base_addr: 0x60011000 + - name: DMA + peripheral: DMA + base_addr: 0x60080000 + - name: DS + peripheral: DS + base_addr: 0x6008C000 + - name: ECC + peripheral: ECC + base_addr: 0x6008B000 + - name: EFUSE + peripheral: EFUSE + base_addr: 0x600B0800 + - name: EXTMEM + peripheral: EXTMEM + base_addr: 0x600C8000 + - name: GPIO + peripheral: GPIO + base_addr: 0x60091000 + - name: GPIO_SD + peripheral: GPIOSD + base_addr: 0x60091f00 + - name: HINF + peripheral: HINF + base_addr: 0x60016000 + - name: HMAC + peripheral: HMAC + base_addr: 0x6008D000 + - name: HP_APM + peripheral: HP_APM + base_addr: 0x60099000 + - name: HP_SYS + peripheral: HP_SYS + base_addr: 0x60095000 + - name: I2C0 + peripheral: I2C + base_addr: 0x60004000 + - name: I2S0 + peripheral: I2S + base_addr: 0x6000C000 + - name: IEEE802154 + peripheral: IEEE802154 + base_addr: 0x600A3000 + - name: INTERRUPT_CORE0 + peripheral: INTMTX_CORE0 + base_addr: 0x60010000 + - name: INTPRI + peripheral: INTPRI + base_addr: 0x600C5000 + - name: IO_MUX + peripheral: IO_MUX + base_addr: 0x60090000 + - name: LEDC + peripheral: LEDC + base_addr: 0x60007000 + - name: LP_PERI + peripheral: LPPERI + base_addr: 0x600B2800 + - name: LP_ANA + peripheral: LP_ANA + base_addr: 0x600B2C00 + - name: LP_AON + peripheral: LP_AON + base_addr: 0x600B1000 + - name: LP_APM + peripheral: LP_APM + base_addr: 0x600B3800 + - name: LP_APM0 + peripheral: LP_APM0 + base_addr: 0x60099800 + - name: LP_CLKRST + peripheral: LP_CLKRST + base_addr: 0x600B0400 + - name: LP_I2C0 + peripheral: LP_I2C0 + base_addr: 0x600B1800 + - name: LP_I2C_ANA_MST + peripheral: LP_I2C_ANA_MST + base_addr: 0x600B2400 + - name: LP_IO + peripheral: LP_IO + base_addr: 0x600B2000 + - name: LP_TEE + peripheral: LP_TEE + base_addr: 0x600B3400 + - name: LP_TIMER + peripheral: LP_TIMER + base_addr: 0x600B0C00 + - name: LP_UART + peripheral: LP_UART + base_addr: 0x600B1400 + - name: LP_WDT + peripheral: LP_WDT + base_addr: 0x600B1C00 + - name: MODEM_LPCON + peripheral: MODEM_LPCON + base_addr: 0x600AF000 + - name: MODEM_SYSCON + peripheral: MODEM_SYSCON + base_addr: 0x600A9800 + - name: MCPWM0 + peripheral: MCPWM + base_addr: 0x60014000 + - name: MEM_MONITOR + peripheral: MEM_MONITOR + base_addr: 0x60092000 + - name: OTP_DEBUG + peripheral: OTP_DEBUG + base_addr: 0x600B3C00 + - name: PARL_IO + peripheral: PARL_IO + base_addr: 0x60015000 + - name: PAU + peripheral: PAU + base_addr: 0x60093000 + - name: PCNT + peripheral: PCNT + base_addr: 0x60012000 + - name: PCR + peripheral: PCR + base_addr: 0x60096000 + - name: PMU + peripheral: PMU + base_addr: 0x600B0000 + - name: RMT + peripheral: RMT + base_addr: 0x60006000 + - name: RNG + peripheral: RNG + base_addr: 0x600B2800 + - name: RSA + peripheral: RSA + base_addr: 0x6008A000 + # - name: SDIO + # peripheral: SDIO + # base_addr: 0x0 + - name: SHA + peripheral: SHA + base_addr: 0x60089000 + - name: SLCHOST + peripheral: SLCHOST + base_addr: 0x60017000 + - name: SOC_ETM + peripheral: SOC_ETM + base_addr: 0x60013000 + - name: SPI0 + peripheral: SPI0 + base_addr: 0x60002000 + - name: SPI1 + peripheral: SPI1 + base_addr: 0x60003000 + - name: SPI2 + peripheral: SPI2 + base_addr: 0x60081000 + - name: SYSTIMER + peripheral: SYSTIMER + base_addr: 0x6000A000 + - name: TEE + peripheral: TEE + base_addr: 0x60098000 + - name: TIMG0 + peripheral: TIMG + base_addr: 0x60008000 + - name: TIMG1 + peripheral: TIMG + base_addr: 0x60009000 + - name: TRACE + peripheral: TRACE + base_addr: 0x600C0000 + - name: TWAI0 + peripheral: TWAI + base_addr: 0x6000B000 + - name: TWAI1 + peripheral: TWAI + base_addr: 0x6000D000 + - name: UART0 + peripheral: UART + base_addr: 0x60000000 + - name: UART1 + peripheral: UART + base_addr: 0x60001000 + - name: UHCI0 + peripheral: UHCI + base_addr: 0x60005000 + - name: USB_DEVICE + peripheral: USB_DEVICE + base_addr: 0x6000F000 diff --git a/xtask/regdesc/chips/esp32c6/regdesc.yml b/xtask/regdesc/chips/esp32c6/regdesc.yml new file mode 100644 index 0000000000..2eceed3e7a --- /dev/null +++ b/xtask/regdesc/chips/esp32c6/regdesc.yml @@ -0,0 +1,96 @@ +--- +aes_reg.csv: {} +apb_saradc_reg.csv: + name: APB_SARADC + wno: + - reg-names +assist_debug_reg.csv: {} +dma_reg.csv: {} +ds_reg.csv: {} +ecc_mult_reg.csv: + name: ECC + wno: + - field-names + - overlap +efuse_reg.csv: {} +extmem_reg.csv: {} +gpio_reg.csv: {} +gpio_sd_reg.csv: {} +hardware_lock_reg.csv: {} +hmac_reg.csv: {} +host_reg.csv: {} +hp_apm_reg.csv: {} +hp_system_reg.csv: {} +i2c_ext_reg.csv: {} +i2s1_reg.csv: {} +interrupt_matrix_reg.csv: {} +intpri_reg.csv: {} +io_mux_reg.csv: {} +ledc_reg.csv: {} +lp_analog_peri_reg.csv: {} +lp_aon_reg.csv: {} +lp_apm0_reg.csv: {} +lp_apm_reg.csv: {} +lp_clkrst_reg.csv: {} +lp_i2c_ana_mst_reg.csv: + wno: + - field-names +lp_i2c_ext_reg.csv: + name: LP_I2C0 + wno: + - reg-names + - field-names +lp_io_reg.csv: + wno: + - field-names +lp_tee_reg.csv: + wno: + - field-names +lp_timer_reg.csv: {} +lp_uart_reg.csv: {} +lp_wdt_reg.csv: {} +lpperi_reg.csv: {} +mem_monitor_reg.csv: {} +otp_debug_reg.csv: + wno: + - field-names +parl_io_reg.csv: {} +pau_reg.csv: {} +pcnt_reg.csv: {} +pcr_reg.csv: {} +pmu_reg.csv: {} +pwm_reg.csv: {} +rmt_reg.csv: {} +rsa_reg.csv: {} +sdio_hinf_reg.csv: {} +sdio_slc_reg.csv: {} +sha_reg.csv: {} +soc_etm_reg.csv: {} +spi1_mem_reg.csv: + name: SPI1 + wno: + - reg-names + - field-names +spi2_reg.csv: + name: SPI2 + wno: + - reg-names + - field-names +spi_mem_reg.csv: + name: SPI0 + wno: + - reg-names + - field-names +sys_timer_reg.csv: {} +tee_reg.csv: {} +timers_single_reg.csv: {} +touch_reg.csv: + wno: + - field-names +trace_reg.csv: {} +twai_reg.csv: {} +uart_reg.csv: {} +uhci_reg.csv: {} +usb_device_reg.csv: + wno: + - field-names diff --git a/xtask/regdesc/chips/esp32h2/interrupts.yml b/xtask/regdesc/chips/esp32h2/interrupts.yml new file mode 100644 index 0000000000..77e8a3edc3 --- /dev/null +++ b/xtask/regdesc/chips/esp32h2/interrupts.yml @@ -0,0 +1,196 @@ +peripheral_interrupts: + - name: PMU + instance: PMU + value: 0 + - name: EFUSE + instance: EFUSE + value: 1 + - name: LP_RTC_TIMER + instance: LP_TIMER + value: 2 + - name: LP_BLE_TIMER + instance: LP_TIMER + value: 3 + - name: LP_WDT + instance: LP_WDT + value: 4 + - name: LP_PERI_TIMEOUT + instance: LP_PERI + value: 5 + - name: LP_APM_M0 + instance: LP_APM + value: 6 + - name: FROM_CPU_INTR0 + instance: INTERRUPT_CORE0 + value: 7 + - name: FROM_CPU_INTR1 + instance: INTERRUPT_CORE0 + value: 8 + - name: FROM_CPU_INTR2 + instance: INTERRUPT_CORE0 + value: 9 + - name: FROM_CPU_INTR3 + instance: INTERRUPT_CORE0 + value: 10 + - name: ASSIST_DEBUG + instance: ASSIST_DEBUG + value: 11 + - name: TRACE + instance: TRACE + value: 12 + - name: CACHE + instance: INTERRUPT_CORE0 + value: 13 + - name: CPU_PERI_TIMEOUT + instance: INTERRUPT_CORE0 + value: 14 + - name: BT_MAC + instance: INTERRUPT_CORE0 + value: 15 + - name: BT_BB + instance: INTERRUPT_CORE0 + value: 16 + - name: BT_BB_NMI + instance: INTERRUPT_CORE0 + value: 17 + - name: COEX + instance: INTERRUPT_CORE0 + value: 18 + - name: BLE_TIMER + instance: INTERRUPT_CORE0 + value: 19 + - name: BLE_SEC + instance: INTERRUPT_CORE0 + value: 20 + - name: ZB_MAC + instance: INTERRUPT_CORE0 + value: 21 + - name: GPIO + instance: GPIO + value: 22 + - name: GPIO_NMI + instance: GPIO + value: 23 + - name: PAU + instance: PAU + value: 24 + - name: HP_PERI_TIMEOUT + instance: HP_SYS + value: 25 + - name: HP_APM_M0 + instance: HP_APM + value: 26 + - name: HP_APM_M1 + instance: HP_APM + value: 27 + - name: HP_APM_M2 + instance: HP_APM + value: 28 + - name: HP_APM_M3 + instance: HP_APM + value: 29 + - name: MSPI + instance: SPI2 + value: 30 + - name: I2S0 + instance: I2S0 + value: 31 + - name: UHCI0 + instance: UHCI0 + value: 32 + - name: UART0 + instance: UART0 + value: 33 + - name: UART1 + instance: UART1 + value: 34 + - name: LEDC + instance: LEDC + value: 35 + - name: TWAI0 + instance: TWAI0 + value: 36 + - name: USB_DEVICE + instance: USB_DEVICE + value: 37 + - name: RMT + instance: RMT + value: 38 + - name: I2C_EXT0 + instance: I2C0 + value: 39 + - name: I2C_EXT1 + instance: I2C1 + value: 40 + - name: TG0_T0_LEVEL + instance: TIMG0 + value: 41 + - name: TG0_WDT_LEVEL + instance: TIMG0 + value: 42 + - name: TG1_T0_LEVEL + instance: TIMG1 + value: 43 + - name: TG1_WDT_LEVEL + instance: TIMG1 + value: 44 + - name: SYSTIMER_TARGET0 + instance: SYSTIMER + value: 45 + - name: SYSTIMER_TARGET1 + instance: SYSTIMER + value: 46 + - name: SYSTIMER_TARGET2 + instance: SYSTIMER + value: 47 + - name: APB_ADC + instance: APB_SARADC + value: 48 + - name: MCPWM0 + instance: MCPWM0 + value: 49 + - name: PCNT + instance: PCNT + value: 50 + - name: PARL_IO_TX + instance: PARL_IO + value: 51 + - name: PARL_IO_RX + instance: PARL_IO + value: 52 + - name: DMA_IN_CH0 + instance: DMA + value: 53 + - name: DMA_IN_CH1 + instance: DMA + value: 54 + - name: DMA_IN_CH2 + instance: DMA + value: 55 + - name: DMA_OUT_CH0 + instance: DMA + value: 56 + - name: DMA_OUT_CH1 + instance: DMA + value: 57 + - name: DMA_OUT_CH2 + instance: DMA + value: 58 + - name: GPSPI2 + instance: SPI2 + value: 59 + - name: AES + instance: AES + value: 60 + - name: SHA + instance: SHA + value: 61 + - name: RSA + instance: RSA + value: 62 + - name: ECC + instance: ECC + value: 63 + - name: ECDSA + instance: INTERRUPT_CORE0 + value: 64 diff --git a/xtask/regdesc/chips/esp32h2/peripherals.yml b/xtask/regdesc/chips/esp32h2/peripherals.yml new file mode 100644 index 0000000000..aba059caa9 --- /dev/null +++ b/xtask/regdesc/chips/esp32h2/peripherals.yml @@ -0,0 +1,190 @@ +peripheral_instances: + - name: AES + peripheral: AES + base_addr: 0x60088000 + - name: APB_SARADC + peripheral: APB_SARADC + base_addr: 0x6000E000 + - name: ASSIST_DEBUG + peripheral: ASSIST_DEBUG + base_addr: 0x600C2000 + - name: DMA + peripheral: DMA + base_addr: 0x60080000 + - name: DS + peripheral: DS + base_addr: 0x6008C000 + - name: ECC + peripheral: ECC + base_addr: 0x6008B000 + - name: EFUSE + peripheral: EFUSE + base_addr: 0x600B0800 + - name: GPIO + peripheral: GPIO + base_addr: 0x60091000 + - name: GPIO_SD + peripheral: GPIOSD + base_addr: 0x60091f00 + - name: HINF + peripheral: HINF + base_addr: 0x6000B000 + - name: HMAC + peripheral: HMAC + base_addr: 0x6008D000 + - name: HOST + peripheral: HOST + base_addr: 0x60015000 + - name: HP_APM + peripheral: HP_APM + base_addr: 0x60099000 + - name: HP_SYS + peripheral: HP_SYS + base_addr: 0x60095000 + - name: I2C0 + peripheral: I2C + base_addr: 0x60004000 + - name: I2C1 + peripheral: I2C + base_addr: 0x60005000 + - name: I2S0 + peripheral: I2S + base_addr: 0x6000D000 + - name: IEEE802154 + peripheral: IEEE802154 + base_addr: 0x60047000 + - name: INTERRUPT_CORE0 + peripheral: INTMTX_CORE0 + base_addr: 0x60010000 + - name: INTPRI + peripheral: INTPRI + base_addr: 0x600C5000 + - name: IO_MUX + peripheral: IO_MUX + base_addr: 0x60090000 + - name: LEDC + peripheral: LEDC + base_addr: 0x60008000 + - name: LP_AON + peripheral: LP_AON + base_addr: 0x600B1000 + - name: LP_ANA + peripheral: LP_ANA + base_addr: 0x600B2C00 + - name: LP_APM + peripheral: LP_APM + base_addr: 0x600B3800 + - name: LP_CLKRST + peripheral: LP_CLKRST + base_addr: 0x600B0400 + - name: LP_PERI + peripheral: LPPERI + base_addr: 0x600B2800 + - name: LP_TIMER + peripheral: LP_TIMER + base_addr: 0x600B0C00 + - name: LP_WDT + peripheral: LP_WDT + base_addr: 0x600B1C00 + - name: MODEM_LPCON + peripheral: MODEM_LPCON + base_addr: 0x600AD000 + - name: MODEM_SYSCON + peripheral: MODEM_SYSCON + base_addr: 0x600A5400 + - name: MCPWM0 + peripheral: MCPWM + base_addr: 0x60014000 + - name: MEM_MONITOR + peripheral: MEM_MONITOR + base_addr: 0x60092000 + - name: OTP_DEBUG + peripheral: OTP_DEBUG + base_addr: 0x600B3C00 + - name: PARL_IO + peripheral: PARL_IO + base_addr: 0x60015000 + - name: PAU + peripheral: PAU + base_addr: 0x60093000 + - name: PCNT + peripheral: PCNT + base_addr: 0x60012000 + - name: PCR + peripheral: PCR + base_addr: 0x60096000 + - name: PMU + peripheral: PMU + base_addr: 0x600B0000 + - name: RMT + peripheral: RMT + base_addr: 0x60007000 + - name: RMTMEM + peripheral: RMTMEM + base_addr: 0x60016400 + - name: RNG + peripheral: RNG + base_addr: 0x600B2800 + - name: RSA + peripheral: RSA + base_addr: 0x6008A000 + - name: RTC_CNTL + peripheral: RTCCNTL + base_addr: 0x60008000 + - name: RTC_IO + peripheral: RTCIO + base_addr: 0x60008400 + - name: SDM + peripheral: SDM + base_addr: 0x60004f00 + - name: SLC + peripheral: SLC + base_addr: 0x60018000 + - name: SHA + peripheral: SHA + base_addr: 0x60089000 + - name: SOC_ETM + peripheral: SOC_ETM + base_addr: 0x60013000 + - name: SPI0 + peripheral: SPI0 + base_addr: 0x60002000 + - name: SPI1 + peripheral: SPI1 + base_addr: 0x60003000 + - name: SPI2 + peripheral: SPI2 + base_addr: 0x60081000 + - name: SYSCON + peripheral: SYSCON + base_addr: 0x60026000 + - name: SYSTIMER + peripheral: SYSTIMER + base_addr: 0x6000B000 + - name: TEE + peripheral: TEE + base_addr: 0x60098000 + - name: TIMG0 + peripheral: TIMG + base_addr: 0x60009000 + - name: TIMG1 + peripheral: TIMG + base_addr: 0x6000A000 + - name: TRACE + peripheral: TRACE + base_addr: 0x600C0000 + - name: TWAI0 + peripheral: TWAI + base_addr: 0x6000C000 + - name: UART0 + peripheral: UART + base_addr: 0x60000000 + - name: UART1 + peripheral: UART + base_addr: 0x60001000 + - name: UHCI0 + peripheral: UHCI + base_addr: 0x60006000 + - name: USB_DEVICE + peripheral: USB_DEVICE + base_addr: 0x6000F000 diff --git a/xtask/regdesc/chips/esp32h2/regdesc.yml b/xtask/regdesc/chips/esp32h2/regdesc.yml new file mode 100644 index 0000000000..e86b9b0d93 --- /dev/null +++ b/xtask/regdesc/chips/esp32h2/regdesc.yml @@ -0,0 +1,77 @@ +--- +aes_reg.csv: {} +apb_saradc_reg.csv: + name: APB_SARADC + wno: + - reg-names +assist_debug_reg.csv: {} +cache_reg.csv: {} +dma_reg.csv: {} +ds_reg.csv: {} +ecc_mult_reg.csv: + name: ECC + wno: + - field-names +ecdsa_reg.csv: {} +efuse_reg.csv: {} +gpio_reg.csv: {} +gpio_sd_reg.csv: {} +hmac_reg.csv: {} +hp_apm_reg.csv: {} +hp_system_reg.csv: {} +i2c_ext_reg.csv: {} +i2s_reg.csv: {} +interrupt_matrix_reg.csv: {} +intpri_reg.csv: {} +io_mux_reg.csv: {} +ledc_reg.csv: {} +lp_analog_peri_reg.csv: {} +lp_aon_reg.csv: {} +lp_apm0_reg.csv: {} +lp_apm_reg.csv: {} +lp_clkrst_reg.csv: {} +lp_timer_reg.csv: {} +lp_wdt_reg.csv: {} +lpperi_reg.csv: {} +mem_monitor_reg.csv: {} +otp_debug_reg.csv: + name: OTP_DEBUG + wno: + - field-names +parl_io_reg.csv: {} +pau_reg.csv: {} +pcnt_reg.csv: {} +pcr_reg.csv: {} +pmu_reg.csv: {} +pwm_reg.csv: {} +rmt_reg.csv: {} +rsa_reg.csv: {} +rtc_ble_timer_reg.csv: {} +sha_reg.csv: {} +soc_etm_reg.csv: {} +spi1_mem_reg.csv: + name: SPI1 + wno: + - reg-names + - field-names +spi2_reg.csv: + name: SPI2 + wno: + - reg-names + - field-names +spi_mem_reg.csv: + name: SPI0 + wno: + - reg-names + - field-names +sys_timer_reg.csv: {} +tee_reg.csv: {} +timers_single_reg.csv: {} +trace_reg.csv: {} +twai_reg.csv: {} +uart_reg.csv: {} +uhci_reg.csv: {} +usb_device_reg.csv: + name: USB_DEVICE + wno: + - field-names diff --git a/xtask/regdesc/chips/esp32p4/interrupts.yml b/xtask/regdesc/chips/esp32p4/interrupts.yml new file mode 100644 index 0000000000..416ca8a0c3 --- /dev/null +++ b/xtask/regdesc/chips/esp32p4/interrupts.yml @@ -0,0 +1,385 @@ +peripheral_interrupts: + # - name: LP_RTC + # instance: + # value: 0 + - name: LP_WDT + instance: LP_WDT + value: 1 + - name: LP_TIMER0 + instance: LP_TIMER + value: 2 + - name: LP_TIMER1 + instance: LP_TIMER + value: 3 + # - name: MB_HP + # instance: + # value: 4 + # - name: MB_LP + # instance: + # value: 5 + - name: PMU0 + instance: PMU + value: 6 + - name: PMU1 + instance: PMU + value: 7 + - name: LP_ANA + instance: LP_ANA_PERI + value: 8 + - name: LP_ADC + instance: LP_ADC + value: 9 + - name: LP_GPIO + instance: LP_GPIO + value: 10 + - name: LP_I2C0 + instance: LP_I2C0 + value: 11 + - name: LP_I2S0 + instance: LP_I2S0 + value: 12 + - name: LP_SPI + instance: LP_SPI + value: 13 + - name: LP_TOUCH + instance: LP_TOUCH + value: 14 + - name: LP_TSENS + instance: LP_TSENS + value: 15 + - name: LP_UART + instance: LP_UART + value: 16 + # - name: LP_EFUSE + # instance: + # value: 17 + # - name: LP_SW + # instance: + # value: 18 + - name: LP_SYS + instance: LP_SYS + value: 19 + - name: LP_HUK + instance: LP_HUK + value: 20 + # - name: SYS_ICM + # instance: + # value: 21 + - name: USB_DEVICE + instance: USB_DEVICE + value: 22 + # - name: SDIO_HOST + # instance: + # value: 23 + - name: DMA + instance: DMA + value: 24 + - name: SPI2 + instance: SPI2 + value: 25 + - name: SPI3 + instance: SPI3 + value: 26 + - name: I2S0 + instance: I2S0 + value: 27 + - name: I2S1 + instance: I2S1 + value: 28 + - name: I2S2 + instance: I2S2 + value: 29 + - name: UHCI0 + instance: UHCI0 + value: 30 + - name: UART0 + instance: UART0 + value: 31 + - name: UART1 + instance: UART1 + value: 32 + - name: UART2 + instance: UART2 + value: 33 + - name: UART3 + instance: UART3 + value: 34 + - name: UART4 + instance: UART4 + value: 35 + - name: LCD_CAM + instance: + value: 36 + - name: ADC + instance: + value: 37 + - name: PWM0 + instance: MCPWM0 + value: 38 + - name: PWM1 + instance: MCPWM1 + value: 39 + - name: TWAI0 + instance: TWAI0 + value: 40 + - name: TWAI1 + instance: TWAI1 + value: 41 + - name: TWAI2 + instance: TWAI2 + value: 42 + - name: RMT + instance: RMT + value: 43 + - name: I2C0 + instance: I2C0 + value: 44 + - name: I2C1 + instance: I2C1 + value: 45 + - name: TG0_T0 + instance: TIMG0 + value: 46 + - name: TG0_T1 + instance: TIMG0 + value: 47 + - name: TG0_WDT + instance: TIMG0 + value: 48 + - name: TG1_T0 + instance: TIMG1 + value: 49 + - name: TG1_T1 + instance: TIMG1 + value: 50 + - name: TG1_WDT + instance: TIMG1 + value: 51 + - name: LEDC + instance: LEDC + value: 52 + - name: SYSTIMER_TARGET0 + instance: SYSTIMER + value: 53 + - name: SYSTIMER_TARGET1 + instance: SYSTIMER + value: 54 + - name: SYSTIMER_TARGET2 + instance: SYSTIMER + value: 55 + - name: AHB_PDMA_IN_CH0 + instance: AHB_DMA + value: 56 + - name: AHB_PDMA_IN_CH1 + instance: AHB_DMA + value: 57 + - name: AHB_PDMA_IN_CH2 + instance: AHB_DMA + value: 58 + - name: AHB_PDMA_OUT_CH0 + instance: AHB_DMA + value: 59 + - name: AHB_PDMA_OUT_CH1 + instance: AHB_DMA + value: 60 + - name: AHB_PDMA_OUT_CH2 + instance: AHB_DMA + value: 61 + - name: AXI_PDMA_IN_CH0 + instance: AHB_DMA + value: 62 + - name: AXI_PDMA_IN_CH1 + instance: AHB_DMA + value: 63 + - name: AXI_PDMA_IN_CH2 + instance: AHB_DMA + value: 64 + - name: AXI_PDMA_OUT_CH0 + instance: AHB_DMA + value: 65 + - name: AXI_PDMA_OUT_CH1 + instance: AHB_DMA + value: 66 + - name: AXI_PDMA_OUT_CH2 + instance: AHB_DMA + value: 67 + - name: RSA + instance: RSA + value: 68 + - name: AES + instance: AES + value: 69 + - name: SHA + instance: SHA + value: 70 + - name: ECC + instance: ECC + value: 71 + - name: ECDSA + instance: + value: 72 + # - name: KM + # instance: + # value: 73 + - name: GPIO_INT0 + instance: GPIO + value: 74 + - name: GPIO_INT1 + instance: GPIO + value: 75 + - name: GPIO_INT2 + instance: GPIO + value: 76 + - name: GPIO_INT3 + instance: GPIO + value: 77 + - name: GPIO_PAD_COMP + instance: GPIO + value: 78 + # - name: CPU_INT_FROM_CPU_0 + # instance: + # value: 79 + # - name: CPU_INT_FROM_CPU_1 + # instance: + # value: 80 + # - name: CPU_INT_FROM_CPU_2 + # instance: + # value: 81 + # - name: CPU_INT_FROM_CPU_3 + # instance: + # value: 82 + - name: CACHE + instance: CACHE + value: 83 + # - name: FLASH_MSPI + # instance: + # value: 84 + - name: CSI_BRIDGE + instance: MIPI_CSI_BRIDGE + value: 85 + - name: DSI_BRIDGE + instance: MIPI_DSI_BRIDGE + value: 86 + - name: CSI + instance: MIPI_CSI_HOST + value: 87 + - name: DSI + instance: MIPI_DSI_HOST + value: 88 + # - name: GMII_PHY + # instance: + # value: 89 + # - name: LPI + # instance: + # value: 90 + # - name: PMT + # instance: + # value: 91 + # - name: SBD + # instance: + # value: 92 + # - name: USB_OTG + # instance: + # value: 93 + # - name: USB_OTG_ENDP_MULTI_PROC + # instance: + # value: 94 + - name: JPEG + instance: JPEG + value: 95 + - name: PPA + instance: PPA + value: 96 + - name: CORE0_TRACE + instance: TRACE + value: 97 + - name: CORE1_TRACE + instance: TRACE + value: 98 + # - name: HP_CORE + # instance: + # value: 99 + - name: ISP + instance: ISP + value: 100 + - name: I3C + instance: I3C_MST + value: 101 + - name: I3C_SLV + instance: I3C_SLV + value: 102 + - name: USB_OTG11 + instance: DMA2D + value: 103 + - name: DMA2D_IN_CH0 + instance: DMA2D + value: 104 + - name: DMA2D_IN_CH1 + instance: DMA2D + value: 105 + - name: DMA2D_OUT_CH0 + instance: DMA2D + value: 106 + - name: DMA2D_OUT_CH1 + instance: DMA2D + value: 107 + - name: DMA2D_OUT_CH2 + instance: DMA2D + value: 108 + - name: PSRAM_MSPI + instance: DMA2D + value: 109 + - name: HP_SYS + instance: HP_SYS + value: 110 + - name: PCNT + instance: PCNT + value: 111 + - name: PAU + instance: PAU + value: 112 + - name: PARLIO_RX + instance: PARL_IO + value: 113 + - name: PARLIO_TX + instance: PARL_IO + value: 114 + - name: H264_DMA2D_OUT_CH0 + instance: H264_DMA + value: 115 + - name: H264_DMA2D_OUT_CH1 + instance: H264_DMA + value: 116 + - name: H264_DMA2D_OUT_CH2 + instance: H264_DMA + value: 117 + - name: H264_DMA2D_OUT_CH3 + instance: H264_DMA + value: 118 + - name: H264_DMA2D_OUT_CH4 + instance: H264_DMA + value: 119 + - name: H264_DMA2D_IN_CH0 + instance: H264_DMA + value: 120 + - name: H264_DMA2D_IN_CH1 + instance: H264_DMA + value: 121 + - name: H264_DMA2D_IN_CH2 + instance: H264_DMA + value: 122 + - name: H264_DMA2D_IN_CH3 + instance: H264_DMA + value: 123 + - name: H264_DMA2D_IN_CH4 + instance: H264_DMA + value: 124 + - name: H264_DMA2D_IN_CH5 + instance: H264_DMA + value: 125 + - name: H264_REG + instance: H264 + value: 126 + - name: ASSIST_DEBUG + instance: ASSIST_DEBUG + value: 127 diff --git a/xtask/regdesc/chips/esp32p4/peripherals.yml b/xtask/regdesc/chips/esp32p4/peripherals.yml new file mode 100644 index 0000000000..b1dd2f6829 --- /dev/null +++ b/xtask/regdesc/chips/esp32p4/peripherals.yml @@ -0,0 +1,275 @@ +peripheral_instances: + - name: ADC + peripheral: ADC + base_addr: 0x500DE000 + - name: AES + peripheral: AES + base_addr: 0x50090000 + - name: AHB_DMA + peripheral: AHB_DMA + base_addr: 0x50085000 + - name: ASSIST_DEBUG + peripheral: ASSIST_DEBUG + base_addr: 0x3FF06000 + - name: AXI_DMA + peripheral: AXI_DMA + base_addr: 0x5008a000 + - name: AXI_ICM + peripheral: ICM_AXI + base_addr: 0x500A4000 + - name: BITSCRAMBLER + peripheral: BITSCRAMBLER + base_addr: 0x500A3000 + - name: CACHE + peripheral: CACHE + base_addr: 0x3FF10000 + - name: DMA + peripheral: DMAC + base_addr: 0x50081000 + # FIXME: build errors in PAC + # - name: DMA2D + # peripheral: DMA2D + # base_addr: 0x50088000 + - name: DS + peripheral: DS + base_addr: 0x50094000 + - name: ECC + peripheral: ECC + base_addr: 0x50093000 + - name: ECDSA + peripheral: ECDSA + base_addr: 0x50096000 + - name: EFUSE + peripheral: EFUSE + base_addr: 0x5012D000 + - name: GPIO + peripheral: GPIO + base_addr: 0x500E0000 + - name: GPIO_SD + peripheral: GPIOSD + base_addr: 0x500E0F00 + - name: H264 + peripheral: H264 + base_addr: 0x50084000 + - name: H264_DMA + peripheral: H264_DMA + base_addr: 0x500A7000 + - name: HMAC + peripheral: HMAC + base_addr: 0x50095000 + - name: HP_SYS + peripheral: HP_SYS + base_addr: 0x500E5000 + - name: HP_SYS_CLKRST + peripheral: HP_SYS_CLKRST + base_addr: 0x500E6000 + - name: INTERRUPT_CORE0 + peripheral: CORE0 + base_addr: 0x500D6000 + - name: INTERRUPT_CORE1 + peripheral: CORE1 + base_addr: 0x500D6800 + - name: IO_MUX + peripheral: IO_MUX + base_addr: 0x500e1000 + - name: ISP + peripheral: ISP + base_addr: 0x500A1000 + - name: I2C0 + peripheral: I2C + base_addr: 0x500C4000 + - name: I2C1 + peripheral: I2C + base_addr: 0x500C5000 + - name: I2S0 + peripheral: I2S + base_addr: 0x500C6000 + - name: I2S1 + peripheral: I2S + base_addr: 0x500C7000 + - name: I2S2 + peripheral: I2S + base_addr: 0x500C8000 + - name: I3C_MST + peripheral: I3C_MST + base_addr: 0x500DA000 + - name: I3C_MST_MEM + peripheral: I3C_MST_MEM + base_addr: 0x500DA000 + - name: I3C_SLV + peripheral: I3C_SLV + base_addr: 0x500DB000 + - name: JPEG + peripheral: JPEG + base_addr: 0x50086000 + - name: LCD_CAM + peripheral: LCDCAM + base_addr: 0x500dc000 + - name: LEDC + peripheral: LEDC + base_addr: 0x500D3000 + - name: LP_ADC + peripheral: RTCADC + base_addr: 0x50127000 + - name: LP_ANA_PERI + peripheral: LP_ANA_PERI + base_addr: 0x50113000 + - name: LP_AON_CLKRST + peripheral: LP_AON_CLKRST + base_addr: 0x50111000 + - name: LP_GPIO + peripheral: LP_GPIO + base_addr: 0x5012A000 + - name: LP_HUK + peripheral: HUK + base_addr: 0x50114000 + - name: LP_INTR + peripheral: LPINTR + base_addr: 0x5012C000 + - name: LP_IO_MUX + peripheral: LP_IOMUX + base_addr: 0x5012B000 + - name: LP_I2C0 + peripheral: LP_I2C + base_addr: 0x50122000 + - name: LP_I2C_ANA_MST + peripheral: ANA_I2C_MST + base_addr: 0x50124000 + - name: LP_I2S0 + peripheral: LP_I2S + base_addr: 0x50125000 + - name: LP_PERI + peripheral: LPPERI + base_addr: 0x50120000 + - name: LP_SYS + peripheral: LPSYSREG + base_addr: 0x50110000 + - name: LP_TIMER + peripheral: RTC_TIMER + base_addr: 0x50112000 + - name: LP_TOUCH + peripheral: RTC_TOUCH + base_addr: 0x50128000 + - name: LP_TSENS + peripheral: TSENS + base_addr: 0x5012F000 + - name: LP_UART + peripheral: LP_UART + base_addr: 0x50121000 + - name: LP_WDT + peripheral: RTC_WDT + base_addr: 0x50116000 + - name: MCPWM0 + peripheral: MCPWM + base_addr: 0x500C0000 + - name: MCPWM1 + peripheral: MCPWM + base_addr: 0x500C1000 + - name: MIPI_CSI_BRIDGE + peripheral: CSI_BRIG + base_addr: 0x5009F800 + - name: MIPI_CSI_HOST + peripheral: CSI_HOST + base_addr: 0x5009F000 + - name: MIPI_DSI_BRIDGE + peripheral: DSI_BRG + base_addr: 0x500A0800 + - name: MIPI_DSI_HOST + peripheral: DSI_HOST + base_addr: 0x500A0000 + - name: PARL_IO + peripheral: PARL_IO + base_addr: 0x500CF000 + - name: PAU + peripheral: PAU + base_addr: 0x60093000 + - name: PCNT + peripheral: PCNT + base_addr: 0x500C9000 + - name: PMU + peripheral: PMU + base_addr: 0x50115000 + - name: PPA + peripheral: PPA + base_addr: 0x50087000 + - name: PVT + peripheral: PVT + base_addr: 0x5009E000 + - name: RMT + peripheral: RMT + base_addr: 0x500D4000 + - name: RSA + peripheral: RSA + base_addr: 0x50092000 + - name: SDHOST + peripheral: SDHOST + base_addr: 0x50083000 + - name: SHA + peripheral: SHA + base_addr: 0x50091000 + - name: SOC_ETM + peripheral: SOC_ETM + base_addr: 0x500D5000 + - name: SPI0 + peripheral: SPI0 + base_addr: 0x5008C000 + - name: SPI1 + peripheral: SPI1 + base_addr: 0x5008D000 + - name: SPI2 + peripheral: SPI2 + base_addr: 0x500D0000 + - name: SPI3 + peripheral: SPI3 + base_addr: 0x500D1000 + - name: SYSTIMER + peripheral: SYSTIMER + base_addr: 0x500E2000 + - name: TEE + peripheral: TEE + base_addr: 0x60098000 + - name: TIMG0 + peripheral: TIMG + base_addr: 0x500C2000 + - name: TIMG1 + peripheral: TIMG + base_addr: 0x500C3000 + - name: TRACE0 + peripheral: TRACE + base_addr: 0x3FF04000 + - name: TRACE1 + peripheral: TRACE + base_addr: 0x3FF05000 + - name: TWAI0 + peripheral: TWAI + base_addr: 0x500D7000 + - name: TWAI1 + peripheral: TWAI + base_addr: 0x500D8000 + - name: TWAI2 + peripheral: TWAI + base_addr: 0x500D9000 + - name: UART0 + peripheral: UART + base_addr: 0x500CA000 + - name: UART1 + peripheral: UART + base_addr: 0x500CB000 + - name: UART2 + peripheral: UART + base_addr: 0x500CC000 + - name: UART3 + peripheral: UART + base_addr: 0x500CD000 + - name: UART4 + peripheral: UART + base_addr: 0x500CE000 + - name: UHCI0 + peripheral: UHCI + base_addr: 0x500DF000 + - name: USB_DEVICE + peripheral: USB_DEVICE + base_addr: 0x500D2000 + - name: USB_WRAP + peripheral: USB_WRAP + base_addr: 0x50080000 diff --git a/xtask/regdesc/chips/esp32p4/regdesc.yml b/xtask/regdesc/chips/esp32p4/regdesc.yml new file mode 100644 index 0000000000..00b3147d51 --- /dev/null +++ b/xtask/regdesc/chips/esp32p4/regdesc.yml @@ -0,0 +1,97 @@ +--- +adc_reg.csv: {} +aes_reg.csv: {} +ahb_dma_reg.csv: {} +ana_i2c_mst_reg.csv: {} +assist_debug_reg.csv: {} +axi_dma_reg.csv: {} +bitscrambler_reg.csv: {} +cache_reg.csv: {} +core0_interrupt_reg.csv: {} +core1_interrupt_reg.csv: {} +dma2d_reg.csv: {} +ds_reg.csv: {} +ecc_mult_reg.csv: + name: ECC +ecdsa_reg.csv: {} +efuse_mem_reg.csv: {} +gdma_reg.csv: {} +gpio_reg.csv: {} +gpio_sd_reg.csv: {} +h264_dma_reg.csv: {} +h264_reg.csv: {} +hmac_reg.csv: {} +hp_sys_clkrst_reg.csv: {} +hp_sys_reg.csv: + name: HP_SYS +huk_reg.csv: {} +i2c_ext_reg.csv: {} +i2s_reg.csv: {} +i3c_mst_mem_reg.csv: {} +i3c_mst_reg.csv: {} +i3c_slv_reg.csv: {} +icm_sys_qos_reg.csv: {} +icm_sys_reg.csv: {} +iomux_mspi_pin_reg.csv: {} +iomux_reg.csv: {} +isp_reg.csv: {} +jpeg_reg.csv: {} +keymng_reg.csv: {} +l2mem_monitor_reg.csv: {} +lcdcam_reg.csv: {} +ledc_reg.csv: {} +lp_analog_peri_reg.csv: + name: LP_ANA_PERI +lp_aonclkrst_reg.csv: + name: LP_AON_CLKRST +lp_gpio_reg.csv: {} +lp_i2c_ext_reg.csv: {} +lp_i2s_reg.csv: {} +lp_intr_reg.csv: {} +lp_iomux_reg.csv: {} +lp_mailbox_reg.csv: {} +lp_peri_reg.csv: {} +lp_spi_reg.csv: {} +lp_sys_reg.csv: {} +lp_uart_reg.csv: {} +mipi_csi_bridge_reg.csv: {} +mipi_csi_host_reg.csv: {} +mipi_dsi_bridge_reg.csv: {} +mipi_dsi_host_reg.csv: {} +parl_io_reg.csv: {} +pau_reg.csv: {} +pcnt_reg.csv: {} +pmu_reg.csv: {} +ppa_reg.csv: {} +pvt_reg.csv: {} +pwm_reg.csv: + name: MCPWM +rmt_reg.csv: {} +rsa_reg.csv: {} +rtc_timer_reg.csv: {} +rtc_wdt_reg.csv: {} +rtcadc_reg.csv: {} +rtclockcali_reg.csv: {} +sdmmc_reg.csv: {} +sha_reg.csv: {} +soc_etm_reg.csv: {} +spi1_mem_reg_s.csv: # TODO: am I using the correct file? (c/s) + name: SPI1 +spi2_reg_s.csv: + name: SPI2 +spi3_reg.csv: + name: SPI3 +spi_mem_reg_s.csv: # TODO: am I using the correct file? (c/s) + name: SPI0 +sys_timer_reg.csv: {} +tcm_monitor_reg.csv: {} +timers_reg.csv: {} +touch_reg.csv: {} +trace_reg.csv: {} +tsens_reg.csv: {} +twai_reg.csv: {} +twaifd_reg.csv: {} +uart_reg.csv: {} +uhci_reg.csv: {} +usb_device_reg.csv: {} +usbwrap_reg.csv: {} diff --git a/xtask/regdesc/chips/esp32s2-ulp/interrupts.yml b/xtask/regdesc/chips/esp32s2-ulp/interrupts.yml new file mode 100644 index 0000000000..65ef3e335e --- /dev/null +++ b/xtask/regdesc/chips/esp32s2-ulp/interrupts.yml @@ -0,0 +1,28 @@ +peripheral_interrupts: + - name: TOUCH_DONE_INT + instance: SENS + value: 0 + - name: TOUCH_INACTIVE_INT + instance: SENS + value: 1 + - name: TOUCH_ACTIVE_INT + instance: SENS + value: 2 + - name: SARADC1_DONE_INT + instance: SENS + value: 3 + - name: SARADC2_DONE_INT + instance: SENS + value: 4 + - name: TSENS_DONE_INT + instance: SENS + value: 5 + - name: RISCV_START_INT + instance: RTC_CNTL + value: 6 + - name: SW_INT + instance: RTC_CNTL + value: 7 + - name: SWD_INT + instance: RTC_CNTL + value: 8 diff --git a/xtask/regdesc/chips/esp32s2-ulp/peripherals.yml b/xtask/regdesc/chips/esp32s2-ulp/peripherals.yml new file mode 100644 index 0000000000..8508ffae76 --- /dev/null +++ b/xtask/regdesc/chips/esp32s2-ulp/peripherals.yml @@ -0,0 +1,13 @@ +peripheral_instances: + - name: RTC_IO + peripheral: RTCIO + base_addr: 0xA400 + - name: RTC_CNTL + peripheral: RTC_CNTL + base_addr: 0x8000 + - name: RTC_I2C + peripheral: RTC_I2C + base_addr: 0xEC00 + - name: SENS + peripheral: SENS + base_addr: 0xC800 diff --git a/xtask/regdesc/chips/esp32s2-ulp/regdesc.yml b/xtask/regdesc/chips/esp32s2-ulp/regdesc.yml new file mode 100644 index 0000000000..68f5d7eea8 --- /dev/null +++ b/xtask/regdesc/chips/esp32s2-ulp/regdesc.yml @@ -0,0 +1,3 @@ +--- +rtc_i2c_reg.csv: {} +rtc_io_reg.csv: {} diff --git a/xtask/regdesc/chips/esp32s2/interrupts.yml b/xtask/regdesc/chips/esp32s2/interrupts.yml new file mode 100644 index 0000000000..4a529d7e2c --- /dev/null +++ b/xtask/regdesc/chips/esp32s2/interrupts.yml @@ -0,0 +1,286 @@ +peripheral_interrupts: + - name: WIFI_MAC + instance: INTERRUPT_CORE0 + value: 0 + - name: WIFI_NMI + instance: INTERRUPT_CORE0 + value: 1 + - name: WIFI_PWR + instance: INTERRUPT_CORE0 + value: 2 + - name: WIFI_BB + instance: INTERRUPT_CORE0 + value: 3 + - name: BT_MAC + instance: INTERRUPT_CORE0 + value: 4 + - name: BT_BB + instance: INTERRUPT_CORE0 + value: 5 + - name: BT_BB_NMI + instance: INTERRUPT_CORE0 + value: 6 + - name: RWBT + instance: INTERRUPT_CORE0 + value: 7 + - name: RWBLE + instance: INTERRUPT_CORE0 + value: 8 + - name: RWBT_NMI + instance: INTERRUPT_CORE0 + value: 9 + - name: RWBLE_NMI + instance: INTERRUPT_CORE0 + value: 10 + - name: SLC0 + instance: INTERRUPT_CORE0 + value: 11 + - name: SLC1 + instance: INTERRUPT_CORE0 + value: 12 + - name: UHCI0 + instance: UHCI0 + value: 13 + - name: UHCI1 + instance: UHCI0 + value: 14 + - name: TG0_T0_LEVEL + instance: TIMG0 + value: 15 + - name: TG0_T1_LEVEL + instance: TIMG0 + value: 16 + - name: TG0_WDT_LEVEL + instance: TIMG0 + value: 17 + - name: TG0_LACT_LEVEL + instance: TIMG0 + value: 18 + - name: TG1_T0_LEVEL + instance: TIMG1 + value: 19 + - name: TG1_T1_LEVEL + instance: TIMG1 + value: 20 + - name: TG1_WDT_LEVEL + instance: TIMG1 + value: 21 + - name: TG1_LACT_LEVEL + instance: TIMG1 + value: 22 + - name: GPIO + instance: GPIO + value: 23 + - name: GPIO_NMI + instance: GPIO + value: 24 + - name: GPIO_INTR_2 + instance: GPIO + value: 25 + - name: GPIO_NMI_2 + instance: GPIO + value: 26 + - name: DEDICATED_GPIO + instance: DEDICATED_GPIO + value: 27 + - name: FROM_CPU_INTR0 + instance: INTERRUPT_CORE0 + value: 28 + - name: FROM_CPU_INTR1 + instance: INTERRUPT_CORE0 + value: 29 + - name: FROM_CPU_INTR2 + instance: INTERRUPT_CORE0 + value: 30 + - name: FROM_CPU_INTR3 + instance: INTERRUPT_CORE0 + value: 31 + - name: SPI1 + instance: SPI1 + value: 32 + - name: SPI2 + instance: SPI2 + value: 33 + - name: SPI3 + instance: SPI3 + value: 34 + - name: I2S0 + instance: I2S0 + value: 35 + - name: I2S1 + instance: I2S0 + value: 36 + - name: UART0 + instance: UART0 + value: 37 + - name: UART1 + instance: UART1 + value: 38 + - name: UART2 + instance: UART1 + value: 39 + - name: SDIO_HOST + instance: INTERRUPT_CORE0 + value: 40 + - name: MCPWM0 + instance: MCPWM0 + value: 41 + - name: MCPWM1 + instance: MCPWM0 + value: 42 + - name: MCPWM2 + instance: MCPWM1 + value: 43 + - name: MCPWM3 + instance: MCPWM1 + value: 44 + - name: LEDC + instance: LEDC + value: 45 + - name: EFUSE + instance: EFUSE + value: 46 + - name: TWAI0 + instance: TWAI0 + value: 47 + - name: USB + instance: USB0 + value: 48 + - name: RTC_CORE + instance: RTC_CNTL + value: 49 + - name: RMT + instance: RMT + value: 50 + - name: PCNT + instance: PCNT + value: 51 + - name: I2C_EXT0 + instance: I2C0 + value: 52 + - name: I2C_EXT1 + instance: I2C1 + value: 53 + - name: RSA + instance: RSA + value: 54 + - name: SHA + instance: SHA + value: 55 + - name: AES + instance: AES + value: 56 + - name: SPI2_DMA + instance: SPI2 + value: 57 + - name: SPI3_DMA + instance: SPI3 + value: 58 + - name: WDT + instance: INTERRUPT_CORE0 + value: 59 + - name: TIMER1 + instance: LEDC + value: 60 + - name: TIMER2 + instance: LEDC + value: 61 + - name: TG0_T0_EDGE + instance: TIMG0 + value: 62 + - name: TG0_T1_EDGE + instance: TIMG0 + value: 63 + - name: TG0_WDT_EDGE + instance: TIMG0 + value: 64 + - name: TG0_LACT_EDGE + instance: TIMG0 + value: 65 + - name: TG1_T0_EDGE + instance: TIMG1 + value: 66 + - name: TG1_T1_EDGE + instance: TIMG1 + value: 67 + - name: TG1_WDT_EDGE + instance: TIMG1 + value: 68 + - name: TG1_LACT_EDGE + instance: TIMG1 + value: 69 + - name: CACHE_IA + instance: INTERRUPT_CORE0 + value: 70 + - name: SYSTIMER_TARGET0 + instance: SYSTIMER + value: 71 + - name: SYSTIMER_TARGET1 + instance: SYSTIMER + value: 72 + - name: SYSTIMER_TARGET2 + instance: SYSTIMER + value: 73 + - name: ASSIST_DEBUG + instance: ASSIST_DEBUG + value: 74 + - name: PMS_PRO_IRAM0_ILG + instance: PMS + value: 75 + - name: PMS_PRO_DRAM0_ILG + instance: PMS + value: 76 + - name: PMS_PRO_DPORT_ILG + instance: PMS + value: 77 + - name: PMS_PRO_AHB_ILG + instance: PMS + value: 78 + - name: PMS_PRO_CACHE_ILG + instance: PMS + value: 79 + - name: PMS_DMA_APB_I_ILG + instance: PMS + value: 80 + - name: PMS_DMA_RX_I_ILG + instance: PMS + value: 81 + - name: PMS_DMA_TX_I_ILG + instance: PMS + value: 82 + - name: SPI0_REJECT_CACHE + instance: SPI0 + value: 83 + - name: DMA_COPY + instance: DMA + value: 84 + - name: SPI4_DMA + instance: SPI4 + value: 85 + - name: SPI4 + instance: SPI4 + value: 86 + - name: ICACHE_PRELOAD + instance: INTERRUPT_CORE0 + value: 87 + - name: DCACHE_PRELOAD + instance: INTERRUPT_CORE0 + value: 88 + - name: APB_ADC + instance: APB_SARADC + value: 89 + - name: CRYPTO_DMA + instance: DMA + value: 90 + - name: CPU_PERI_ERR + instance: INTERRUPT_CORE0 + value: 91 + - name: APB_PERI_ERR + instance: INTERRUPT_CORE0 + value: 92 + - name: DCACHE_SYNC + instance: INTERRUPT_CORE0 + value: 93 + - name: ICACHE_SYNC + instance: INTERRUPT_CORE0 + value: 94 diff --git a/xtask/regdesc/chips/esp32s2/peripherals.yml b/xtask/regdesc/chips/esp32s2/peripherals.yml new file mode 100644 index 0000000000..b242583464 --- /dev/null +++ b/xtask/regdesc/chips/esp32s2/peripherals.yml @@ -0,0 +1,130 @@ +peripheral_instances: + - name: AES + peripheral: AES + base_addr: 0x6003a000 + - name: APB_SARADC + peripheral: APB_SARADC + base_addr: 0x3f440000 + - name: BB + peripheral: BB + base_addr: 0x3f41D000 + - name: DEDICATED_GPIO + peripheral: DEDIC_GPIO + base_addr: 0x3f4cf000 + - name: DS + peripheral: DS + base_addr: 0x6003d000 + - name: EFUSE + peripheral: EFUSE + base_addr: 0x3f41a000 + - name: EXTMEM + peripheral: EXTMEM + base_addr: 0x61800000 + - name: GPIO + peripheral: GPIO + base_addr: 0x3f404000 + - name: GPIO_SD + peripheral: GPIOSD + base_addr: 0x3f404f00 + - name: HMAC + peripheral: HMAC + base_addr: 0x6003e000 + - name: I2C0 + peripheral: I2C + base_addr: 0x3f413000 + - name: I2C1 + peripheral: I2C + base_addr: 0x3f427000 + - name: I2S0 + peripheral: I2S + base_addr: 0x3f40f000 + - name: INTERRUPT_CORE0 + peripheral: INTERRUPT_CORE0 + base_addr: 0x3f4c2000 + - name: IO_MUX + peripheral: IO_MUX + base_addr: 0x3f409000 + - name: LEDC + peripheral: LEDC + base_addr: 0x3f419000 + - name: PCNT + peripheral: PCNT + base_addr: 0x3f417000 + - name: PMS + peripheral: PMS + base_addr: 0x3f4c1000 + - name: RMT + peripheral: RMT + base_addr: 0x3f416000 + - name: RNG + peripheral: RNG + base_addr: 0x60035000 + - name: RSA + peripheral: RSA + base_addr: 0x6003c000 + - name: RTC_CNTL + peripheral: RTC_CNTL + base_addr: 0x3f408000 + - name: RTC_IO + peripheral: RTCIO + base_addr: 0x3f408400 + - name: RTC_I2C + peripheral: RTC_I2C + base_addr: 0x3f408c00 + - name: SENS + peripheral: SENS + base_addr: 0x3f408800 + - name: SHA + peripheral: SHA + base_addr: 0x6003b000 + - name: SPI0 + peripheral: SPI + base_addr: 0x3f403000 + - name: SPI1 + peripheral: SPI + base_addr: 0x3f402000 + - name: SPI2 + peripheral: SPI + base_addr: 0x3f424000 + - name: SPI3 + peripheral: SPI + base_addr: 0x3f425000 + - name: SPI4 + peripheral: SPI + base_addr: 0x3f437000 + - name: SYSCON + peripheral: SYSCON + base_addr: 0x3f426000 + - name: SYSTEM + peripheral: SYSTEM + base_addr: 0x3f4c0000 + - name: SYSTIMER + peripheral: SYSTIMER + base_addr: 0x3f423000 + - name: TIMG0 + peripheral: TIMG + base_addr: 0x3f41f000 + - name: TIMG1 + peripheral: TIMG + base_addr: 0x3f420000 + - name: TWAI0 + peripheral: TWAI + base_addr: 0x3f42b000 + - name: UART0 + peripheral: UART + base_addr: 0x3f400000 + - name: UART1 + peripheral: UART + base_addr: 0x3f410000 + - name: UHCI0 + peripheral: UHCI + base_addr: 0x3f414000 + - name: USB0 + peripheral: USB + base_addr: 0x60080000 + - name: USB_WRAP + peripheral: USB_WRAP + base_addr: 0x3f439000 + - name: XTS_AES + peripheral: XTS_AES + base_addr: 0x6003a100 diff --git a/xtask/regdesc/chips/esp32s2/regdesc.yml b/xtask/regdesc/chips/esp32s2/regdesc.yml new file mode 100644 index 0000000000..2acde15e46 --- /dev/null +++ b/xtask/regdesc/chips/esp32s2/regdesc.yml @@ -0,0 +1,39 @@ +--- +aes_reg.csv: {} +apb_saradc_reg.csv: + name: APB_SARADC +dedicated_gpio_reg.csv: + name: DEDIC_GPIO +digital_signature_reg.csv: {} +efuse_reg.csv: {} +extmem_reg_723.csv: {} +gpio_7.2.3.csv: {} +gpio_sd_reg.csv: {} +hmac_reg.csv: {} +i2c_ext.csv: {} +i2s_reg.csv: {} +interrupt_reg.csv: + name: INTERRUPT_CORE0 + wno: + - reg-names + - field-names +io_mux_reg.csv: {} +ledc_reg.csv: {} +pcnt_reg.csv: {} +permission_reg.csv: {} +rmt_reg_11.csv: {} +rsa_reg.csv: {} +rtc_i2c_reg.csv: + name: RTC_I2C +rtc_io_reg.csv: {} +sha_reg.csv: {} +spi_reg.csv: {} +system_reg.csv: {} +system_timer.csv: {} +timers_reg.csv: {} +twai_reg.csv: {} +uart_reg.csv: {} +uhci_reg.csv: {} +usb_wrap_reg_for_trm.csv: {} +xts_aes_reg.csv: + name: XTS_AES diff --git a/xtask/regdesc/chips/esp32s3-ulp/interrupts.yml b/xtask/regdesc/chips/esp32s3-ulp/interrupts.yml new file mode 100644 index 0000000000..d97af5df48 --- /dev/null +++ b/xtask/regdesc/chips/esp32s3-ulp/interrupts.yml @@ -0,0 +1,37 @@ +peripheral_interrupts: + - name: TOUCH_DONE_INT + instance: SENS + value: 0 + - name: TOUCH_INACTIVE_INT + instance: SENS + value: 1 + - name: TOUCH_ACTIVE_INT + instance: SENS + value: 2 + - name: SARADC1_DONE_INT + instance: SENS + value: 3 + - name: SARADC2_DONE_INT + instance: SENS + value: 4 + - name: TSENS_DONE_INT + instance: SENS + value: 5 + - name: RISCV_START_INT + instance: RTC_CNTL + value: 6 + - name: SW_INT + instance: RTC_CNTL + value: 7 + - name: SWD_INT + instance: RTC_CNTL + value: 8 + - name: TOUCH_TIME_OUT_INT + instance: SENS + value: 9 + - name: TOUCH_APPROACH_LOOP_DONE_INT + instance: SENS + value: 10 + - name: TOUCH_SCAN_DONE_INT + instance: SENS + value: 11 diff --git a/xtask/regdesc/chips/esp32s3-ulp/peripherals.yml b/xtask/regdesc/chips/esp32s3-ulp/peripherals.yml new file mode 100644 index 0000000000..9d198e65f3 --- /dev/null +++ b/xtask/regdesc/chips/esp32s3-ulp/peripherals.yml @@ -0,0 +1,13 @@ +peripheral_instances: + - name: RTC_IO + peripheral: RTC_IO + base_addr: 0xA400 + - name: RTC_CNTL + peripheral: RTC_CNTL + base_addr: 0x8000 + - name: RTC_I2C + peripheral: RTC_I2C + base_addr: 0xEC00 + - name: SENS + peripheral: SENS + base_addr: 0xC800 diff --git a/xtask/regdesc/chips/esp32s3-ulp/regdesc.yml b/xtask/regdesc/chips/esp32s3-ulp/regdesc.yml new file mode 100644 index 0000000000..341db9b33d --- /dev/null +++ b/xtask/regdesc/chips/esp32s3-ulp/regdesc.yml @@ -0,0 +1,9 @@ +--- +rtc_cntl_reg_for_trm.csv: {} +rtc_i2c_reg_for_trm.csv: {} +rtc_io_reg_for_trm.csv: {} +saradc_reg_for_trm.csv: + name: SENS + wno: + - reg-names + - field-names diff --git a/xtask/regdesc/chips/esp32s3/interrupts.yml b/xtask/regdesc/chips/esp32s3/interrupts.yml new file mode 100644 index 0000000000..dc39dafb92 --- /dev/null +++ b/xtask/regdesc/chips/esp32s3/interrupts.yml @@ -0,0 +1,286 @@ +peripheral_interrupts: + - name: WIFI_MAC + instance: INTERRUPT_CORE0 + value: 0 + - name: WIFI_NMI + instance: INTERRUPT_CORE0 + value: 1 + - name: WIFI_PWR + instance: INTERRUPT_CORE0 + value: 2 + - name: WIFI_BB + instance: INTERRUPT_CORE0 + value: 3 + - name: BT_MAC + instance: INTERRUPT_CORE0 + value: 4 + - name: BT_BB + instance: INTERRUPT_CORE0 + value: 5 + - name: BT_BB_NMI + instance: INTERRUPT_CORE0 + value: 6 + - name: RWBT + instance: INTERRUPT_CORE0 + value: 7 + - name: RWBLE + instance: INTERRUPT_CORE0 + value: 8 + - name: RWBT_NMI + instance: INTERRUPT_CORE0 + value: 9 + - name: RWBLE_NMI + instance: INTERRUPT_CORE0 + value: 10 + - name: I2C_MASTER + instance: I2C0 + value: 11 + - name: SLC0 + instance: INTERRUPT_CORE0 + value: 12 + - name: SLC1 + instance: INTERRUPT_CORE0 + value: 13 + - name: UHCI0 + instance: UHCI0 + value: 14 + - name: UHCI1 + instance: UHCI1 + value: 15 + - name: GPIO + instance: GPIO + value: 16 + - name: GPIO_NMI + instance: GPIO + value: 17 + - name: GPIO_INTR_2 + instance: GPIO + value: 18 + - name: GPIO_NMI_2 + instance: GPIO + value: 19 + - name: SPI1 + instance: SPI1 + value: 20 + - name: SPI2 + instance: SPI2 + value: 21 + - name: SPI3 + instance: SPI3 + value: 22 + - name: LCD_CAM + instance: LCD_CAM + value: 24 + - name: I2S0 + instance: I2S0 + value: 25 + - name: I2S1 + instance: I2S1 + value: 26 + - name: UART0 + instance: UART0 + value: 27 + - name: UART1 + instance: UART1 + value: 28 + - name: UART2 + instance: UART2 + value: 29 + - name: SDIO_HOST + instance: INTERRUPT_CORE0 + value: 30 + - name: MCPWM0 + instance: MCPWM0 + value: 31 + - name: MCPWM1 + instance: MCPWM1 + value: 32 + - name: LEDC + instance: LEDC + value: 35 + - name: EFUSE + instance: EFUSE + value: 36 + - name: TWAI0 + instance: TWAI0 + value: 37 + - name: USB + instance: USB0 + value: 38 + - name: RTC_CORE + instance: RTC_CNTL + value: 39 + - name: RMT + instance: RMT + value: 40 + - name: PCNT + instance: PCNT + value: 41 + - name: I2C_EXT0 + instance: I2C0 + value: 42 + - name: I2C_EXT1 + instance: I2C1 + value: 43 + - name: SPI2_DMA + instance: SPI2 + value: 44 + - name: SPI3_DMA + instance: SPI3 + value: 45 + - name: WDT + instance: INTERRUPT_CORE0 + value: 47 + - name: TIMER1 + instance: LEDC + value: 48 + - name: TIMER2 + instance: LEDC + value: 49 + - name: TG0_T0_LEVEL + instance: TIMG0 + value: 50 + - name: TG0_T1_LEVEL + instance: TIMG0 + value: 51 + - name: TG0_WDT_LEVEL + instance: TIMG0 + value: 52 + - name: TG1_T0_LEVEL + instance: TIMG1 + value: 53 + - name: TG1_T1_LEVEL + instance: TIMG1 + value: 54 + - name: TG1_WDT_LEVEL + instance: TIMG1 + value: 55 + - name: CACHE_IA + instance: INTERRUPT_CORE0 + value: 56 + - name: SYSTIMER_TARGET0 + instance: SYSTIMER + value: 57 + - name: SYSTIMER_TARGET1 + instance: SYSTIMER + value: 58 + - name: SYSTIMER_TARGET2 + instance: SYSTIMER + value: 59 + - name: SPI_MEM_REJECT_CACHE + instance: SPI0 + value: 60 + - name: DCACHE_PRELOAD0 + instance: INTERRUPT_CORE0 + value: 61 + - name: ICACHE_PRELOAD0 + instance: INTERRUPT_CORE0 + value: 62 + - name: DCACHE_SYNC0 + instance: INTERRUPT_CORE0 + value: 63 + - name: ICACHE_SYNC0 + instance: INTERRUPT_CORE0 + value: 64 + - name: APB_ADC + instance: APB_SARADC + value: 65 + - name: DMA_IN_CH0 + instance: DMA + value: 66 + - name: DMA_IN_CH1 + instance: DMA + value: 67 + - name: DMA_IN_CH2 + instance: DMA + value: 68 + - name: DMA_IN_CH3 + instance: DMA + value: 69 + - name: DMA_IN_CH4 + instance: DMA + value: 70 + - name: DMA_OUT_CH0 + instance: DMA + value: 71 + - name: DMA_OUT_CH1 + instance: DMA + value: 72 + - name: DMA_OUT_CH2 + instance: DMA + value: 73 + - name: DMA_OUT_CH3 + instance: DMA + value: 74 + - name: DMA_OUT_CH4 + instance: DMA + value: 75 + - name: RSA + instance: RSA + value: 76 + - name: SHA + instance: SHA + value: 77 + - name: AES + instance: + value: 78 + - name: FROM_CPU_INTR0 + instance: INTERRUPT_CORE0 + value: 79 + - name: FROM_CPU_INTR1 + instance: INTERRUPT_CORE0 + value: 80 + - name: FROM_CPU_INTR2 + instance: INTERRUPT_CORE0 + value: 81 + - name: FROM_CPU_INTR3 + instance: INTERRUPT_CORE0 + value: 82 + - name: ASSIST_DEBUG + instance: ASSIST_DEBUG + value: 83 + - name: DMA_APBPERI_PMS + instance: DMA + value: 84 + - name: CORE0_IRAM0_PMS + instance: INTERRUPT_CORE0 + value: 85 + - name: CORE0_DRAM0_PMS + instance: INTERRUPT_CORE0 + value: 86 + - name: CORE0_PIF_PMS + instance: INTERRUPT_CORE0 + value: 87 + - name: CORE0_PIF_PMS_SIZE + instance: INTERRUPT_CORE0 + value: 88 + - name: CORE1_IRAM0_PMS + instance: INTERRUPT_CORE1 + value: 89 + - name: CORE1_DRAM0_PMS + instance: INTERRUPT_CORE1 + value: 90 + - name: CORE1_PIF_PMS + instance: INTERRUPT_CORE1 + value: 91 + - name: CORE1_PIF_PMS_SIZE + instance: INTERRUPT_CORE1 + value: 92 + - name: BACKUP_PMS_VIOLATE + instance: DMA + value: 93 + - name: CACHE_CORE0_ACS + instance: INTERRUPT_CORE0 + value: 94 + - name: CACHE_CORE1_ACS + instance: INTERRUPT_CORE1 + value: 95 + - name: USB_DEVICE + instance: USB_DEVICE + value: 96 + - name: PERI_BACKUP + instance: PERI_BACKUP + value: 97 + - name: DMA_EXTMEM_REJECT + instance: DMA + value: 98 diff --git a/xtask/regdesc/chips/esp32s3/peripherals.yml b/xtask/regdesc/chips/esp32s3/peripherals.yml new file mode 100644 index 0000000000..5a3352d6d0 --- /dev/null +++ b/xtask/regdesc/chips/esp32s3/peripherals.yml @@ -0,0 +1,163 @@ +peripheral_instances: + - name: AES + peripheral: AES + base_addr: 0x6003A000 + - name: APB_CTRL + peripheral: APB_CTRL + base_addr: 0x60026000 + - name: APB_SARADC + peripheral: APB_SARADC + base_addr: 0x60040000 + - name: ASSIST_DEBUG + peripheral: DEBUG_ASSIST + base_addr: 0x600CE000 + - name: BB + peripheral: BB + base_addr: 0x6001D000 + - name: DMA + peripheral: DMA + base_addr: 0x6003F000 + - name: DS + peripheral: DS + base_addr: 0x6003D000 + - name: EFUSE + peripheral: EFUSE + base_addr: 0x60007000 + - name: EXTMEM + peripheral: EXTMEM + base_addr: 0x600C4000 + - name: GPIO + peripheral: GPIO + base_addr: 0x60004000 + - name: GPIO_SD + peripheral: GPIOSD + base_addr: 0x60004f00 + - name: HMAC + peripheral: HMAC + base_addr: 0x6003E000 + - name: I2C0 + peripheral: I2C + base_addr: 0x60013000 + - name: I2C1 + peripheral: I2C + base_addr: 0x60027000 + - name: I2S0 + peripheral: I2S + base_addr: 0x6000F000 + - name: I2S1 + peripheral: I2S1 + base_addr: 0x6002D000 + - name: INTERRUPT_CORE0 + peripheral: INTERRUPT_CORE0 + base_addr: 0x600C2000 + - name: INTERRUPT_CORE1 + peripheral: INTERRUPT_CORE1 + base_addr: 0x600C2000 + - name: IO_MUX + peripheral: IO_MUX + base_addr: 0x60009000 + - name: LCD_CAM + peripheral: LCD_CAM + base_addr: 0x60041000 + - name: LEDC + peripheral: LEDC + base_addr: 0x60019000 + - name: PCNT + peripheral: PCNT + base_addr: 0x60017000 + - name: PERI_BACKUP + peripheral: PERI_BACKUP + base_addr: 0x6002A000 + - name: MCPWM0 + peripheral: PWM + base_addr: 0x6001E000 + - name: MCPWM1 + peripheral: PWM + base_addr: 0x6002C000 + - name: RMT + peripheral: RMT + base_addr: 0x60016000 + - name: RNG + peripheral: RNG + base_addr: 0x60034F6C + - name: RSA + peripheral: RSA + base_addr: 0x6003C000 + - name: RTC_CNTL + peripheral: RTC_CNTL + base_addr: 0x60008000 + - name: RTC_I2C + peripheral: RTC_I2C + base_addr: 0x60008C00 + - name: RTC_IO + peripheral: RTC_IO + base_addr: 0x60008400 + - name: SDHOST + peripheral: SDHOST + base_addr: 0x60028000 + - name: SENS + peripheral: SENS + base_addr: 0x60008800 + - name: SENSITIVE + peripheral: SENSITIVE + base_addr: 0x600C1000 + - name: SHA + peripheral: SHA + base_addr: 0x6003B000 + - name: SPI0 + peripheral: SPI0 + base_addr: 0x60003000 + - name: SPI1 + peripheral: SPI1 + base_addr: 0x60002000 + - name: SPI2 + peripheral: SPI2 + base_addr: 0x60024000 + - name: SPI3 + peripheral: SPI2 + base_addr: 0x60025000 + - name: SYSTEM + peripheral: SYSTEM + base_addr: 0x600C0000 + - name: SYSTIMER + peripheral: SYSTIMER + base_addr: 0x60023000 + - name: TIMG0 + peripheral: TIMG + base_addr: 0x6001F000 + - name: TIMG1 + peripheral: TIMG + base_addr: 0x60020000 + - name: TWAI0 + peripheral: TWAI + base_addr: 0x6002B000 + - name: UART0 + peripheral: UART + base_addr: 0x60000000 + - name: UART1 + peripheral: UART + base_addr: 0x60010000 + - name: UART2 + peripheral: UART + base_addr: 0x6002E000 + - name: UHCI0 + peripheral: UHCI + base_addr: 0x60014000 + - name: UHCI1 + peripheral: UHCI + base_addr: 0x6000C000 + - name: USB0 + peripheral: USB + base_addr: 0x60080000 + - name: USB_DEVICE + peripheral: USB_DEVICE + base_addr: 0x60038000 + - name: USB_WRAP + peripheral: USB_WRAP + base_addr: 0x60039000 + - name: WCL + peripheral: WCL + base_addr: 0x600D0000 + - name: XTS_AES + peripheral: XTS_AES + base_addr: 0x600CC000 diff --git a/xtask/regdesc/chips/esp32s3/regdesc.yml b/xtask/regdesc/chips/esp32s3/regdesc.yml new file mode 100644 index 0000000000..560800c09c --- /dev/null +++ b/xtask/regdesc/chips/esp32s3/regdesc.yml @@ -0,0 +1,78 @@ +--- +aes_reg.csv: {} +apb_ctrl_reg_for_trm.csv: {} +apb_saradc_reg_for_trm.csv: + name: APB_SARADC + wno: + - field-names +assist_debug_reg_for_trm.csv: {} +core0_interrupt_reg_for_trm.csv: {} +core1_interrupt_reg_for_trm.csv: {} +dma_reg_for_trm.csv: {} +ds_reg.csv: {} +efuse_software_728.csv: {} +extmem_reg_for_trm.csv: {} +gpio_7.2_for_trm.csv: {} +gpio_sd_reg_for_trm.csv: {} +hmac_reg.csv: {} +i2c_ext_for_trm.csv: {} +i2s_reg.csv: {} +i2s1_reg.csv: + name: I2S1 + wno: + - reg-names + - field-names +io_mux_reg.csv: {} +lcd_cam_reg_for_trm.csv: {} +ledc_reg_for_trm.csv: {} +pcnt_reg.csv: {} +peri_backup_reg_for_trm.csv: {} +pwm_reg_for_trm.csv: {} +rmt_reg_for_trm.csv: {} +rsa_reg.csv: {} +rtc_cntl_reg_for_trm.csv: {} +rtc_i2c_reg_for_trm.csv: {} +rtc_io_reg_for_trm.csv: {} +saradc_reg_for_trm.csv: + name: SENS + wno: + - reg-names + - field-names +sdio_host.csv: + name: SDIO_HOST + wno: + - field-names +sdmmc.csv: {} +sensitive_reg_for_trm.csv: {} +sha_reg.csv: {} +spi_mem_reg.csv: + name: SPI0 + wno: + - reg-names + - field-names +spi1_mem_reg.csv: + name: SPI1 + wno: + - reg-names + - field-names +spi2_reg.csv: + name: SPI2 + wno: + - reg-names + - field-names +spi3_reg.csv: + name: SPI3 + wno: + - reg-names + - field-names +sys_timer_reg_for_trm.csv: {} +system_reg_for_trm.csv: {} +timers_reg_for_trm.csv: {} +twai_reg.csv: {} +Uart_reg.csv: {} +uhci_reg_for_trm.csv: {} +usb_device_reg_for_trm.csv: {} +usb_wrap_reg_for_trm.csv: {} +world_controller_for_trm.csv: + name: WCL +xts_aes_reg.csv: {} diff --git a/xtask/regdesc/chips/esp32s31/interrupts.yml b/xtask/regdesc/chips/esp32s31/interrupts.yml new file mode 100644 index 0000000000..4b149faa97 --- /dev/null +++ b/xtask/regdesc/chips/esp32s31/interrupts.yml @@ -0,0 +1,510 @@ +peripheral_interrupts: + # Source: components/soc/esp32s31/include/soc/interrupts.h + # value = sequential enum position (ETS_*_INTR_SOURCE = N) + # - name: SYS_ICM + # instance: + # value: 0 + - name: AXI_PERF_MON + instance: AXI_PERF_MON + value: 1 + - name: USB_DEVICE + instance: USB_DEVICE + value: 2 + - name: SDIO_HOST + instance: SDHOST + value: 3 + - name: SPI2 + instance: SPI2 + value: 4 + - name: SPI3 + instance: SPI3 + value: 5 + - name: I2S0 + instance: I2S0 + value: 6 + - name: I2S1 + instance: I2S1 + value: 7 + - name: UHCI0 + instance: UHCI0 + value: 8 + - name: UART0 + instance: UART0 + value: 9 + - name: UART1 + instance: UART1 + value: 10 + - name: UART2 + instance: UART2 + value: 11 + - name: UART3 + instance: UART3 + value: 12 + - name: LCD_CAM + instance: LCD_CAM + value: 13 + - name: PWM0 + instance: MCPWM0 + value: 14 + - name: PWM1 + instance: MCPWM1 + value: 15 + - name: PWM2 + instance: MCPWM2 + value: 16 + - name: PWM3 + instance: MCPWM3 + value: 17 + - name: TWAI0 + instance: TWAI0 + value: 18 + - name: TWAI0_TIMER + instance: TWAI0 + value: 19 + - name: TWAI1 + instance: TWAI1 + value: 20 + - name: TWAI1_TIMER + instance: TWAI1 + value: 21 + - name: RMT + instance: RMT + value: 22 + - name: I2C0 + instance: I2C0 + value: 23 + - name: I2C1 + instance: I2C1 + value: 24 + - name: TG0_T0 + instance: TIMG0 + value: 25 + - name: TG0_T1 + instance: TIMG0 + value: 26 + - name: TG0_WDT + instance: TIMG0 + value: 27 + - name: TG1_T0 + instance: TIMG1 + value: 28 + - name: TG1_T1 + instance: TIMG1 + value: 29 + - name: TG1_WDT + instance: TIMG1 + value: 30 + - name: LEDC0 + instance: LEDC0 + value: 31 + - name: LEDC1 + instance: LEDC1 + value: 32 + - name: SYSTIMER_TARGET0 + instance: SYSTIMER + value: 33 + - name: SYSTIMER_TARGET1 + instance: SYSTIMER + value: 34 + - name: SYSTIMER_TARGET2 + instance: SYSTIMER + value: 35 + - name: AHB_PDMA_IN_CH0 + instance: AHB_DMA + value: 36 + - name: AHB_PDMA_IN_CH1 + instance: AHB_DMA + value: 37 + - name: AHB_PDMA_IN_CH2 + instance: AHB_DMA + value: 38 + - name: AHB_PDMA_IN_CH3 + instance: AHB_DMA + value: 39 + - name: AHB_PDMA_IN_CH4 + instance: AHB_DMA + value: 40 + - name: AHB_PDMA_OUT_CH0 + instance: AHB_DMA + value: 41 + - name: AHB_PDMA_OUT_CH1 + instance: AHB_DMA + value: 42 + - name: AHB_PDMA_OUT_CH2 + instance: AHB_DMA + value: 43 + - name: AHB_PDMA_OUT_CH3 + instance: AHB_DMA + value: 44 + - name: AHB_PDMA_OUT_CH4 + instance: AHB_DMA + value: 45 + - name: ASRC_CHNL0 + instance: ASRC + value: 46 + - name: ASRC_CHNL1 + instance: ASRC + value: 47 + - name: AXI_PDMA_IN_CH0 + instance: AXI_DMA + value: 48 + - name: AXI_PDMA_IN_CH1 + instance: AXI_DMA + value: 49 + - name: AXI_PDMA_IN_CH2 + instance: AXI_DMA + value: 50 + - name: AXI_PDMA_OUT_CH0 + instance: AXI_DMA + value: 51 + - name: AXI_PDMA_OUT_CH1 + instance: AXI_DMA + value: 52 + - name: AXI_PDMA_OUT_CH2 + instance: AXI_DMA + value: 53 + - name: RSA + instance: RSA + value: 54 + - name: AES + instance: AES + value: 55 + - name: SHA + instance: SHA + value: 56 + - name: ECC + instance: ECC + value: 57 + - name: ECDSA + instance: ECDSA + value: 58 + - name: KM + instance: KEYMNG + value: 59 + - name: RMA + instance: RMA + value: 60 + - name: GPIO_INT0 + instance: GPIO + value: 61 + - name: GPIO_INT1 + instance: GPIO + value: 62 + - name: GPIO_INT2 + instance: GPIO + value: 63 + - name: GPIO_INT3 + instance: GPIO + value: 64 + # - name: CPU_INT_FROM_CPU_0 + # instance: + # value: 65 + # - name: CPU_INT_FROM_CPU_1 + # instance: + # value: 66 + # - name: CPU_INT_FROM_CPU_2 + # instance: + # value: 67 + # - name: CPU_INT_FROM_CPU_3 + # instance: + # value: 68 + - name: CACHE + instance: CACHE + value: 69 + - name: CPU_APM_M0 + instance: CPU_APM + value: 70 + - name: CPU_APM_M1 + instance: CPU_APM + value: 71 + - name: CPU_APM_M2 + instance: CPU_APM + value: 72 + - name: CPU_APM_M3 + instance: CPU_APM + value: 73 + - name: HP_MEM_APM_M0 + instance: HP_MEM_APM + value: 74 + - name: HP_MEM_APM_M1 + instance: HP_MEM_APM + value: 75 + - name: HP_MEM_APM_M2 + instance: HP_MEM_APM + value: 76 + - name: HP_MEM_APM_M3 + instance: HP_MEM_APM + value: 77 + - name: HP_MEM_APM_M4 + instance: HP_MEM_APM + value: 78 + - name: HP_MEM_APM_M5 + instance: HP_MEM_APM + value: 79 + # - name: CPU_PERI0_TIMEOUT + # instance: + # value: 80 + # - name: CPU_PERI1_TIMEOUT + # instance: + # value: 81 + # - name: HP_PERI0_TIMEOUT + # instance: + # value: 82 + # - name: HP_PERI1_TIMEOUT + # instance: + # value: 83 + - name: HP_APM_M0 + instance: HP_APM + value: 84 + - name: HP_APM_M1 + instance: HP_APM + value: 85 + - name: HP_APM_M2 + instance: HP_APM + value: 86 + - name: HP_APM_M3 + instance: HP_APM + value: 87 + - name: HP_APM_M4 + instance: HP_APM + value: 88 + - name: HP_APM_M5 + instance: HP_APM + value: 89 + - name: HP_APM_M6 + instance: HP_APM + value: 90 + - name: HP_PERI0_PMS + instance: HP_PERI0_PMS + value: 91 + - name: HP_PERI1_PMS + instance: HP_PERI1_PMS + value: 92 + # - name: CPU0_PERI_PMS + # instance: + # value: 93 + # - name: CPU1_PERI_PMS + # instance: + # value: 94 + # - name: MSPI_FLASH + # instance: + # value: 95 + - name: LPI + instance: GMAC + value: 96 + - name: PMT + instance: GMAC + value: 97 + - name: SBD + instance: GMAC + value: 98 + - name: USB_OTG_HS + instance: USB_OTG_HS + value: 99 + - name: USB_OTG_HS_ENDP_MULTI_PROC + instance: USB_OTG_HS + value: 100 + - name: JPEG + instance: JPEG + value: 101 + - name: PPA + instance: PPA + value: 102 + - name: CORE0_TRACE + instance: TRACE0 + value: 103 + - name: CORE1_TRACE + instance: TRACE1 + value: 104 + - name: DMA2D_IN_CH0 + instance: DMA2D + value: 105 + - name: DMA2D_IN_CH1 + instance: DMA2D + value: 106 + - name: DMA2D_IN_CH2 + instance: DMA2D + value: 107 + - name: DMA2D_OUT_CH0 + instance: DMA2D + value: 108 + - name: DMA2D_OUT_CH1 + instance: DMA2D + value: 109 + - name: DMA2D_OUT_CH2 + instance: DMA2D + value: 110 + - name: DMA2D_OUT_CH3 + instance: DMA2D + value: 111 + # - name: MSPI_PSRAM + # instance: + # value: 112 + - name: HP_SYSREG + instance: HP_SYS + value: 113 + - name: PCNT0 + instance: PCNT0 + value: 114 + - name: PCNT1 + instance: PCNT1 + value: 115 + - name: HP_PAU + instance: PAU + value: 116 + - name: HP_PARLIO_RX + instance: PARL_IO + value: 117 + - name: HP_PARLIO_TX + instance: PARL_IO + value: 118 + - name: ASSIST_DEBUG + instance: + value: 119 + # - name: MODEM_WIFI_MAC + # instance: + # value: 120 + # - name: MODEM_WIFI_MAC_NMI + # instance: + # value: 121 + # - name: MODEM_WIFI_PWR + # instance: + # value: 122 + # - name: MODEM_WIFI_BB + # instance: + # value: 123 + # - name: MODEM_BT_MAC + # instance: + # value: 124 + # - name: MODEM_BT_BB + # instance: + # value: 125 + # - name: MODEM_BT_BB_NMI + # instance: + # value: 126 + # - name: MODEM_LP_TIMER + # instance: + # value: 127 + # - name: MODEM_COEX + # instance: + # value: 128 + # - name: MODEM_BLE_TIMER + # instance: + # value: 129 + # - name: MODEM_BLE_SEC + # instance: + # value: 130 + # - name: MODEM_I2C_MST + # instance: + # value: 131 + # - name: MODEM_ZB_MAC + # instance: + # value: 132 + # - name: MODEM_BT_MAC_INT1 + # instance: + # value: 133 + - name: CORDIC + instance: CORDIC + value: 134 + - name: ZERO_DET + instance: ZERO_DET + value: 135 + - name: LP_WDT + instance: LP_WDT + value: 136 + - name: LP_TIMER0 + instance: LP_TIMER + value: 137 + - name: LP_TIMER1 + instance: LP_TIMER + value: 138 + - name: MB_HP + instance: LP_MAILBOX + value: 139 + - name: MB_LP + instance: LP_MAILBOX + value: 140 + - name: PMU0 + instance: PMU + value: 141 + - name: PMU1 + instance: PMU + value: 142 + - name: LP_ANA + instance: LP_ANA_PERI + value: 143 + - name: LP_ADC + instance: ADC + value: 144 + - name: LP_DAC + instance: DAC + value: 145 + - name: LP_GPIO + instance: LP_GPIO + value: 146 + - name: LP_I2C + instance: LP_I2C0 + value: 147 + - name: LP_SPI + instance: LP_SPI + value: 148 + - name: LP_TOUCH + instance: LP_TOUCH + value: 149 + - name: LP_TSENS + instance: LP_TSENS + value: 150 + - name: LP_UART + instance: LP_UART + value: 151 + # - name: LP_EFUSE + # instance: + # value: 152 + - name: LP_SW + instance: LP_SYS + value: 153 + - name: LP_TRNG + instance: TRNG + value: 154 + - name: LP_SYSREG + instance: LP_SYS + value: 155 + - name: LP_APM_M0 + instance: LP_APM + value: 156 + - name: LP_APM_M1 + instance: LP_APM + value: 157 + - name: LP_APM_M2 + instance: LP_APM + value: 158 + - name: LP_APM_M3 + instance: LP_APM + value: 159 + - name: LP_PERI0_PMS + instance: LP_PERI_PMS + value: 160 + - name: LP_PERI1_PMS + instance: LP_PERI_PMS + value: 161 + - name: LP_HUK + instance: LP_HUK + value: 162 + # - name: LP_PERI_TIMEOUT + # instance: + # value: 163 + - name: LP_AHB_PDMA_IN_CH0 + instance: LP_AHB_DMA + value: 164 + - name: LP_AHB_PDMA_IN_CH1 + instance: LP_AHB_DMA + value: 165 + - name: LP_AHB_PDMA_OUT_CH0 + instance: LP_AHB_DMA + value: 166 + - name: LP_AHB_PDMA_OUT_CH1 + instance: LP_AHB_DMA + value: 167 + # - name: LP_SW_INVALID_SLEEP + # instance: + # value: 168 diff --git a/xtask/regdesc/chips/esp32s31/peripherals.yml b/xtask/regdesc/chips/esp32s31/peripherals.yml new file mode 100644 index 0000000000..ce207022fb --- /dev/null +++ b/xtask/regdesc/chips/esp32s31/peripherals.yml @@ -0,0 +1,334 @@ +peripheral_instances: + # Base addresses from components/soc/esp32s31/ld/esp32s31.peripherals.ld + # Interrupt controller bases from components/soc/esp32s31/register/soc/reg_base.h: + # DR_REG_INTR0_BASE = 0x20585000 (CORE0), +0x800 (CORE1) + - name: INTERRUPT_CORE0 + peripheral: CORE0 + base_addr: 0x20585000 + - name: INTERRUPT_CORE1 + peripheral: CORE1 + base_addr: 0x20585800 + - name: USB_OTG_HS + peripheral: USB_OTGHS + base_addr: 0x20300000 + - name: PAU + peripheral: PAU + base_addr: 0x20341000 + - name: SDHOST + peripheral: SDHOST + base_addr: 0x20342000 + - name: AHB_DMA + peripheral: AHB_DMA + base_addr: 0x20343000 + - name: JPEG + peripheral: JPEG + base_addr: 0x20344000 + - name: PPA + peripheral: PPA + base_addr: 0x20345000 + - name: DMA2D + peripheral: DMA2D + base_addr: 0x20346000 + - name: AXI_DMA + peripheral: AXI_DMA + base_addr: 0x20348000 + - name: GMAC + peripheral: GMAC + base_addr: 0x20350000 + - name: PVT + peripheral: PVT + base_addr: 0x20354000 + - name: RMT + peripheral: RMT + base_addr: 0x20355000 + - name: BITSCRAMBLER + peripheral: BITSCRAMBLER + base_addr: 0x20356000 + - name: ASRC + peripheral: ASRC + base_addr: 0x20357000 + - name: CNNT_SYS + peripheral: CNNT_SYS + base_addr: 0x20359000 + - name: MCPWM0 + peripheral: MCPWM + base_addr: 0x20381000 + - name: MCPWM1 + peripheral: MCPWM + base_addr: 0x20382000 + - name: MCPWM2 + peripheral: MCPWM + base_addr: 0x20383000 + - name: MCPWM3 + peripheral: MCPWM + base_addr: 0x20384000 + - name: I2C0 + peripheral: I2C + base_addr: 0x20385000 + - name: I2C1 + peripheral: I2C + base_addr: 0x20386000 + - name: I2S0 + peripheral: I2S + base_addr: 0x20387000 + - name: I2S1 + peripheral: I2S + base_addr: 0x20388000 + - name: PCNT0 + peripheral: PCNT + base_addr: 0x20389000 + - name: UART0 + peripheral: UART + base_addr: 0x2038A000 + - name: UART1 + peripheral: UART + base_addr: 0x2038B000 + - name: UART2 + peripheral: UART + base_addr: 0x2038C000 + - name: UART3 + peripheral: UART + base_addr: 0x2038D000 + - name: PARL_IO + peripheral: PARL_IO + base_addr: 0x2038E000 + - name: SPI2 + peripheral: SPI2 + base_addr: 0x2038F000 + - name: SPI3 + peripheral: SPI3 + base_addr: 0x20390000 + - name: USB_DEVICE + peripheral: USB_SERIAL_JTAG + base_addr: 0x20391000 + - name: LEDC0 + peripheral: LEDC + base_addr: 0x20392000 + - name: SOC_ETM + peripheral: SOC_ETM + base_addr: 0x20393000 + - name: TWAI0 + peripheral: TWAIFD + base_addr: 0x20394000 + - name: TWAI1 + peripheral: TWAIFD + base_addr: 0x20395000 + - name: LCD_CAM + peripheral: LCDCAM + base_addr: 0x20396000 + - name: UHCI0 + peripheral: UHCI + base_addr: 0x20398000 + - name: SYSTIMER + peripheral: SYSTIMER + base_addr: 0x20399000 + - name: ZERO_DET + peripheral: ZERO_DET + base_addr: 0x2039A000 + - name: CORDIC + peripheral: CORDIC + base_addr: 0x2039B000 + - name: LEDC1 + peripheral: LEDC + base_addr: 0x2039C000 + - name: PCNT1 + peripheral: PCNT + base_addr: 0x2039D000 + - name: SPI0 + peripheral: SPI0 + base_addr: 0x20500000 + - name: SPI1 + peripheral: SPI1 + base_addr: 0x20501000 + - name: TEE + peripheral: TEE + base_addr: 0x20504000 + - name: HP_APM + peripheral: HP_APM + base_addr: 0x20504400 + - name: HP_MEM_APM + peripheral: HP_MEM_APM + base_addr: 0x20504800 + - name: CPU_APM + peripheral: CPU_APM + base_addr: 0x20504C00 + - name: HP_PERI0_PMS + peripheral: HP_PERI0_PMS + base_addr: 0x20505000 + - name: KEYMNG + peripheral: KEYMNG + base_addr: 0x20506000 + - name: AES + peripheral: AES + base_addr: 0x20508000 + - name: SHA + peripheral: SHA + base_addr: 0x20509000 + - name: RSA + peripheral: RSA + base_addr: 0x2050A000 + - name: ECC + peripheral: ECC + base_addr: 0x2050B000 + - name: DS + peripheral: DS + base_addr: 0x2050C000 + - name: HMAC + peripheral: HMAC + base_addr: 0x2050D000 + - name: ECDSA + peripheral: ECDSA + base_addr: 0x2050E000 + - name: RMA + peripheral: RMA + base_addr: 0x2050F000 + - name: AXI_ICM + peripheral: ICM_SYS + base_addr: 0x20510000 + - name: ICM_SYS_AXI_IC + peripheral: ICM_SYS_AXI_IC + base_addr: 0x20510400 + - name: AXI_PERF_MON + peripheral: AXI_PERF_MON + base_addr: 0x20511000 + - name: TIMG0 + peripheral: TIMG + base_addr: 0x20580000 + - name: TIMG1 + peripheral: TIMG + base_addr: 0x20581000 + - name: IO_MUX + peripheral: IO_MUX + base_addr: 0x20582000 + - name: GPIO + peripheral: GPIO + base_addr: 0x20583000 + - name: GPIO_EXT + peripheral: GPIO_EXT + base_addr: 0x20583E00 + - name: IOMUX_MSPI_PIN + peripheral: IOMUX_MSPI_PIN + base_addr: 0x20584000 + - name: HP_SYS + peripheral: HP_SYS + base_addr: 0x20586000 + - name: HP_SYS_CLKRST + peripheral: HP_SYS_CLKRST + base_addr: 0x20587000 + - name: CNNT_IO_MUX + peripheral: CNNT_IO_MUX + base_addr: 0x20588000 + - name: HP_ALIVE_SYS + peripheral: HP_ALIVE_SYS + base_addr: 0x20589000 + - name: HP_PERI1_PMS + peripheral: HP_PERI1_PMS + base_addr: 0x2058A000 + - name: LP_SYS + peripheral: LP_SYS + base_addr: 0x20700000 + - name: LP_AON_CLKRST + peripheral: LP_AON_CLKRST + base_addr: 0x20701000 + - name: LP_ANA_PERI + peripheral: LP_ANA_PERI + base_addr: 0x20702000 + - name: LP_HUK + peripheral: HUK + base_addr: 0x20703000 + - name: PMU + peripheral: PMU + base_addr: 0x20704000 + - name: LP_TOUCH_AON + peripheral: TOUCH_AON + base_addr: 0x20705000 + - name: LP_PERI_PMS + peripheral: LP_PERI_PMS + base_addr: 0x20706000 + - name: LP_TEE + peripheral: LP_TEE + base_addr: 0x20706800 + - name: LP_APM + peripheral: LP_APM + base_addr: 0x20706C00 + - name: LP_PERICLKRST + peripheral: LP_PERICLKRST + base_addr: 0x20710000 + - name: LP_IO_MUX + peripheral: LP_IOMUX + base_addr: 0x20712000 + - name: LP_GPIO + peripheral: LP_GPIO + base_addr: 0x20713000 + - name: LP_INTR + peripheral: LP_INTR + base_addr: 0x20714000 + - name: EFUSE + peripheral: EFUSE + base_addr: 0x20715000 + - name: LP_TIMER + peripheral: RTC_TIMER + base_addr: 0x20800000 + - name: LP_WDT + peripheral: RTC_WDT + base_addr: 0x20801000 + - name: LP_CLKCALI + peripheral: RTCLOCKCALI + base_addr: 0x20802000 + - name: LP_PWR + peripheral: LP_PWR + base_addr: 0x20804000 + - name: LP_ADI + peripheral: LP_ADI + base_addr: 0x20805000 + - name: LP_UART + peripheral: LP_UART + base_addr: 0x20810000 + - name: LP_I2C0 + peripheral: LP_I2C + base_addr: 0x20811000 + - name: LP_SPI + peripheral: LP_SPI + base_addr: 0x20812000 + - name: LP_I2C_ANA_MST + peripheral: LP_I2C_ANA_MST + base_addr: 0x20813000 + - name: TRNG + peripheral: TRNG + base_addr: 0x20814000 + - name: ADC + peripheral: ADC + base_addr: 0x20815000 + - name: LP_TOUCH + peripheral: TOUCH + base_addr: 0x20816000 + - name: LP_MAILBOX + peripheral: LP_MAILBOX + base_addr: 0x20817000 + - name: LP_TSENS + peripheral: TSENS + base_addr: 0x20818000 + - name: LP_AHB_DMA + peripheral: LP_AHB_DMA + base_addr: 0x20819000 + - name: DAC + peripheral: DAC + base_addr: 0x2081A000 + - name: CACHE + peripheral: CACHE + base_addr: 0x2C000000 + - name: TRACE0 + peripheral: TRACE + base_addr: 0x2D000000 + - name: TRACE1 + peripheral: TRACE + base_addr: 0x2D001000 + - name: BUS_MONITOR + peripheral: BUS_MONITOR + base_addr: 0x2D002000 + - name: MEM_MONITOR0 + peripheral: MEM_MONITOR + base_addr: 0x2D003000 + - name: MEM_MONITOR1 + peripheral: MEM_MONITOR + base_addr: 0x2D004000 diff --git a/xtask/regdesc/chips/esp32s31/regdesc.yml b/xtask/regdesc/chips/esp32s31/regdesc.yml new file mode 100644 index 0000000000..ad6ed129a4 --- /dev/null +++ b/xtask/regdesc/chips/esp32s31/regdesc.yml @@ -0,0 +1,106 @@ +--- +adc_reg.csv: {} +aes_reg.csv: {} +ahb_dma_reg.csv: {} +asrc_reg.csv: {} +axi_dma_reg.csv: {} +axi_perf_mon_reg.csv: {} +bitscrambler_reg.csv: {} +bus_monitor_reg.csv: {} +cache_reg.csv: {} +cnnt_io_mux_reg.csv: {} +cnnt_sys_reg.csv: {} +cordic_reg.csv: {} +core0_interrupt_reg.csv: {} +core1_interrupt_reg.csv: {} +cpu_apm_reg.csv: {} +dac_reg.csv: {} +dma2d_reg.csv: {} +ds_reg.csv: {} +ecc_mult_reg.csv: + name: ECC +ecdsa_reg.csv: {} +efuse_mem_reg.csv: {} +gmac_reg.csv: {} +gpio_ext_reg.csv: {} +gpio_reg.csv: {} +hmac_reg.csv: {} +hp_alive_sys_reg.csv: {} +hp_apm_reg.csv: {} +hp_mem_apm_reg.csv: {} +hp_peri0_pms_reg.csv: {} +hp_peri1_pms_reg.csv: {} +hp_sys_clkrst_reg.csv: {} +hp_sys_reg.csv: + name: HP_SYS +huk_reg.csv: {} +i2c_ext_reg.csv: {} +i2s_reg.csv: {} +icm_sys_axi_ic_reg.csv: {} +icm_sys_reg.csv: {} +iomux_mspi_pin_reg.csv: {} +iomux_reg.csv: {} +jpeg_reg.csv: {} +keymng_reg.csv: {} +lcdcam_reg.csv: {} +ledc_reg.csv: {} +lp_adi_reg.csv: {} +lp_ahb_dma_reg.csv: {} +lp_analog_peri_reg.csv: + name: LP_ANA_PERI +lp_aonclkrst_reg.csv: + name: LP_AON_CLKRST +lp_apm_reg.csv: {} +lp_gpio_reg.csv: {} +lp_i2c_ana_mst_reg.csv: {} +lp_i2c_ext_reg.csv: {} +lp_intr_reg.csv: {} +lp_iomux_reg.csv: {} +lp_mailbox_reg.csv: {} +lp_peri_pms_reg.csv: {} +lp_periclkrst_reg.csv: {} +lp_pwr_reg.csv: {} +lp_spi_reg.csv: {} +lp_sys_reg.csv: {} +lp_tee_reg.csv: {} +lp_uart_reg.csv: {} +mem_monitor_reg.csv: {} +parl_io_reg.csv: {} +pau_reg.csv: {} +pcnt_reg.csv: {} +pmu_reg.csv: {} +ppa_reg.csv: {} +pvt_reg.csv: {} +pwm_reg.csv: + name: MCPWM +rma_reg.csv: {} +rmt_reg.csv: {} +rsa_reg.csv: {} +rtc_timer_reg.csv: {} +rtc_wdt_reg.csv: {} +rtclockcali_reg.csv: {} +sdio_host_reg.csv: {} +sha_reg.csv: {} +soc_etm_reg.csv: {} +spi1_mem_reg_s.csv: # TODO: am I using the correct file? (c/s) + name: SPI1 +spi2_reg_s.csv: + name: SPI2 +spi3_reg.csv: + name: SPI3 +spi_mem_reg_s.csv: # TODO: am I using the correct file? (c/s) + name: SPI0 +sys_timer_reg.csv: {} +tee_reg.csv: {} +timers_reg.csv: {} +touch_aon_reg.csv: {} +touch_reg.csv: {} +trace_reg.csv: {} +trng_reg.csv: {} +tsens_reg.csv: {} +twaifd_reg.csv: {} +uart_reg.csv: {} +uhci_reg.csv: {} +usb_otghs_reg.csv: {} +usb_serial_jtag_reg.csv: {} +zero_det_reg.csv: {} diff --git a/xtask/regdesc/peripheral_descriptions.yml b/xtask/regdesc/peripheral_descriptions.yml new file mode 100644 index 0000000000..0e1d57755b --- /dev/null +++ b/xtask/regdesc/peripheral_descriptions.yml @@ -0,0 +1,175 @@ +peripheral_descriptions: + - peripheral: AES + description: AES (Advanced Encryption Standard) Accelerator + - peripheral: ADC + description: ADC (Analog to Digital Converter) + - peripheral: APB_CTRL + description: APB (Advanced Peripheral Bus) Controller + - peripheral: APB_SARADC + description: SAR (Successive Approximation Register) Analog-to-Digital Converter + - peripheral: ATOMIC + description: Atomic Locker + - peripheral: ASSIST_DEBUG + description: Debug Assist + - peripheral: DMA + description: DMA (Direct Memory Access) Controller + - peripheral: DS + description: Digital Signature + - peripheral: ECC + description: ECC (ECC Hardware Accelerator) + - peripheral: ECDSA + description: ECDSA (Elliptic Curve Digital Signature Algorithm) Accelerator + - peripheral: EFUSE + description: eFuse Controller + - peripheral: EMAC_DMA + description: "Ethernet DMA configuration and control registers" + - peripheral: EMAC_EXT + description: "Ethernet Clock, PHY type, and SRAM configuration registers" + - peripheral: EMAC_MAC + description: "Ethernet MAC configuration and control registers" + - peripheral: EXTMEM + description: External Memory + - peripheral: GPIO + description: General Purpose Input/Output + - peripheral: GPIO_SD + description: Sigma-Delta Modulation + - peripheral: HMAC + description: HMAC (Hash-based Message Authentication Code) Accelerator + - peripheral: HP_SYS + description: High-Power System + - peripheral: H264 + description: H264 Encoder (Core) + - peripheral: H264_DMA + description: H264 Encoder (DMA) + - peripheral: I2C0 + description: I2C (Inter-Integrated Circuit) Controller 0 + - peripheral: I2C1 + description: I2C (Inter-Integrated Circuit) Controller 1 + - peripheral: I2S0 + description: I2S (Inter-IC Sound) Controller 0 + - peripheral: I2S1 + description: I2S (Inter-IC Sound) Controller 1 + - peripheral: I2S2 + description: I2S (Inter-IC Sound) Controller 2 + - peripheral: I3C_MST + description: I3C Controller (Master) + - peripheral: I3C_SLV + description: I3C Controller (Slave) + - peripheral: INTERRUPT_CORE0 + description: Interrupt Controller (Core 0) + - peripheral: INTERRUPT_CORE1 + description: Interrupt Controller (Core 1) + - peripheral: IO_MUX + description: Input/Output Multiplexer + - peripheral: JPEG + description: JPEG Codec + - peripheral: LCD_CAM + description: Camera/LCD Controller + - peripheral: LEDC + description: LED Control PWM (Pulse Width Modulation) + - peripheral: LP_ADC + description: Low-power Analog to Digital Converter + - peripheral: LP_APM + description: Low-power Access Permission Management Controller + - peripheral: LP_GPIO + description: Low-power General Purpose Input/Output + - peripheral: LP_INTR + description: Low-power Interrupt Controller + - peripheral: LP_IO_MUX + description: Low-power Input/Output Multiplexer + - peripheral: LP_I2C0 + description: Low-power I2C (Inter-Integrated Circuit) Controller 0 + - peripheral: LP_I2S0 + description: Low-power I2S (Inter-IC Sound) Controller 0 + - peripheral: LP_TEE + description: Low-power Trusted Execution Environment + - peripheral: LP_TIMER + description: Low-power Timer + - peripheral: LP_TSENS + description: Low-power Temperature Sensor + - peripheral: LP_UART + description: Low-power UART (Universal Asynchronous Receiver-Transmitter) Controller + - peripheral: LP_WDT + description: Low-power Watchdog Timer + - peripheral: MCPWM0 + description: Motor Control Pulse-Width Modulation 0 + - peripheral: MCPWM1 + description: Motor Control Pulse-Width Modulation 1 + - peripheral: MIPI_CSI_BRIDGE + description: MIPI Camera Interface Bridge + - peripheral: MIPI_CSI_HOST + description: MIPI Camera Interface Host + - peripheral: MIPI_DSI_BRIDGE + description: MIPI Camera Interface Bridge + - peripheral: MIPI_DSI_HOST + description: MIPI Display Interface Host + - peripheral: PARL_IO + description: Parallel IO Controller + - peripheral: PCNT + description: Pulse Count Controller + - peripheral: PMS + description: Permissions Controller + - peripheral: RMT + description: Remote Control + - peripheral: RNG + description: Hardware Random Number Generator + - peripheral: RSA + description: RSA (Rivest Shamir Adleman) Accelerator + - peripheral: RTC_CNTL + description: Real-Time Clock Control + - peripheral: RTC_IO + description: Low-power Input/Output + - peripheral: RTC_I2C + description: Low-power I2C (Inter-Integrated Circuit) Controller + - peripheral: SDHOST + description: SD/MMC Host Controller + - peripheral: SHA + description: SHA (Secure Hash Algorithm) Accelerator + - peripheral: SOC_ETM + description: Event Task Matrix + - peripheral: SPI0 + description: SPI (Serial Peripheral Interface) Controller 0 + - peripheral: SPI1 + description: SPI (Serial Peripheral Interface) Controller 1 + - peripheral: SPI2 + description: SPI (Serial Peripheral Interface) Controller 2 + - peripheral: SPI3 + description: SPI (Serial Peripheral Interface) Controller 3 + - peripheral: SPI4 + description: SPI (Serial Peripheral Interface) Controller 4 + - peripheral: SYSTEM + description: System Configuration Registers + - peripheral: SYSTIMER + description: System Timer + - peripheral: TIMG0 + description: Timer Group 0 + - peripheral: TIMG1 + description: Timer Group 1 + - peripheral: TRACE + description: RISC-V Trace Encoder + - peripheral: TWAI0 + description: Two-Wire Automotive Interface + - peripheral: TWAI1 + description: Two-Wire Automotive Interface + - peripheral: TWAI2 + description: Two-Wire Automotive Interface + - peripheral: UART0 + description: UART (Universal Asynchronous Receiver-Transmitter) Controller 0 + - peripheral: UART1 + description: UART (Universal Asynchronous Receiver-Transmitter) Controller 1 + - peripheral: UART2 + description: UART (Universal Asynchronous Receiver-Transmitter) Controller 2 + - peripheral: UART3 + description: UART (Universal Asynchronous Receiver-Transmitter) Controller 3 + - peripheral: UART4 + description: UART (Universal Asynchronous Receiver-Transmitter) Controller 4 + - peripheral: UHCI0 + description: Universal Host Controller Interface 0 + - peripheral: UHCI1 + description: Universal Host Controller Interface 1 + - peripheral: USB0 + description: USB OTG (On-The-Go) + - peripheral: USB_DEVICE + description: Full-speed USB Serial/JTAG Controller + - peripheral: XTS_AES + description: XTS-AES-128 Flash Encryption diff --git a/xtask/src/main.rs b/xtask/src/main.rs index 987bccf84a..bd1053b242 100644 --- a/xtask/src/main.rs +++ b/xtask/src/main.rs @@ -19,6 +19,8 @@ use svd2rust::{ use svdtools::{html::html_cli::svd2html, patch::Config as PatchConfig}; use toml_edit::DocumentMut; +mod regdesc; + #[derive(Debug, Clone, Display, EnumIter, ValueEnum)] #[strum(serialize_all = "kebab-case")] enum Chip { @@ -105,7 +107,7 @@ enum Commands { chips: Vec, }, - /// Published the specified package(s) + /// Publish the specified package(s) Publish { /// Perform all checks without uploading #[arg(long)] @@ -115,6 +117,29 @@ enum Commands { #[arg(value_enum, default_values_t = Chip::iter())] chips: Vec, }, + + /// Generate a base CMSIS-SVD from GDVS register CSVs + /// + /// Chip metadata (CSV mapping, peripheral instances, interrupts) is bundled + /// under `xtask/regdesc/chips/{chip}/`. Output defaults to + /// `target/generated_svds/{chip}.svd`. + GenerateBaseSvd { + /// Chip to generate + #[arg(long, value_enum)] + chip: Chip, + + /// Directory containing GDVS register CSV files + #[arg(long)] + csv_dir: PathBuf, + + /// Output SVD file path + #[arg(long)] + output: Option, + + /// SVD version number + #[arg(long, default_value_t = 1)] + version: u32, + }, } // ---------------------------------------------------------------------------- @@ -152,6 +177,18 @@ fn main() -> Result<()> { Commands::Publish { dry_run, chips } => chips .par_iter() .try_for_each(|chip| publish_package(&workspace, chip, dry_run)), + + Commands::GenerateBaseSvd { + chip, + csv_dir, + output, + version, + } => { + let chip = chip.to_string(); + let output = + output.unwrap_or_else(|| regdesc::default_output_path(&workspace, &chip)); + regdesc::generate_base_svd(&chip, &csv_dir, &output, version) + } } } diff --git a/xtask/src/regdesc/config.rs b/xtask/src/regdesc/config.rs new file mode 100644 index 0000000000..b34c90f493 --- /dev/null +++ b/xtask/src/regdesc/config.rs @@ -0,0 +1,183 @@ +use std::collections::HashMap; +use std::fs; +use std::path::{Path, PathBuf}; + +use anyhow::{Context, Result}; +use serde::Deserialize; + +use super::model::{ + ChipInfo, Peripheral, PeripheralInstance, PeripheralInterrupt, RegdescFragment, +}; + +#[derive(Debug, Deserialize)] +struct PeripheralsFile { + peripheral_instances: Vec, +} + +#[derive(Debug, Deserialize)] +struct PeripheralInstanceRaw { + name: String, + peripheral: String, + base_addr: String, + description: Option, +} + +#[derive(Debug, Deserialize)] +struct InterruptsFile { + peripheral_interrupts: Vec, +} + +#[derive(Debug, Deserialize)] +struct PeripheralInterruptRaw { + name: String, + instance: String, + value: u32, + description: Option, +} + +#[derive(Debug, Deserialize)] +struct DescriptionsFile { + peripheral_descriptions: Vec, +} + +#[derive(Debug, Deserialize)] +struct PeripheralDescription { + peripheral: String, + description: String, +} + +#[derive(Debug, Deserialize)] +pub struct CsvEntryOptions { + pub name: Option, + /// Warning names to ignore (reserved for future use; present in YAML for compatibility). + #[serde(default)] + #[allow(dead_code)] + pub wno: Vec, +} + +/// Reads `regdesc.yml` — which CSV files to parse and any name overrides. +pub fn load_regdesc_config(path: &Path) -> Result> { + let content = fs::read_to_string(path) + .with_context(|| format!("reading regdesc config {}", path.display()))?; + serde_yaml::from_str(&content) + .with_context(|| format!("parsing regdesc config {}", path.display())) +} + +/// Loads `peripherals.yml` and `interrupts.yml` (base addresses, instances, IRQ numbers). +pub fn load_metadata( + config_dir: &Path, +) -> Result<(Vec, Vec)> { + let peripherals_path = config_dir.join("peripherals.yml"); + let interrupts_path = config_dir.join("interrupts.yml"); + + let peripherals_content = fs::read_to_string(&peripherals_path) + .with_context(|| format!("reading {}", peripherals_path.display()))?; + let interrupts_content = fs::read_to_string(&interrupts_path) + .with_context(|| format!("reading {}", interrupts_path.display()))?; + + let peripherals: PeripheralsFile = serde_yaml::from_str(&peripherals_content) + .with_context(|| format!("parsing {}", peripherals_path.display()))?; + let interrupts: InterruptsFile = serde_yaml::from_str(&interrupts_content) + .with_context(|| format!("parsing {}", interrupts_path.display()))?; + + let instances = peripherals + .peripheral_instances + .into_iter() + .map(|raw| PeripheralInstance { + name: raw.name, + peripheral: raw.peripheral, + base_addr: parse_addr(&raw.base_addr), + description: raw.description, + }) + .collect(); + + let peripheral_interrupts = interrupts + .peripheral_interrupts + .into_iter() + .map(|raw| PeripheralInterrupt { + name: raw.name, + instance: raw.instance, + value: raw.value, + description: raw.description, + }) + .collect(); + + Ok((instances, peripheral_interrupts)) +} + +/// Loads the shared peripheral description blurbs from YAML. +pub fn load_descriptions(path: &Path) -> Result> { + let content = fs::read_to_string(path) + .with_context(|| format!("reading {}", path.display()))?; + let file: DescriptionsFile = serde_yaml::from_str(&content) + .with_context(|| format!("parsing {}", path.display()))?; + Ok(file + .peripheral_descriptions + .into_iter() + .map(|entry| (entry.peripheral, entry.description)) + .collect()) +} + +/// Fills in each instance's description, or falls back to a generic one. +pub fn apply_instance_descriptions( + instances: &mut [PeripheralInstance], + descriptions: &HashMap, +) { + for instance in instances.iter_mut() { + instance.description = descriptions + .get(&instance.name) + .cloned() + .or_else(|| { + log::warn!("{} has no description", instance.name); + Some(format!("{} Peripheral", instance.name)) + }); + } +} + +/// Bundles everything into one struct that's ready for SVD writing. +pub fn build_fragment( + chip: &str, + peripherals: Vec, + instances: Vec, + interrupts: Vec, +) -> RegdescFragment { + RegdescFragment { + peripherals, + peripheral_instances: instances, + peripheral_interrupts: interrupts, + chip_info: ChipInfo::from_chip_id(chip), + } +} + +/// Parses `"0x20343000"`-style addresses into a `u32`. +fn parse_addr(value: &str) -> u32 { + let value = value.trim(); + if let Some(hex) = value.strip_prefix("0x").or_else(|| value.strip_prefix("0X")) { + u32::from_str_radix(hex, 16).unwrap_or(0) + } else { + value.parse().unwrap_or(0) + } +} + +/// Path to `xtask/regdesc/`. +pub fn regdesc_root() -> PathBuf { + PathBuf::from(env!("CARGO_MANIFEST_DIR")).join("regdesc") +} + +/// Path to `xtask/regdesc/chips/{chip}/`. +pub fn chip_config_dir(chip: &str) -> PathBuf { + regdesc_root().join("chips").join(chip) +} + +/// Path to the shared `peripheral_descriptions.yml`. +pub fn peripheral_descriptions_path() -> PathBuf { + regdesc_root().join("peripheral_descriptions.yml") +} + +/// Default SVD output: `target/generated_svds/{chip}.svd`. +pub fn default_output_path(workspace: &Path, chip: &str) -> PathBuf { + workspace + .join("target") + .join("generated_svds") + .join(format!("{chip}.svd")) +} diff --git a/xtask/src/regdesc/csv.rs b/xtask/src/regdesc/csv.rs new file mode 100644 index 0000000000..fc462925e1 --- /dev/null +++ b/xtask/src/regdesc/csv.rs @@ -0,0 +1,508 @@ +use anyhow::{bail, Context, Result}; +use regex::Regex; +use std::sync::LazyLock; + +use super::model::{ExpandContext, Field, Peripheral, Register, RegisterGroup}; +use super::util::{parse_verilog_number, trim}; + +static BITPOS_REGEX: LazyLock = + LazyLock::new(|| Regex::new(r"\[((\d+):)?(\d+)\]").unwrap()); +static NONREG_REGEX: LazyLock = + LazyLock::new(|| Regex::new(r"([0-9]+)\*([0-9]+)").unwrap()); +static C_IDENT_REGEX: LazyLock = + LazyLock::new(|| Regex::new(r"^[a-zA-Z][a-zA-Z0-9_$]+$").unwrap()); +static REPEAT_LOWER: LazyLock = + LazyLock::new(|| Regex::new(r"\$([A-Z])").unwrap()); + +const CSV_VERSION_1_0: i32 = 100; +const CSV_VERSION_1_1: i32 = 110; +const CSV_VERSION_1_2: i32 = 120; + +type CsvLine = std::collections::HashMap; + +/// Feed it CSV text, get back a parsed `Peripheral`. +pub fn read_peripheral_csv(content: &str, peripheral_name: Option<&str>) -> Result { + let mut parser = CsvParser::new(content, peripheral_name)?; + parser.parse() +} + +struct CsvParser { + lines: Vec, + peripheral_name: String, + csv_version: i32, + last_repeat_num: Option, +} + +impl CsvParser { + /// Sets up the parser and figures out the peripheral name if you didn't override it. + fn new(content: &str, peripheral_name: Option<&str>) -> Result { + let (csv_version, records) = parse_csv_records(content)?; + let peripheral_name = match peripheral_name { + Some(name) => name.to_owned(), + None => probe_peripheral_name(&records, "RegName_Chg_0") + .or_else(|| probe_peripheral_name(&records, "RegName")) + .context("Failed to determine peripheral name")?, + }; + + Ok(Self { + lines: records, + peripheral_name, + csv_version, + last_repeat_num: None, + }) + } + + /// Walks the whole CSV and builds register groups. + fn parse(&mut self) -> Result { + let mut groups: Vec = Vec::new(); + let mut line_idx = 0usize; + + while line_idx < self.lines.len() { + let (register, group, consumed) = self.parse_register(line_idx)?; + line_idx += consumed; + + if let Some(idx) = groups.iter().position(|existing| groups_match(existing, &group)) { + groups[idx].add_register(register); + } else { + let mut new_group = group; + new_group.add_register(register); + groups.push(new_group); + } + } + + for group in &mut groups { + group.visible = !group.registers.iter().all(|r| !r.visible); + } + + Ok(Peripheral { + name: self.peripheral_name.clone(), + register_groups: groups, + description: String::new(), + }) + } + + /// Parses one register line (and the field rows that follow it). + fn parse_register(&mut self, start: usize) -> Result<(Register, RegisterGroup, usize)> { + let line = &self.lines[start]; + let reg_name = trim(line.get("RegName").map(String::as_str).unwrap_or("")); + if reg_name.is_empty() { + bail!("Expected a register definition at line {}", start + 2); + } + + let field_name = trim(line.get("Signal").map(String::as_str).unwrap_or("")); + if !field_name.is_empty() { + bail!( + "Field {field_name} cannot be defined on the same line as register {reg_name}" + ); + } + + let mut reg_name = reg_name.to_owned(); + if let Some(alt) = extract_alt_names(line).into_iter().next() { + reg_name = alt; + } + + let description = extract_description(line); + let visible = extract_visible(line); + let register_group = extract_register_group(line, self.csv_version); + + let mem_size = extract_mem_size(line, self.csv_version, ®_name); + if mem_size == 0 { + self.validate_register_name(®_name)?; + + let repeat_info = self.extract_repeat(line); + self.last_repeat_num = repeat_info.as_ref().map(|(_, n)| *n); + + let (fields, consumed) = self.parse_fields(start + 1)?; + if fields.is_empty() { + bail!("Register {reg_name} doesn't have any fields defined"); + } + + let visible = if fields.iter().all(|f| !f.visible) { + false + } else { + visible + }; + + let mut register = Register { + name: reg_name, + addr: extract_reg_addr(line)?, + fields, + description, + visible, + size: 4, + repeat: None, + repeat_name_hint: None, + repeat_index_hint: None, + is_mem_region: false, + expand_context: ExpandContext::default(), + }; + + if let Some((repeat_name, repeat_num)) = repeat_info { + register.set_repeat_hint(repeat_name, repeat_num); + } + + Ok((register, register_group, consumed + 1)) + } else { + self.validate_mem_region_name(®_name)?; + let register = Register { + name: reg_name, + addr: extract_reg_addr(line)?, + fields: Vec::new(), + description, + visible: true, + size: mem_size, + repeat: None, + repeat_name_hint: None, + repeat_index_hint: None, + is_mem_region: true, + expand_context: ExpandContext::default(), + }; + Ok((register, register_group, 1)) + } + } + + /// Grabs all field rows belonging to the current register. + fn parse_fields(&self, start: usize) -> Result<(Vec, usize)> { + let mut fields = Vec::new(); + let mut idx = start; + + while idx < self.lines.len() { + let line = &self.lines[idx]; + if !trim(line.get("RegName").map(String::as_str).unwrap_or("")).is_empty() { + break; + } + + let field_name = trim(line.get("Signal").map(String::as_str).unwrap_or("")); + if field_name.is_empty() { + if extract_field_shift_mask(line).is_some() { + idx += 1; + continue; + } + break; + } + + let mut field_name = field_name.to_ascii_uppercase(); + if let Some(alt) = extract_alt_names(line).into_iter().next() { + field_name = alt; + } + field_name = self.validate_fix_field_name(&field_name)?; + + let (shift, mask) = extract_field_shift_mask(line) + .context("Field missing bit position")?; + let (min_val, max_val) = extract_min_max(line); + let (default, _, _) = parse_verilog_number( + trim(line.get("Default").map(String::as_str).unwrap_or("0")), + ); + + let mut field = Field { + name: field_name, + shift, + mask, + access: trim(line.get("SW(R/W)").map(String::as_str).unwrap_or("")) + .to_owned(), + default, + description: extract_description(line), + visible: extract_visible(line), + min_val, + max_val, + repeat: None, + repeat_name_hint: None, + repeat_index_hint: None, + }; + + if let Some((repeat_name, repeat_num)) = self.extract_repeat(line) { + field.set_repeat_hint(repeat_name, repeat_num); + } + + fields.push(field); + idx += 1; + } + + Ok((fields, idx - start)) + } + + /// Pulls out repeat info like `$n` and how many times it repeats. + fn extract_repeat(&self, line: &CsvLine) -> Option<(String, i32)> { + let repeat_name = trim(line.get("RepeatName").map(String::as_str).unwrap_or("")); + if repeat_name.is_empty() { + return None; + } + + let mut repeat_name = repeat_name.to_ascii_uppercase(); + repeat_name = REPEAT_LOWER + .replace_all(&repeat_name, |caps: ®ex::Captures| { + format!("${}", caps[1].to_ascii_lowercase()) + }) + .into_owned(); + + let num_str = trim(line.get("RepeatNum").map(String::as_str).unwrap_or("")); + if num_str.is_empty() { + return self.last_repeat_num.map(|n| (repeat_name, n)); + } + + Some((repeat_name, num_str.parse().ok()?)) + } + + /// Warns if a register name looks wrong (doesn't stop parsing). + fn validate_register_name(&self, reg_name: &str) -> Result<()> { + if !C_IDENT_REGEX.is_match(reg_name) { + log::warn!("Invalid register name: {reg_name}"); + } + let prefix = format!("{}_", self.peripheral_name); + if !reg_name.starts_with(&prefix) || !reg_name.ends_with("_REG") { + log::warn!("Invalid register name: {reg_name}"); + } + Ok(()) + } + + /// Same as `validate_register_name`, but for `*_MEM` memory regions. + fn validate_mem_region_name(&self, name: &str) -> Result<()> { + if !C_IDENT_REGEX.is_match(name) { + log::warn!("Invalid memory region name: {name}"); + } + let prefix = format!("{}_", self.peripheral_name); + if !name.starts_with(&prefix) || !name.ends_with("_MEM") { + log::warn!("Invalid memory region name: {name}"); + } + Ok(()) + } + + /// Tries to fix/normalize field names; warns if the prefix looks off. + fn validate_fix_field_name(&self, field_name: &str) -> Result { + if !C_IDENT_REGEX.is_match(field_name) { + log::warn!("Invalid field name: {field_name}"); + } + + let prefix_variants = if self.csv_version < CSV_VERSION_1_1 { + vec![ + format!("REG_{}_REG_", self.peripheral_name), + format!("REG_{}_", self.peripheral_name), + ] + } else { + vec![format!("{}_", self.peripheral_name)] + }; + + for prefix in &prefix_variants { + if let Some(rest) = field_name.strip_prefix(prefix) { + return Ok(format!("{}_{rest}", self.peripheral_name)); + } + } + + let prefix_list = prefix_variants.join(" or "); + log::warn!( + "Invalid field name: {field_name}, expected prefix {prefix_list}; keeping original" + ); + Ok(field_name.to_owned()) + } +} + +/// Checks if two register groups should be merged into one. +fn groups_match(existing: &RegisterGroup, group: &RegisterGroup) -> bool { + if existing.name.is_none() && group.name.is_none() { + return existing.description == group.description; + } + existing.name == group.name && existing.description == group.description +} + +/// Low-level CSV reader (semicolon-delimited, GDVS style). +fn parse_csv_records(content: &str) -> Result<(i32, Vec)> { + let mut reader = csv::ReaderBuilder::new() + .delimiter(b';') + .trim(csv::Trim::All) + .flexible(true) + .from_reader(content.as_bytes()); + + let headers: Vec = reader + .headers() + .context("CSV missing headers")? + .iter() + .map(|h| trim(h).to_owned()) + .collect(); + + let mut records = Vec::new(); + for result in reader.records() { + let record = result.context("invalid CSV record")?; + let mut line = CsvLine::new(); + for (header, value) in headers.iter().zip(record.iter()) { + line.insert(header.clone(), value.to_owned()); + } + records.push(line); + } + + let csv_version = if headers.iter().any(|h| h == "CSV_Version") { + match records.first().and_then(|line| line.get("CSV_Version")) { + Some(v) => match trim(v) { + "1.0" => CSV_VERSION_1_0, + "1.1" => CSV_VERSION_1_1, + "1.2" => CSV_VERSION_1_2, + other => bail!("Unknown CSV version: {other}"), + }, + None => CSV_VERSION_1_0, + } + } else { + CSV_VERSION_1_0 + }; + + Ok((csv_version, records)) +} + +/// Guesses the peripheral name from common prefixes in register names. +fn probe_peripheral_name(records: &[CsvLine], column: &str) -> Option { + let names: Vec = records + .iter() + .filter(|line| !trim(line.get("Address").map(String::as_str).unwrap_or("")).is_empty()) + .filter_map(|line| line.get(column).cloned()) + .filter(|name| !name.is_empty()) + .collect(); + + if names.len() < 2 { + return None; + } + + let common_prefix = common_prefix(&names); + let pos = common_prefix.rfind('_')?; + Some(common_prefix[..pos].to_owned()) +} + +/// Finds the shared start of a bunch of strings (used for name probing). +fn common_prefix(values: &[String]) -> String { + if values.is_empty() { + return String::new(); + } + let mut prefix = values[0].clone(); + for value in &values[1..] { + while !value.starts_with(&prefix) { + prefix.pop(); + if prefix.is_empty() { + return String::new(); + } + } + } + prefix +} + +/// Parses the address column from a CSV row. +fn extract_reg_addr(line: &CsvLine) -> Result { + let addr = trim(line.get("Address").map(String::as_str).unwrap_or("")); + let hex = addr + .strip_prefix("0x") + .or_else(|| addr.strip_prefix("0X")) + .unwrap_or(addr); + u32::from_str_radix(hex, 16).with_context(|| format!("Invalid address: {addr}")) +} + +/// Figures out memory region size from the `NonReg` column. +fn extract_mem_size(line: &CsvLine, csv_version: i32, reg_name: &str) -> u32 { + let nonreg_val = trim(line.get("NonReg").map(String::as_str).unwrap_or("")); + if nonreg_val.is_empty() { + return 0; + } + + if csv_version < CSV_VERSION_1_2 { + return u32::from_str_radix(nonreg_val.trim_start_matches("0x"), 16).unwrap_or(0); + } + + if let Some(caps) = NONREG_REGEX.captures(nonreg_val) { + let depth = caps[1].parse::().unwrap_or(0); + let width_bits = caps[2].parse::().unwrap_or(0); + if width_bits != 32 { + log::warn!( + "Memory region {reg_name} bit width {width_bits} isn't implemented, assuming 32" + ); + } + return depth * 4; + } + + 0 +} + +/// Grabs the description text from a row. +fn extract_description(line: &CsvLine) -> String { + trim(line.get("Description").map(String::as_str).unwrap_or("")).to_owned() +} + +/// Checks if a row is marked public/visible (empty `Public` column = yes). +fn extract_visible(line: &CsvLine) -> bool { + matches!( + trim(line.get("Public").map(String::as_str).unwrap_or("")), + "" + ) +} + +/// Pulls alternate register/field names from `RegName_Chg_0`. +fn extract_alt_names(line: &CsvLine) -> Vec { + let alt = trim(line.get("RegName_Chg_0").map(String::as_str).unwrap_or("")); + if alt.is_empty() { + Vec::new() + } else { + alt.split_whitespace().map(|s| s.to_ascii_uppercase()).collect() + } +} + +/// Reads min/max value columns if present. +fn extract_min_max(line: &CsvLine) -> (Option, Option) { + let min_str = trim(line.get("Min_Value").map(String::as_str).unwrap_or("")); + let max_str = trim(line.get("Max_Value").map(String::as_str).unwrap_or("")); + let min_val = if min_str.is_empty() { + None + } else { + min_str.parse().ok() + }; + let max_val = if max_str.is_empty() { + None + } else { + max_str.parse().ok() + }; + (min_val, max_val) +} + +/// Builds a register group from `GroupName` / `GroupIdentifier`. +fn extract_register_group(line: &CsvLine, csv_version: i32) -> RegisterGroup { + let group_desc = trim(line.get("GroupName").map(String::as_str).unwrap_or("")); + let description = if group_desc.is_empty() { + "Default".to_owned() + } else { + group_desc.to_owned() + }; + let name = if csv_version < CSV_VERSION_1_2 { + None + } else { + let id = trim(line.get("GroupIdentifier").map(String::as_str).unwrap_or("")); + if id.is_empty() { + None + } else { + Some(id.to_owned()) + } + }; + + RegisterGroup { + name, + description, + registers: Vec::new(), + visible: true, + repeat: None, + offset: 0, + } +} + +/// Parses `[7:0]`-style bit positions into (shift, mask). +fn extract_field_shift_mask(line: &CsvLine) -> Option<(u32, u32)> { + let bitpos = trim(line.get("BitPos").map(String::as_str).unwrap_or("")); + if bitpos.is_empty() { + return None; + } + let caps = BITPOS_REGEX.captures(bitpos)?; + if caps.get(2).is_none() { + let bit = caps[3].parse().ok()?; + return Some((bit, 0x1)); + } + let high = caps[2].parse::().ok()?; + let low = caps[3].parse::().ok()?; + let width = high - low + 1; + let mask = if width >= 32 { + u32::MAX + } else { + (1u32 << width) - 1 + }; + Some((low, mask)) +} diff --git a/xtask/src/regdesc/merge.rs b/xtask/src/regdesc/merge.rs new file mode 100644 index 0000000000..87e5bb591d --- /dev/null +++ b/xtask/src/regdesc/merge.rs @@ -0,0 +1,322 @@ +use std::collections::HashMap; +use std::sync::LazyLock; + +use regex::Regex; + +use super::model::{ExpandContext, ExpandValue, Field, Register, Repeat}; +use super::util::remove_index_from_strings; + +static INDEX_VAR_REGEX: LazyLock = + LazyLock::new(|| Regex::new(r"\$([a-zA-Z])").unwrap()); + +#[derive(Debug, Clone)] +pub struct MergeError(pub String); + +/// Collapses repeated field rows (CH0, CH1, …) into one field with a dim array. +pub fn merge_fields(fields: Vec) -> (Vec, Vec) { + let mut items_by_repeat_name: HashMap> = HashMap::new(); + let mut result = Vec::new(); + let mut merge_errors = Vec::new(); + + for mut field in fields { + match (&field.repeat_name_hint, field.repeat_index_hint) { + (Some(name), Some(_)) => { + items_by_repeat_name + .entry(name.clone()) + .or_default() + .push(field); + } + (Some(name), None) => { + field.name = name.clone(); + field.repeat_name_hint = None; + result.push(field); + } + _ => result.push(field), + } + } + + for (repeat_name, mut items_list) in items_by_repeat_name { + items_list.sort_by_key(|f| f.repeat_index_hint.unwrap_or(0)); + match merge_field_group(&mut items_list, &repeat_name) { + Ok(merged) => result.push(merged), + Err(err) => { + merge_errors.push(err); + result.extend(items_list); + } + } + } + + result.sort_by_key(|f| f.shift); + (result, merge_errors) +} + +/// Same as `merge_fields`, but for registers. +pub fn merge_registers(registers: Vec) -> (Vec, Vec) { + let mut items_by_repeat_name: HashMap> = HashMap::new(); + let mut result = Vec::new(); + let mut merge_errors = Vec::new(); + + for mut register in registers { + match (®ister.repeat_name_hint, register.repeat_index_hint) { + (Some(name), Some(_)) => { + items_by_repeat_name + .entry(name.clone()) + .or_default() + .push(register); + } + (Some(name), None) => { + register.name = name.clone(); + register.repeat_name_hint = None; + result.push(register); + } + _ => result.push(register), + } + } + + for (repeat_name, mut items_list) in items_by_repeat_name { + items_list.sort_by_key(|r| r.repeat_index_hint.unwrap_or(0)); + match merge_register_group(&mut items_list, &repeat_name) { + Ok(merged) => result.push(merged), + Err(err) => { + merge_errors.push(err); + result.extend(items_list); + } + } + } + + result.sort_by_key(|r| r.addr); + (result, merge_errors) +} + +/// Actually merges one group of repeated fields into a single dim'd field. +fn merge_field_group(fields: &mut [Field], repeat_name: &str) -> Result { + let start = merge_get_start(fields, repeat_name)?; + for field in &fields[1..] { + if field.mask != fields[0].mask + || field.access != fields[0].access + || field.default != fields[0].default + || field.visible != fields[0].visible + || field.min_val != fields[0].min_val + || field.max_val != fields[0].max_val + { + return Err(MergeError(format!( + "Field {} differs from {}", + field.name, fields[0].name + ))); + } + } + let stride = merge_get_stride(repeat_name, fields, |f| f.shift)?; + let index_var = merge_get_index_var(repeat_name)?; + merge_validate_names(fields, &index_var, repeat_name, |f| &f.name)?; + merge_validate_descriptions( + fields, + &index_var, + |f| &f.name, + |f| f.description.clone(), + |f, d| f.description = d, + )?; + + let mut merged = fields[0].clone(); + merged.name = repeat_name.to_owned(); + merged.repeat = Some(Repeat::new(fields.len() as u32, stride, index_var, start)); + merged.repeat_name_hint = None; + merged.repeat_index_hint = None; + Ok(merged) +} + +/// Actually merges one group of repeated registers into a single dim'd register. +fn merge_register_group(registers: &mut [Register], repeat_name: &str) -> Result { + let start = merge_get_start(registers, repeat_name)?; + for register in ®isters[1..] { + if register.visible != registers[0].visible { + return Err(MergeError(format!( + "Register {} visible differs from {}", + register.name, registers[0].name + ))); + } + } + let stride = merge_get_stride(repeat_name, registers, |r| r.addr)?; + let index_var = merge_get_index_var(repeat_name)?; + merge_validate_names(registers, &index_var, repeat_name, |r| &r.name)?; + merge_validate_descriptions( + registers, + &index_var, + |r| &r.name, + |r| r.description.clone(), + |r, d| r.description = d, + )?; + + let mut merged = registers[0].clone(); + merged.name = repeat_name.to_owned(); + merged.repeat = Some(Repeat::new(registers.len() as u32, stride, index_var, start)); + merged.repeat_name_hint = None; + merged.repeat_index_hint = None; + Ok(merged) +} + +/// Checks repeat indices are consecutive (0, 1, 2 — not 0, 2, 5). +fn merge_get_start(items_list: &[T], repeat_name: &str) -> Result +where + T: RepeatHint, +{ + let value_0 = items_list[0].repeat_index_hint().unwrap_or(0); + for (idx, item) in items_list.iter().enumerate() { + if item.repeat_index_hint() != Some(value_0 + idx as i32) { + let indices: Vec<_> = items_list + .iter() + .map(|i| i.repeat_index_hint().unwrap_or(-1)) + .collect(); + return Err(MergeError(format!( + "Repeat indices for {repeat_name} should be consecutive integers starting from {value_0}. Got {indices:?}" + ))); + } + } + Ok(value_0) +} + +/// Computes the address/bit spacing between repeated items. +fn merge_get_stride(repeat_name: &str, items_list: &[T], get_offset: F) -> Result +where + F: Fn(&T) -> u32, +{ + if items_list.len() <= 1 { + return Ok(0); + } + let offsets: Vec = items_list.iter().map(get_offset).collect(); + let offset_0 = offsets[0]; + let offsets_from_0: Vec = offsets.iter().map(|v| v - offset_0).collect(); + let stride = offsets_from_0[1]; + if !offsets_from_0 + .iter() + .enumerate() + .all(|(idx, val)| *val == idx as u32 * stride) + { + return Err(MergeError(format!( + "Repeat offsets for {repeat_name} should be equally spaced. Got {offset_0} + {offsets_from_0:?}" + ))); + } + Ok(stride) +} + +/// Pulls the `$n` (or `$a`) variable out of a repeat name. +fn merge_get_index_var(repeat_name: &str) -> Result { + let index_vars: Vec<_> = INDEX_VAR_REGEX + .captures_iter(repeat_name) + .map(|c| c[1].to_owned()) + .collect(); + if index_vars.is_empty() { + return Err(MergeError(format!("No index vars found in name: {repeat_name}"))); + } + if index_vars.len() > 1 { + return Err(MergeError(format!( + "Multiple index vars not supported yet ({repeat_name})" + ))); + } + Ok(index_vars[0].clone()) +} + +/// Makes sure each item's real name matches what the repeat pattern expects. +fn merge_validate_names( + items_list: &[T], + index_var: &str, + repeat_name: &str, + get_name: F, +) -> Result<(), MergeError> +where + T: RepeatHint, + F: Fn(&T) -> &str, +{ + let start = items_list[0].repeat_index_hint().unwrap_or(0); + for (idx, item) in items_list.iter().enumerate() { + let mut ctx = ExpandContext::default(); + ctx.insert(index_var.to_owned(), ExpandValue::Int(start + idx as i32)); + let expanded_name = ctx.replace(repeat_name); + let real_name = get_name(item); + if !expanded_name.contains(real_name) { + return Err(MergeError(format!( + "Name {real_name} doesn't match repeat name {repeat_name} with index {}", + start + idx as i32 + ))); + } + } + Ok(()) +} + +/// Tries to merge descriptions that only differ by the index number. +fn merge_validate_descriptions( + items_list: &mut [T], + index_var: &str, + get_name: impl Fn(&T) -> &str, + get_desc: impl Fn(&T) -> String, + set_desc: impl Fn(&mut T, String), +) -> Result<(), MergeError> +where + T: RepeatHint + Clone, +{ + if items_list.len() < 2 { + return Ok(()); + } + + let item_0 = items_list[0].clone(); + let item_0_index = items_list[0].repeat_index_hint().unwrap_or(0); + let item_0_value = get_desc(&item_0); + let mut new_value = String::new(); + let mut replaced = vec![false; items_list.len()]; + + for (i, item) in items_list.iter().enumerate() { + let item_value = get_desc(item); + let item_index = item.repeat_index_hint().unwrap_or(i as i32); + if item_value == item_0_value { + continue; + } + let candidate = remove_index_from_strings( + &item_0_value, + &item_value, + item_0_index, + item_index, + &format!("${index_var}"), + ) + .map_err(MergeError)?; + if !new_value.is_empty() && new_value != candidate { + return Err(MergeError(format!( + "Failed to merge description of {} and {}", + get_name(&item_0), + get_name(item) + ))); + } + new_value = candidate; + replaced[i] = true; + } + + if replaced.iter().skip(1).all(|&x| !x) { + return Ok(()); + } + if replaced.iter().skip(1).all(|&x| x) { + for item in items_list.iter_mut() { + set_desc(item, new_value.clone()); + } + return Ok(()); + } + + Err(MergeError(format!( + "Failed to merge description of {}", + get_name(&item_0) + ))) +} + +/// Lets merge helpers read the repeat index from a field or register. +trait RepeatHint { + fn repeat_index_hint(&self) -> Option; +} + +impl RepeatHint for Field { + fn repeat_index_hint(&self) -> Option { + self.repeat_index_hint + } +} + +impl RepeatHint for Register { + fn repeat_index_hint(&self) -> Option { + self.repeat_index_hint + } +} diff --git a/xtask/src/regdesc/mod.rs b/xtask/src/regdesc/mod.rs new file mode 100644 index 0000000000..4fdf7949d1 --- /dev/null +++ b/xtask/src/regdesc/mod.rs @@ -0,0 +1,73 @@ +mod config; +mod csv; +mod merge; +mod model; +mod svd; +mod util; + +use std::fs; +use std::path::Path; + +use anyhow::{Context, Result}; + +use config::{chip_config_dir, load_descriptions, load_metadata, load_regdesc_config, peripheral_descriptions_path}; +use model::RegdescFragment; + +pub use config::default_output_path; + +/// Main entry: load config + CSVs, build the chip model, write an SVD file. +pub fn generate_base_svd(chip: &str, csv_dir: &Path, output: &Path, version: u32) -> Result<()> { + log::info!( + "Generating base SVD for {chip} (version {version}) using config {}", + chip_config_dir(chip).display() + ); + + let fragment = load_fragment(chip, csv_dir)?; + write_svd(output, &fragment, version) +} + +/// Reads all YAML config and CSV files and assembles one in-memory chip description. +fn load_fragment(chip: &str, csv_dir: &Path) -> Result { + let config_dir = chip_config_dir(chip); + let csv_map = load_regdesc_config(&config_dir.join("regdesc.yml"))?; + let (mut instances, interrupts) = load_metadata(&config_dir)?; + let descriptions = load_descriptions(&peripheral_descriptions_path())?; + + config::apply_instance_descriptions(&mut instances, &descriptions); + + let mut csv_files: Vec<_> = csv_map.keys().cloned().collect(); + csv_files.sort(); + + let mut peripherals = Vec::with_capacity(csv_files.len()); + for csv_file in csv_files { + let options = &csv_map[&csv_file]; + let csv_path = csv_dir.join(&csv_file); + let content = fs::read_to_string(&csv_path) + .with_context(|| format!("reading CSV {}", csv_path.display()))?; + + let mut peripheral = csv::read_peripheral_csv(&content, options.name.as_deref()) + .with_context(|| format!("parsing CSV {}", csv_path.display()))?; + + for err in peripheral.merge_registers_fields() { + log::warn!("merge warning in {csv_file}: {}", err.0); + } + + log::info!("parsed {csv_file} -> {}", peripheral.name); + peripherals.push(peripheral); + } + + Ok(config::build_fragment(chip, peripherals, instances, interrupts)) +} + +/// Turns the chip model into XML and saves it (creates parent dirs if needed). +fn write_svd(output: &Path, fragment: &RegdescFragment, version: u32) -> Result<()> { + let xml = svd::write_svd(fragment, version); + + if let Some(parent) = output.parent() { + fs::create_dir_all(parent)?; + } + fs::write(output, xml).with_context(|| format!("writing SVD to {}", output.display()))?; + + log::info!("Wrote {}", output.display()); + Ok(()) +} diff --git a/xtask/src/regdesc/model.rs b/xtask/src/regdesc/model.rs new file mode 100644 index 0000000000..1b0f5befe3 --- /dev/null +++ b/xtask/src/regdesc/model.rs @@ -0,0 +1,406 @@ +use std::collections::HashMap; + +use super::merge::{merge_fields, merge_registers, MergeError}; + +#[derive(Debug, Clone)] +pub struct Repeat { + pub count: u32, + pub stride: u32, + pub index_var: String, + pub start: i32, +} + +impl Repeat { + /// Creates a repeat spec (count, stride, index var, start index). + pub fn new(count: u32, stride: u32, index_var: impl Into, start: i32) -> Self { + Self { + count, + stride, + index_var: index_var.into(), + start, + } + } +} + +#[derive(Debug, Default, Clone)] +pub struct ExpandContext { + values: HashMap, +} + +#[derive(Debug, Clone)] +pub enum ExpandValue { + Int(i32), + Str(String), +} + +impl ExpandContext { + /// Stores a value for a `$placeholder`. + pub fn insert(&mut self, key: impl Into, value: ExpandValue) { + self.values.insert(key.into(), value); + } + + /// Substitutes `$n` etc. in a string with actual values. + pub fn replace(&self, text: &str) -> String { + let mut text = text.to_owned(); + for (placeholder, value) in &self.values { + let token = format!("${placeholder}"); + match value { + ExpandValue::Str(subst) => { + text = text.replace(&token, subst); + } + ExpandValue::Int(n) => { + text = text.replace(&token, &n.to_string()); + } + } + } + text + } +} + +#[derive(Debug, Clone)] +pub struct Field { + pub name: String, + pub shift: u32, + pub mask: u32, + pub access: String, + pub default: u64, + pub description: String, + pub visible: bool, + pub min_val: Option, + pub max_val: Option, + pub repeat: Option, + pub repeat_name_hint: Option, + pub repeat_index_hint: Option, +} + +impl Field { + /// How many bits this field covers (counts ones in the mask). + pub fn bit_width(&self) -> u32 { + self.mask.count_ones() + } + + /// Marks this field as "item N of a repeat group". + pub fn set_repeat_hint(&mut self, name: String, index: i32) { + self.repeat_name_hint = Some(name); + self.repeat_index_hint = Some(index); + } + + /// Spreads a repeated field into individual copies for SVD output. + pub fn expand(&self, ctx: &ExpandContext) -> Vec { + let repeat = self + .repeat + .clone() + .unwrap_or_else(|| Repeat::new(1, 0, "n", 0)); + let mut result = Vec::new(); + for i in 0..repeat.count { + let mut field = self.clone(); + field.repeat = None; + field.shift += repeat.stride * i; + let mut expand_ctx = ctx.clone(); + if self.repeat.is_some() && !expand_ctx.values.contains_key(&repeat.index_var) { + expand_ctx.insert(repeat.index_var.clone(), ExpandValue::Int(i as i32 + repeat.start)); + } + field.name = expand_ctx.replace(&field.name); + field.description = expand_ctx.replace(&field.description); + result.push(field); + } + result + } +} + +#[derive(Debug, Clone)] +pub struct Register { + pub name: String, + pub addr: u32, + pub fields: Vec, + pub description: String, + pub visible: bool, + pub size: u32, + pub repeat: Option, + pub repeat_name_hint: Option, + pub repeat_index_hint: Option, + pub is_mem_region: bool, + pub expand_context: ExpandContext, +} + +impl Register { + /// Computes the register reset value from all field defaults OR'd together. + pub fn reset_value(&self) -> u64 { + self.fields + .iter() + .fold(0u64, |acc, field| acc | (field.default << field.shift)) + } + + /// Marks this register as "item N of a repeat group". + pub fn set_repeat_hint(&mut self, name: String, index: i32) { + self.repeat_name_hint = Some(name); + self.repeat_index_hint = Some(index); + } + + /// Runs field merging on this register. + pub fn merge_fields(&mut self) -> Vec { + let (merged, errors) = merge_fields(std::mem::take(&mut self.fields)); + self.fields = merged; + errors + } + + /// Returns all fields after repeat expansion. + pub fn expanded_fields(&self) -> Vec { + let ctx = &self.expand_context; + let mut fields = Vec::new(); + for field in &self.fields { + fields.extend(field.expand(ctx)); + } + fields.sort_by_key(|f| f.shift); + fields + } + + /// Spreads a repeated register into individual copies. + pub fn expand(&self, ctx: &ExpandContext) -> Vec { + let repeat = self + .repeat + .clone() + .unwrap_or_else(|| Repeat::new(1, 0, "n", 0)); + let mut result = Vec::new(); + for i in 0..repeat.count { + let mut reg = self.clone(); + reg.repeat = None; + reg.addr += repeat.stride * i; + let mut expand_ctx = ctx.clone(); + if self.repeat.is_some() && !expand_ctx.values.contains_key(&repeat.index_var) { + expand_ctx.insert(repeat.index_var.clone(), ExpandValue::Int(i as i32 + repeat.start)); + } + reg.name = expand_ctx.replace(®.name); + reg.description = expand_ctx.replace(®.description); + result.push(reg); + } + result + } + + /// Swaps `$n` for `%s` (SVD dim syntax) before writing. + pub fn replace_placeholders(&self, sub_expr: &str) -> Register { + let mut reg = self.clone(); + if let Some(repeat) = &self.repeat { + let mut ctx = ExpandContext::default(); + ctx.insert(repeat.index_var.clone(), ExpandValue::Str(sub_expr.to_owned())); + reg.expand_context = ctx.clone(); + reg.name = ctx.replace(®.name); + reg.description = ctx.replace(®.description); + } + reg + } +} + +#[derive(Debug, Clone)] +pub struct RegisterGroup { + pub name: Option, + pub description: String, + pub registers: Vec, + pub visible: bool, + pub repeat: Option, + pub offset: u32, +} + +impl RegisterGroup { + /// Adds a register and keeps them sorted by address. + pub fn add_register(&mut self, reg: Register) { + self.registers.push(reg); + self.registers.sort_by_key(|r| r.addr); + } + + /// Runs register merging within this group. + pub fn merge_registers(&mut self) -> Vec { + let (merged, errors) = merge_registers(std::mem::take(&mut self.registers)); + self.registers = merged; + errors + } + + /// Returns all registers after group + register repeat expansion. + pub fn expanded_registers(&self) -> Vec { + let groups = if self.repeat.is_some() { + self.expand(&ExpandContext::default()) + } else { + vec![self.clone()] + }; + + let mut result = Vec::new(); + for group in groups { + for register in &group.registers { + let expanded = register.expand(&ExpandContext::default()); + for mut reg in expanded { + reg.addr += group.offset; + result.push(reg); + } + } + } + result.sort_by_key(|r| r.addr); + result + } + + /// Expands a repeated register group into copies. + fn expand(&self, ctx: &ExpandContext) -> Vec { + let repeat = self + .repeat + .clone() + .unwrap_or_else(|| Repeat::new(1, 0, "n", 0)); + let mut result = Vec::new(); + for i in 0..repeat.count { + let mut group = self.clone(); + group.repeat = None; + group.offset += repeat.stride * i; + let mut expand_ctx = ctx.clone(); + if self.repeat.is_some() && !expand_ctx.values.contains_key(&repeat.index_var) { + expand_ctx.insert(repeat.index_var.clone(), ExpandValue::Int(i as i32 + repeat.start)); + } + if let Some(name) = &group.name { + group.name = Some(expand_ctx.replace(name)); + } + result.push(group); + } + result + } +} + +#[derive(Debug, Clone)] +pub struct Peripheral { + pub name: String, + pub register_groups: Vec, + #[allow(dead_code)] + pub description: String, +} + +impl Peripheral { + /// Runs merge on all registers and fields in this peripheral. + pub fn merge_registers_fields(&mut self) -> Vec { + let mut errors = Vec::new(); + for group in &mut self.register_groups { + errors.extend(group.merge_registers()); + for register in &mut group.registers { + errors.extend(register.merge_fields()); + } + } + errors + } + + /// Flat list of all registers, sorted by address. + pub fn sorted_registers(&self) -> Vec { + let mut all: Vec<_> = self + .register_groups + .iter() + .flat_map(|g| g.expanded_registers()) + .collect(); + all.sort_by_key(|r| r.addr); + all + } +} + +#[derive(Debug, Clone)] +pub struct PeripheralInstance { + pub name: String, + pub peripheral: String, + pub base_addr: u32, + pub description: Option, +} + +#[derive(Debug, Clone)] +pub struct PeripheralInterrupt { + pub name: String, + pub instance: String, + pub value: u32, + pub description: Option, +} + +#[derive(Debug, Clone)] +pub struct ChipInfo { + pub name: String, + pub description: String, + pub cpu_name: String, + pub cpu_revision: String, + pub cpu_endian: String, + pub mpu_present: bool, + pub fpu_present: bool, + pub nvic_prio_bits: u32, + pub vendor_systick_config: bool, +} + +impl ChipInfo { + /// Builds chip metadata (CPU type, description, FPU, etc.) from `"esp32s31"`. + pub fn from_chip_id(chip: &str) -> Self { + let formal = super::util::pretty_chip_name(chip); + let description = match formal.as_str() { + "ESP32" => "32-bit MCU & 2.4 GHz Wi-Fi & Bluetooth/Bluetooth LE", + "ESP32-C2" => "32-bit RISC-V MCU & 2.4 GHz Wi-Fi & Bluetooth 5 (LE)", + "ESP32-C3" => "32-bit RISC-V MCU & 2.4 GHz Wi-Fi & Bluetooth 5 (LE)", + "ESP32-C5" => { + "32-bit RISC-V MCU & 2.4 and 5 GHz Wi-Fi 6 & Bluetooth 5 (LE) & IEEE 802.15.4" + } + "ESP32-C6" => { + "32-bit RISC-V MCU & 2.4 GHz Wi-Fi 6 & Bluetooth 5 (LE) & IEEE 802.15.4" + } + "ESP32-C6-LP" => "32-bit RISC-V MCU", + "ESP32-C61" => "32-bit RISC-V MCU & 2.4 GHz Wi-Fi 6 & Bluetooth 5 (LE)", + "ESP32-H2" => "32-bit RISC-V MCU & Bluetooth 5 (LE) & IEEE 802.15.4", + "ESP32-P4" => "32-bit RISC-V MCU", + "ESP32-S2" => "32-bit MCU & 2.4 GHz Wi-Fi", + "ESP32-S2-ULP" => "32-bit RISC-V MCU", + "ESP32-S3" => "32-bit MCU & 2.4 GHz Wi-Fi & Bluetooth 5 (LE)", + "ESP32-S3-ULP" => "32-bit RISC-V MCU", + "ESP32-S31" => { + "32-bit RISC-V MCU & 2.4 GHz Wi-Fi & Bluetooth 5 (LE) & IEEE 802.15.4" + } + _ => "No Chip Description", + } + .to_owned(); + + let cpu_name = match formal.as_str() { + "ESP32" => "Xtensa LX6", + "ESP32-S2" | "ESP32-S3" => "Xtensa LX7", + "ESP32-C2" | "ESP32-C3" | "ESP32-S2-ULP" | "ESP32-S3-ULP" => "RV32IMC", + "ESP32-P4" | "ESP32-S31" => "RV32IMAFC", + _ => "RV32IMAC", + } + .to_owned(); + + let fpu_present = matches!( + formal.as_str(), + "ESP32" | "ESP32-P4" | "ESP32-S3" | "ESP32-S31" + ); + + Self { + name: formal, + description, + cpu_name, + cpu_revision: "r0p0".to_owned(), + cpu_endian: "little".to_owned(), + mpu_present: false, + fpu_present, + nvic_prio_bits: 0, + vendor_systick_config: false, + } + } + + /// Returns the marketing series string like `"ESP32 S-Series"`. + pub fn series(&self) -> &str { + if self.name.contains("ULP") { + "RISC-V ULP" + } else if self.name.starts_with("ESP32-C") { + "ESP32 C-Series" + } else if self.name.starts_with("ESP32-H") { + "ESP32 H-Series" + } else if self.name.starts_with("ESP32-P") { + "ESP32 P-Series" + } else if self.name.starts_with("ESP32-S") { + "ESP32 S-Series" + } else { + "ESP32 Series" + } + } +} + +#[derive(Debug)] +pub struct RegdescFragment { + pub peripherals: Vec, + pub peripheral_instances: Vec, + pub peripheral_interrupts: Vec, + pub chip_info: ChipInfo, +} diff --git a/xtask/src/regdesc/svd.rs b/xtask/src/regdesc/svd.rs new file mode 100644 index 0000000000..4eb821eea9 --- /dev/null +++ b/xtask/src/regdesc/svd.rs @@ -0,0 +1,425 @@ +use std::fmt::Write as _; +use std::sync::LazyLock; + +use regex::Regex; + +use super::model::{ + ChipInfo, Peripheral, PeripheralInstance, PeripheralInterrupt, Register, RegdescFragment, + Repeat, +}; +use super::util::{guess_field_access, simplify_name}; + +static FIELD_DESC_INDEX: LazyLock = + LazyLock::new(|| Regex::new(r"(?i)\$[a-z]").unwrap()); + +/// Turns a chip model into a full SVD XML string. +pub fn write_svd(fragment: &RegdescFragment, version: u32) -> String { + let mut out = String::new(); + let chip = &fragment.chip_info; + + writeln!(out, "").unwrap(); + writeln!( + out, + "" + ) + .unwrap(); + + write_device_preamble(&mut out, chip, version); + write_cpu(&mut out, chip); + write_peripherals(&mut out, fragment); + + writeln!(out, "").unwrap(); + out +} + +/// Writes vendor, chip name, version, description, and the license block. +fn write_device_preamble(out: &mut String, chip: &ChipInfo, version: u32) { + let year = time_year(); + writeln!(out, " ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.").unwrap(); + writeln!(out, " ESPRESSIF").unwrap(); + writeln!(out, " {}", xml_escape(&chip.name)).unwrap(); + writeln!(out, " {}", xml_escape(chip.series())).unwrap(); + writeln!(out, " {version}").unwrap(); + writeln!( + out, + " {}", + xml_escape(&chip.description) + ) + .unwrap(); + writeln!(out, " ").unwrap(); + writeln!( + out, + " Copyright {year} Espressif Systems (Shanghai) PTE LTD" + ) + .unwrap(); + writeln!(out).unwrap(); + writeln!( + out, + " Licensed under the Apache License, Version 2.0 (the "License");" + ) + .unwrap(); + writeln!( + out, + " you may not use this file except in compliance with the License." + ) + .unwrap(); + writeln!(out, " You may obtain a copy of the License at").unwrap(); + writeln!(out).unwrap(); + writeln!( + out, + " http://www.apache.org/licenses/LICENSE-2.0" + ) + .unwrap(); + writeln!(out).unwrap(); + writeln!( + out, + " Unless required by applicable law or agreed to in writing, software" + ) + .unwrap(); + writeln!( + out, + " distributed under the License is distributed on an "AS IS" BASIS," + ) + .unwrap(); + writeln!( + out, + " WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied." + ) + .unwrap(); + writeln!( + out, + " See the License for the specific language governing permissions and" + ) + .unwrap(); + writeln!(out, " limitations under the License.").unwrap(); + writeln!(out, " ").unwrap(); +} + +/// Writes the `` section and global width/reset settings. +fn write_cpu(out: &mut String, chip: &ChipInfo) { + writeln!(out, " ").unwrap(); + writeln!(out, " {}", chip.cpu_name).unwrap(); + writeln!(out, " {}", chip.cpu_revision).unwrap(); + writeln!(out, " {}", chip.cpu_endian).unwrap(); + writeln!( + out, + " {}", + chip.mpu_present + ) + .unwrap(); + writeln!( + out, + " {}", + chip.fpu_present + ) + .unwrap(); + writeln!( + out, + " {}", + chip.nvic_prio_bits + ) + .unwrap(); + writeln!( + out, + " {}", + chip.vendor_systick_config + ) + .unwrap(); + writeln!(out, " ").unwrap(); + writeln!(out, " 32").unwrap(); + writeln!(out, " 32").unwrap(); + writeln!(out, " 0x00000000").unwrap(); + writeln!(out, " 0xFFFFFFFF").unwrap(); +} + +/// Loops all peripherals, matches them to instances, writes each block. +fn write_peripherals(out: &mut String, fragment: &RegdescFragment) { + writeln!(out, " ").unwrap(); + + let mut indices: Vec<_> = (0..fragment.peripherals.len()).collect(); + indices.sort_by_key(|&i| fragment.peripherals[i].name.as_str()); + + for i in indices { + let peripheral = &fragment.peripherals[i]; + let mut instances: Vec<_> = fragment + .peripheral_instances + .iter() + .filter(|instance| instance.peripheral == peripheral.name) + .cloned() + .collect(); + + if instances.is_empty() { + log::warn!("no instances found for peripheral '{}', skipping", peripheral.name); + continue; + } + + if instances.len() > 1 { + instances.sort_by(|a, b| a.name.cmp(&b.name)); + write_derived_peripheral(out, fragment, peripheral, &instances); + } else { + write_peripheral(out, fragment, peripheral, &instances[0]); + } + } + + writeln!(out, " ").unwrap(); +} + +/// Writes extra instances as `derivedFrom` stubs (same layout, different base addr). +fn write_derived_peripheral( + out: &mut String, + fragment: &RegdescFragment, + peripheral: &Peripheral, + instances: &[PeripheralInstance], +) { + let (first, rest) = instances.split_first().unwrap(); + write_peripheral(out, fragment, peripheral, first); + + for instance in rest { + writeln!(out, " ", first.name).unwrap(); + writeln!(out, " {}", xml_escape(&instance.name)).unwrap(); + writeln!( + out, + " {:#x}", + instance.base_addr + ) + .unwrap(); + if let Some(description) = &instance.description { + writeln!( + out, + " {}", + xml_escape(description) + ) + .unwrap(); + } + + let interrupts: Vec<_> = fragment + .peripheral_interrupts + .iter() + .filter(|i| i.instance == instance.name) + .collect(); + for interrupt in interrupts { + write_interrupt(out, interrupt); + } + + writeln!(out, " ").unwrap(); + } +} + +/// Writes one full peripheral block (name, address, interrupts, registers). +fn write_peripheral( + out: &mut String, + fragment: &RegdescFragment, + peripheral: &Peripheral, + instance: &PeripheralInstance, +) { + let description = instance + .description + .clone() + .unwrap_or_else(|| format!("Peripheral {}", instance.name)); + + writeln!(out, " ").unwrap(); + writeln!(out, " {}", xml_escape(&instance.name)).unwrap(); + writeln!( + out, + " {}", + xml_escape(&description) + ) + .unwrap(); + writeln!( + out, + " {}", + xml_escape(&peripheral.name) + ) + .unwrap(); + writeln!( + out, + " {:#x}", + instance.base_addr + ) + .unwrap(); + + write_address_block(out, peripheral); + + let interrupts: Vec<_> = fragment + .peripheral_interrupts + .iter() + .filter(|i| i.instance == instance.name) + .collect(); + for interrupt in interrupts { + write_interrupt(out, interrupt); + } + + write_registers(out, peripheral); + writeln!(out, " ").unwrap(); +} + +/// Writes the `` size summary. +fn write_address_block(out: &mut String, peripheral: &Peripheral) { + let size: u32 = peripheral.sorted_registers().iter().map(|r| r.size).sum(); + writeln!(out, " ").unwrap(); + writeln!(out, " 0x0").unwrap(); + writeln!(out, " {:#x}", size).unwrap(); + writeln!(out, " registers").unwrap(); + writeln!(out, " ").unwrap(); +} + +/// Writes one `` entry. +fn write_interrupt(out: &mut String, interrupt: &PeripheralInterrupt) { + writeln!(out, " ").unwrap(); + writeln!(out, " {}", xml_escape(&interrupt.name)).unwrap(); + writeln!(out, " {}", interrupt.value).unwrap(); + if let Some(description) = &interrupt.description { + writeln!( + out, + " {}", + xml_escape(description) + ) + .unwrap(); + } + writeln!(out, " ").unwrap(); +} + +/// Writes all registers for a peripheral (name cleanup, dim handling, etc.). +fn write_registers(out: &mut String, peripheral: &Peripheral) { + writeln!(out, " ").unwrap(); + + let mut registers: Vec = peripheral + .register_groups + .iter() + .flat_map(|g| g.registers.clone()) + .collect(); + registers.sort_by_key(|r| r.addr); + + for mut register in registers { + register = register.replace_placeholders("%s"); + register.name = simplify_name(&peripheral.name, ®ister.name); + + if register.is_mem_region { + register.name = format!("{}[%s]", register.name); + register.repeat = Some(Repeat::new(register.size, 1, "n", 0)); + register.size = 1; + } + + write_register(out, peripheral, ®ister); + } + + writeln!(out, " ").unwrap(); +} + +/// Writes one `` element. +fn write_register(out: &mut String, peripheral: &Peripheral, register: &Register) { + writeln!(out, " ").unwrap(); + if let Some(repeat) = ®ister.repeat { + if repeat.count > 1 { + writeln!(out, " {}", repeat.count).unwrap(); + writeln!( + out, + " {:#x}", + repeat.stride + ) + .unwrap(); + } + } + writeln!( + out, + " {}", + xml_escape(®ister.name) + ) + .unwrap(); + writeln!( + out, + " {}", + xml_escape(register.description.trim()) + ) + .unwrap(); + writeln!( + out, + " {:#x}", + register.addr + ) + .unwrap(); + writeln!(out, " {}", register.size * 8).unwrap(); + + let reset = register.reset_value(); + if reset != 0 { + writeln!(out, " {:#x}", reset).unwrap(); + } + + if !register.fields.is_empty() { + write_fields(out, peripheral, register); + } + + writeln!(out, " ").unwrap(); +} + +/// Writes all `` elements inside a register. +fn write_fields(out: &mut String, peripheral: &Peripheral, register: &Register) { + writeln!(out, " ").unwrap(); + + for mut field in register.expanded_fields() { + field.name = simplify_name(&peripheral.name, &field.name); + if field.name.starts_with(®ister.name) && field.name != register.name { + field.name = simplify_name(®ister.name, &field.name); + } + + if field.name.contains("%s") { + field.name = field.name.replace("%s", "").trim_end_matches('_').to_owned(); + } + + let mut description = field.description.clone(); + if FIELD_DESC_INDEX.is_match(&description) { + description = FIELD_DESC_INDEX + .replace_all(&description, field.shift.to_string()) + .into_owned(); + } + + writeln!(out, " ").unwrap(); + writeln!( + out, + " {}", + xml_escape(&field.name) + ) + .unwrap(); + let desc = if description.trim().is_empty() { + " ".to_owned() + } else { + description + }; + writeln!( + out, + " {}", + xml_escape(&desc) + ) + .unwrap(); + writeln!(out, " {}", field.shift).unwrap(); + writeln!(out, " {}", field.bit_width()).unwrap(); + if let Some(access) = guess_field_access(&field.access) { + writeln!(out, " {access}").unwrap(); + } else { + log::warn!("unrecognized field access value '{}', ignoring", field.access); + } + writeln!(out, " ").unwrap(); + } + + writeln!(out, " ").unwrap(); +} + +/// Escapes `&`, `<`, `>`, `"` so the XML doesn't break. +fn xml_escape(value: &str) -> String { + value + .replace('&', "&") + .replace('<', "<") + .replace('>', ">") + .replace('"', """) +} + +/// Gets the current year for the license header (no chrono dependency). +fn time_year() -> i32 { + use std::time::{SystemTime, UNIX_EPOCH}; + // Good enough for license header; avoids pulling in chrono. + let secs = SystemTime::now() + .duration_since(UNIX_EPOCH) + .map(|d| d.as_secs()) + .unwrap_or(0); + 1970 + (secs / 31_536_000) as i32 +} diff --git a/xtask/src/regdesc/util.rs b/xtask/src/regdesc/util.rs new file mode 100644 index 0000000000..593858c911 --- /dev/null +++ b/xtask/src/regdesc/util.rs @@ -0,0 +1,160 @@ +use regex::Regex; +use std::sync::LazyLock; + +static VERILOG_NUMBER: LazyLock = + LazyLock::new(|| Regex::new(r"(\d+)'([hdb])([0-9a-fA-F]+)").unwrap()); +static ACCESS_SUFFIX: LazyLock = + LazyLock::new(|| Regex::new(r"(/?SC|/?SS|/?WTC|/?WTS)+$").unwrap()); + +/// Parses Verilog-style literals like `32'hDEAD` into (value, width, base). +pub fn parse_verilog_number(s: &str) -> (u64, u32, u32) { + let Some(caps) = VERILOG_NUMBER.captures(s) else { + return (s.parse().unwrap_or(0), 0, 10); + }; + + let width = caps[1].parse().unwrap_or(0); + let base = match &caps[2] { + "b" => 2, + "d" => 10, + "h" => 16, + _ => 10, + }; + let value = u64::from_str_radix(&caps[3], base).unwrap_or(0); + (value, width, base) +} + +/// Finds where two descriptions differ only by an index and replaces it with `$n`. +pub fn remove_index_from_strings( + a: &str, + b: &str, + idx_a: i32, + idx_b: i32, + placeholder: &str, +) -> Result { + if a.is_empty() && b.is_empty() { + return Ok(String::new()); + } + if a == b { + return Ok(a.to_owned()); + } + + let idx_a_str = idx_a.to_string(); + let idx_b_str = idx_b.to_string(); + let len_common_prefix = idx_a_str + .chars() + .zip(idx_b_str.chars()) + .take_while(|(x, y)| x == y) + .count(); + + let mut pos_a = 0usize; + let mut pos_b = 0usize; + let mut res = String::new(); + let a_chars: Vec = a.chars().collect(); + let b_chars: Vec = b.chars().collect(); + + while pos_a < a_chars.len() { + if a_chars[pos_a] == b_chars[pos_b] { + res.push(a_chars[pos_a]); + pos_a += 1; + pos_b += 1; + continue; + } + + let a_suffix: String = a_chars[pos_a.saturating_sub(len_common_prefix)..] + .iter() + .collect(); + let b_suffix: String = b_chars[pos_b.saturating_sub(len_common_prefix)..] + .iter() + .collect(); + + if a_suffix.starts_with(&idx_a_str) && b_suffix.starts_with(&idx_b_str) { + if len_common_prefix > 0 { + res.truncate(res.len().saturating_sub(len_common_prefix)); + } + pos_a += idx_a_str.len() - len_common_prefix; + pos_b += idx_b_str.len() - len_common_prefix; + res.push_str(placeholder); + continue; + } + + return Err(format!( + "Strings '{a}' and '{b}' differ at positions {pos_a} and {pos_b}" + )); + } + + if pos_b < b_chars.len() { + return Err(format!( + "Strings '{a}' and '{b}' differ at positions {pos_a} and {pos_b}" + )); + } + + Ok(res) +} + +/// Trims spaces — GDVS CSVs love trailing whitespace. +pub fn trim(s: &str) -> &str { + s.trim_matches(' ') +} + +/// Strips peripheral prefixes so SVD names are shorter (`UART0_TX` → `TX`). +pub fn simplify_name(prefix: &str, name: &str) -> String { + let prefix_pattern = format!(r"(?i)^{}_", regex::escape(prefix)); + let prefix_re = Regex::new(&prefix_pattern).expect("valid prefix pattern"); + let mut name = prefix_re.replace(name, "").into_owned(); + + if prefix.eq_ignore_ascii_case("LP_IO") { + static LP_GPIO: LazyLock = + LazyLock::new(|| Regex::new(r"(?i)^LP_GPIO[\d]*_").unwrap()); + name = LP_GPIO.replace(&name, "").into_owned(); + } + + static REG_SUFFIX: LazyLock = + LazyLock::new(|| Regex::new(r"(?i)(_REG)+$").unwrap()); + name = REG_SUFFIX.replace(&name, "").into_owned(); + + if name + .chars() + .next() + .is_some_and(|c| c.is_ascii_digit()) + { + name = format!("_{name}"); + } + + name +} + +/// Maps CSV access strings (`RW`, `RO`, …) to CMSIS ones (`read-write`, etc.). +pub fn guess_field_access(access: &str) -> Option<&'static str> { + const READ_WRITE: &[&str] = &["RW", "RW1C", "RW1S", "W/R", "W1C"]; + const READ_ONLY: &[&str] = &["HRO", "R", "RC", "RO"]; + const WRITE_ONLY: &[&str] = &["W", "WO", "WS", "WT", "WOD", "WOR"]; + + /// Does the actual access-string matching (also tries stripping suffixes). + fn guess(access: &str) -> Option<&'static str> { + if access.contains("R/W") || READ_WRITE.contains(&access) { + return Some("read-write"); + } + if READ_ONLY.contains(&access) { + return Some("read-only"); + } + if WRITE_ONLY.contains(&access) { + return Some("write-only"); + } + None + } + + if let Some(access) = guess(access) { + return Some(access); + } + + let stripped = ACCESS_SUFFIX.replace(access, ""); + guess(&stripped) +} + +/// Turns `esp32s31` into `ESP32-S31` for the SVD header. +pub fn pretty_chip_name(chip: &str) -> String { + chip.to_ascii_uppercase() + .replace("ESP32", "ESP32-") + .trim_matches('-') + .to_owned() +} From 97fd5ae6a34b93423a16b367e43b44f7ff47244e Mon Sep 17 00:00:00 2001 From: Kirill Mikhailov Date: Thu, 30 Jul 2026 16:31:32 +0200 Subject: [PATCH 2/4] fix panics --- xtask/src/regdesc/svd.rs | 14 ++++++++++++++ xtask/src/regdesc/util.rs | 4 ++-- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/xtask/src/regdesc/svd.rs b/xtask/src/regdesc/svd.rs index 4eb821eea9..580370429e 100644 --- a/xtask/src/regdesc/svd.rs +++ b/xtask/src/regdesc/svd.rs @@ -318,6 +318,20 @@ fn write_register(out: &mut String, peripheral: &Peripheral, register: &Register repeat.stride ) .unwrap(); + // Emit dimIndex whenever the sequence doesn't start at 0 so two + // arrays that share a `%s` name (e.g. RMT TX `$n` vs RX `$m`) + // expand to distinct register names (CH0… vs CH2…). + if repeat.start != 0 { + let indices: Vec = (0..repeat.count) + .map(|i| (repeat.start + i as i32).to_string()) + .collect(); + writeln!( + out, + " {}", + indices.join(",") + ) + .unwrap(); + } } } writeln!( diff --git a/xtask/src/regdesc/util.rs b/xtask/src/regdesc/util.rs index 593858c911..61b34d360a 100644 --- a/xtask/src/regdesc/util.rs +++ b/xtask/src/regdesc/util.rs @@ -52,7 +52,7 @@ pub fn remove_index_from_strings( let a_chars: Vec = a.chars().collect(); let b_chars: Vec = b.chars().collect(); - while pos_a < a_chars.len() { + while pos_a < a_chars.len() && pos_b < b_chars.len() { if a_chars[pos_a] == b_chars[pos_b] { res.push(a_chars[pos_a]); pos_a += 1; @@ -82,7 +82,7 @@ pub fn remove_index_from_strings( )); } - if pos_b < b_chars.len() { + if pos_a != a_chars.len() || pos_b != b_chars.len() { return Err(format!( "Strings '{a}' and '{b}' differ at positions {pos_a} and {pos_b}" )); From ea1226732f230f7208ab3a68e03f5833070e8a0d Mon Sep 17 00:00:00 2001 From: Kirill Mikhailov Date: Wed, 5 Aug 2026 14:27:50 +0200 Subject: [PATCH 3/4] Minor fixes --- xtask/src/regdesc/config.rs | 13 ++- xtask/src/regdesc/csv.rs | 198 ++++++++++++++++++++++-------------- xtask/src/regdesc/merge.rs | 57 ++++++++++- xtask/src/regdesc/svd.rs | 12 +-- xtask/src/regdesc/util.rs | 69 +++++++++++-- 5 files changed, 255 insertions(+), 94 deletions(-) diff --git a/xtask/src/regdesc/config.rs b/xtask/src/regdesc/config.rs index b34c90f493..9d83d39886 100644 --- a/xtask/src/regdesc/config.rs +++ b/xtask/src/regdesc/config.rs @@ -152,10 +152,17 @@ pub fn build_fragment( /// Parses `"0x20343000"`-style addresses into a `u32`. fn parse_addr(value: &str) -> u32 { let value = value.trim(); - if let Some(hex) = value.strip_prefix("0x").or_else(|| value.strip_prefix("0X")) { - u32::from_str_radix(hex, 16).unwrap_or(0) + let parsed = if let Some(hex) = value.strip_prefix("0x").or_else(|| value.strip_prefix("0X")) { + u32::from_str_radix(hex, 16) } else { - value.parse().unwrap_or(0) + value.parse() + }; + match parsed { + Ok(addr) => addr, + Err(_) => { + log::warn!("invalid peripheral base address '{value}', using 0"); + 0 + } } } diff --git a/xtask/src/regdesc/csv.rs b/xtask/src/regdesc/csv.rs index fc462925e1..883c7621a9 100644 --- a/xtask/src/regdesc/csv.rs +++ b/xtask/src/regdesc/csv.rs @@ -20,6 +20,11 @@ const CSV_VERSION_1_2: i32 = 120; type CsvLine = std::collections::HashMap; +/// Trimmed column value, or `""` if the column is missing. +fn csv_field<'a>(line: &'a CsvLine, key: &str) -> &'a str { + trim(line.get(key).map(String::as_str).unwrap_or("")) +} + /// Feed it CSV text, get back a parsed `Peripheral`. pub fn read_peripheral_csv(content: &str, peripheral_name: Option<&str>) -> Result { let mut parser = CsvParser::new(content, peripheral_name)?; @@ -71,7 +76,7 @@ impl CsvParser { } for group in &mut groups { - group.visible = !group.registers.iter().all(|r| !r.visible); + group.visible = group.registers.iter().any(|r| r.visible); } Ok(Peripheral { @@ -84,12 +89,12 @@ impl CsvParser { /// Parses one register line (and the field rows that follow it). fn parse_register(&mut self, start: usize) -> Result<(Register, RegisterGroup, usize)> { let line = &self.lines[start]; - let reg_name = trim(line.get("RegName").map(String::as_str).unwrap_or("")); + let reg_name = csv_field(line, "RegName"); if reg_name.is_empty() { bail!("Expected a register definition at line {}", start + 2); } - let field_name = trim(line.get("Signal").map(String::as_str).unwrap_or("")); + let field_name = csv_field(line, "Signal"); if !field_name.is_empty() { bail!( "Field {field_name} cannot be defined on the same line as register {reg_name}" @@ -106,43 +111,7 @@ impl CsvParser { let register_group = extract_register_group(line, self.csv_version); let mem_size = extract_mem_size(line, self.csv_version, ®_name); - if mem_size == 0 { - self.validate_register_name(®_name)?; - - let repeat_info = self.extract_repeat(line); - self.last_repeat_num = repeat_info.as_ref().map(|(_, n)| *n); - - let (fields, consumed) = self.parse_fields(start + 1)?; - if fields.is_empty() { - bail!("Register {reg_name} doesn't have any fields defined"); - } - - let visible = if fields.iter().all(|f| !f.visible) { - false - } else { - visible - }; - - let mut register = Register { - name: reg_name, - addr: extract_reg_addr(line)?, - fields, - description, - visible, - size: 4, - repeat: None, - repeat_name_hint: None, - repeat_index_hint: None, - is_mem_region: false, - expand_context: ExpandContext::default(), - }; - - if let Some((repeat_name, repeat_num)) = repeat_info { - register.set_repeat_hint(repeat_name, repeat_num); - } - - Ok((register, register_group, consumed + 1)) - } else { + if mem_size != 0 { self.validate_mem_region_name(®_name)?; let register = Register { name: reg_name, @@ -157,8 +126,41 @@ impl CsvParser { is_mem_region: true, expand_context: ExpandContext::default(), }; - Ok((register, register_group, 1)) + return Ok((register, register_group, 1)); } + + self.validate_register_name(®_name)?; + + let repeat_info = self.extract_repeat(line); + self.last_repeat_num = repeat_info.as_ref().map(|(_, n)| *n); + + let (fields, consumed) = self.parse_fields(start + 1)?; + if fields.is_empty() { + bail!("Register {reg_name} doesn't have any fields defined"); + } + + // A register is hidden if the CSV marks it so, or every field is hidden. + let visible = visible && fields.iter().any(|f| f.visible); + + let mut register = Register { + name: reg_name, + addr: extract_reg_addr(line)?, + fields, + description, + visible, + size: 4, + repeat: None, + repeat_name_hint: None, + repeat_index_hint: None, + is_mem_region: false, + expand_context: ExpandContext::default(), + }; + + if let Some((repeat_name, repeat_num)) = repeat_info { + register.set_repeat_hint(repeat_name, repeat_num); + } + + Ok((register, register_group, consumed + 1)) } /// Grabs all field rows belonging to the current register. @@ -168,12 +170,13 @@ impl CsvParser { while idx < self.lines.len() { let line = &self.lines[idx]; - if !trim(line.get("RegName").map(String::as_str).unwrap_or("")).is_empty() { + if !csv_field(line, "RegName").is_empty() { break; } - let field_name = trim(line.get("Signal").map(String::as_str).unwrap_or("")); + let field_name = csv_field(line, "Signal"); if field_name.is_empty() { + // Reserved/gap rows sometimes keep BitPos but no Signal name. if extract_field_shift_mask(line).is_some() { idx += 1; continue; @@ -190,16 +193,15 @@ impl CsvParser { let (shift, mask) = extract_field_shift_mask(line) .context("Field missing bit position")?; let (min_val, max_val) = extract_min_max(line); - let (default, _, _) = parse_verilog_number( - trim(line.get("Default").map(String::as_str).unwrap_or("0")), - ); + let default_raw = csv_field(line, "Default"); + let (default, _, _) = + parse_verilog_number(if default_raw.is_empty() { "0" } else { default_raw }); let mut field = Field { name: field_name, shift, mask, - access: trim(line.get("SW(R/W)").map(String::as_str).unwrap_or("")) - .to_owned(), + access: csv_field(line, "SW(R/W)").to_owned(), default, description: extract_description(line), visible: extract_visible(line), @@ -223,11 +225,12 @@ impl CsvParser { /// Pulls out repeat info like `$n` and how many times it repeats. fn extract_repeat(&self, line: &CsvLine) -> Option<(String, i32)> { - let repeat_name = trim(line.get("RepeatName").map(String::as_str).unwrap_or("")); + let repeat_name = csv_field(line, "RepeatName"); if repeat_name.is_empty() { return None; } + // GDVS writes `$N`; normalize to `$n` so merge/expand share one index var. let mut repeat_name = repeat_name.to_ascii_uppercase(); repeat_name = REPEAT_LOWER .replace_all(&repeat_name, |caps: ®ex::Captures| { @@ -235,7 +238,7 @@ impl CsvParser { }) .into_owned(); - let num_str = trim(line.get("RepeatNum").map(String::as_str).unwrap_or("")); + let num_str = csv_field(line, "RepeatNum"); if num_str.is_empty() { return self.last_repeat_num.map(|n| (repeat_name, n)); } @@ -350,7 +353,7 @@ fn parse_csv_records(content: &str) -> Result<(i32, Vec)> { fn probe_peripheral_name(records: &[CsvLine], column: &str) -> Option { let names: Vec = records .iter() - .filter(|line| !trim(line.get("Address").map(String::as_str).unwrap_or("")).is_empty()) + .filter(|line| !csv_field(line, "Address").is_empty()) .filter_map(|line| line.get(column).cloned()) .filter(|name| !name.is_empty()) .collect(); @@ -383,7 +386,7 @@ fn common_prefix(values: &[String]) -> String { /// Parses the address column from a CSV row. fn extract_reg_addr(line: &CsvLine) -> Result { - let addr = trim(line.get("Address").map(String::as_str).unwrap_or("")); + let addr = csv_field(line, "Address"); let hex = addr .strip_prefix("0x") .or_else(|| addr.strip_prefix("0X")) @@ -393,7 +396,7 @@ fn extract_reg_addr(line: &CsvLine) -> Result { /// Figures out memory region size from the `NonReg` column. fn extract_mem_size(line: &CsvLine, csv_version: i32, reg_name: &str) -> u32 { - let nonreg_val = trim(line.get("NonReg").map(String::as_str).unwrap_or("")); + let nonreg_val = csv_field(line, "NonReg"); if nonreg_val.is_empty() { return 0; } @@ -418,47 +421,42 @@ fn extract_mem_size(line: &CsvLine, csv_version: i32, reg_name: &str) -> u32 { /// Grabs the description text from a row. fn extract_description(line: &CsvLine) -> String { - trim(line.get("Description").map(String::as_str).unwrap_or("")).to_owned() + csv_field(line, "Description").to_owned() } /// Checks if a row is marked public/visible (empty `Public` column = yes). fn extract_visible(line: &CsvLine) -> bool { - matches!( - trim(line.get("Public").map(String::as_str).unwrap_or("")), - "" - ) + csv_field(line, "Public").is_empty() } /// Pulls alternate register/field names from `RegName_Chg_0`. fn extract_alt_names(line: &CsvLine) -> Vec { - let alt = trim(line.get("RegName_Chg_0").map(String::as_str).unwrap_or("")); + let alt = csv_field(line, "RegName_Chg_0"); if alt.is_empty() { Vec::new() } else { - alt.split_whitespace().map(|s| s.to_ascii_uppercase()).collect() + alt.split_whitespace() + .map(|s| s.to_ascii_uppercase()) + .collect() } } /// Reads min/max value columns if present. fn extract_min_max(line: &CsvLine) -> (Option, Option) { - let min_str = trim(line.get("Min_Value").map(String::as_str).unwrap_or("")); - let max_str = trim(line.get("Max_Value").map(String::as_str).unwrap_or("")); - let min_val = if min_str.is_empty() { - None - } else { - min_str.parse().ok() - }; - let max_val = if max_str.is_empty() { - None - } else { - max_str.parse().ok() + let parse = |key| { + let value = csv_field(line, key); + if value.is_empty() { + None + } else { + value.parse().ok() + } }; - (min_val, max_val) + (parse("Min_Value"), parse("Max_Value")) } /// Builds a register group from `GroupName` / `GroupIdentifier`. fn extract_register_group(line: &CsvLine, csv_version: i32) -> RegisterGroup { - let group_desc = trim(line.get("GroupName").map(String::as_str).unwrap_or("")); + let group_desc = csv_field(line, "GroupName"); let description = if group_desc.is_empty() { "Default".to_owned() } else { @@ -467,7 +465,7 @@ fn extract_register_group(line: &CsvLine, csv_version: i32) -> RegisterGroup { let name = if csv_version < CSV_VERSION_1_2 { None } else { - let id = trim(line.get("GroupIdentifier").map(String::as_str).unwrap_or("")); + let id = csv_field(line, "GroupIdentifier"); if id.is_empty() { None } else { @@ -487,7 +485,7 @@ fn extract_register_group(line: &CsvLine, csv_version: i32) -> RegisterGroup { /// Parses `[7:0]`-style bit positions into (shift, mask). fn extract_field_shift_mask(line: &CsvLine) -> Option<(u32, u32)> { - let bitpos = trim(line.get("BitPos").map(String::as_str).unwrap_or("")); + let bitpos = csv_field(line, "BitPos"); if bitpos.is_empty() { return None; } @@ -498,6 +496,9 @@ fn extract_field_shift_mask(line: &CsvLine) -> Option<(u32, u32)> { } let high = caps[2].parse::().ok()?; let low = caps[3].parse::().ok()?; + if high < low { + return None; + } let width = high - low + 1; let mask = if width >= 32 { u32::MAX @@ -506,3 +507,50 @@ fn extract_field_shift_mask(line: &CsvLine) -> Option<(u32, u32)> { }; Some((low, mask)) } + +#[cfg(test)] +mod tests { + use super::*; + + fn line(pairs: &[(&str, &str)]) -> CsvLine { + pairs + .iter() + .map(|(k, v)| ((*k).to_owned(), (*v).to_owned())) + .collect() + } + + #[test] + fn bitpos_single_and_range() { + assert_eq!( + extract_field_shift_mask(&line(&[("BitPos", "[3]")])), + Some((3, 0x1)) + ); + assert_eq!( + extract_field_shift_mask(&line(&[("BitPos", "[7:0]")])), + Some((0, 0xff)) + ); + assert_eq!( + extract_field_shift_mask(&line(&[("BitPos", "[31:0]")])), + Some((0, u32::MAX)) + ); + assert_eq!(extract_field_shift_mask(&line(&[("BitPos", "[2:5]")])), None); + } + + #[test] + fn mem_size_v12_depth_times_word() { + let l = line(&[("NonReg", "16*32")]); + assert_eq!(extract_mem_size(&l, CSV_VERSION_1_2, "X_MEM"), 64); + } + + #[test] + fn probe_name_from_common_prefix() { + let records = vec![ + line(&[("Address", "0x0"), ("RegName", "UART0_CLK_REG")]), + line(&[("Address", "0x4"), ("RegName", "UART0_STATUS_REG")]), + ]; + assert_eq!( + probe_peripheral_name(&records, "RegName").as_deref(), + Some("UART0") + ); + } +} diff --git a/xtask/src/regdesc/merge.rs b/xtask/src/regdesc/merge.rs index 87e5bb591d..78119d44d9 100644 --- a/xtask/src/regdesc/merge.rs +++ b/xtask/src/regdesc/merge.rs @@ -184,7 +184,15 @@ where } let offsets: Vec = items_list.iter().map(get_offset).collect(); let offset_0 = offsets[0]; - let offsets_from_0: Vec = offsets.iter().map(|v| v - offset_0).collect(); + let mut offsets_from_0 = Vec::with_capacity(offsets.len()); + for &offset in &offsets { + let Some(delta) = offset.checked_sub(offset_0) else { + return Err(MergeError(format!( + "Repeat offsets for {repeat_name} are not monotonically increasing. Got {offsets:?}" + ))); + }; + offsets_from_0.push(delta); + } let stride = offsets_from_0[1]; if !offsets_from_0 .iter() @@ -320,3 +328,50 @@ impl RepeatHint for Register { self.repeat_index_hint } } + +#[cfg(test)] +mod tests { + use super::*; + use crate::regdesc::model::Field; + + fn field(name: &str, shift: u32, index: i32) -> Field { + Field { + name: name.to_owned(), + shift, + mask: 0x1, + access: "RW".to_owned(), + default: 0, + description: format!("bit {index}"), + visible: true, + min_val: None, + max_val: None, + repeat: None, + repeat_name_hint: Some("BIT$n".to_owned()), + repeat_index_hint: Some(index), + } + } + + #[test] + fn merge_fields_consecutive() { + let (merged, errors) = merge_fields(vec![ + field("BIT0", 0, 0), + field("BIT1", 1, 1), + field("BIT2", 2, 2), + ]); + assert!(errors.is_empty()); + assert_eq!(merged.len(), 1); + let repeat = merged[0].repeat.as_ref().unwrap(); + assert_eq!(repeat.count, 3); + assert_eq!(repeat.stride, 1); + assert_eq!(repeat.start, 0); + assert_eq!(merged[0].name, "BIT$n"); + } + + #[test] + fn merge_fields_gap_keeps_originals() { + let (merged, errors) = merge_fields(vec![field("BIT0", 0, 0), field("BIT2", 2, 2)]); + assert_eq!(errors.len(), 1); + assert_eq!(merged.len(), 2); + } +} + diff --git a/xtask/src/regdesc/svd.rs b/xtask/src/regdesc/svd.rs index 580370429e..eb166d5c1e 100644 --- a/xtask/src/regdesc/svd.rs +++ b/xtask/src/regdesc/svd.rs @@ -322,15 +322,11 @@ fn write_register(out: &mut String, peripheral: &Peripheral, register: &Register // arrays that share a `%s` name (e.g. RMT TX `$n` vs RX `$m`) // expand to distinct register names (CH0… vs CH2…). if repeat.start != 0 { - let indices: Vec = (0..repeat.count) + let indices: String = (0..repeat.count) .map(|i| (repeat.start + i as i32).to_string()) - .collect(); - writeln!( - out, - " {}", - indices.join(",") - ) - .unwrap(); + .collect::>() + .join(","); + writeln!(out, " {indices}").unwrap(); } } } diff --git a/xtask/src/regdesc/util.rs b/xtask/src/regdesc/util.rs index 61b34d360a..19c8781500 100644 --- a/xtask/src/regdesc/util.rs +++ b/xtask/src/regdesc/util.rs @@ -5,6 +5,10 @@ static VERILOG_NUMBER: LazyLock = LazyLock::new(|| Regex::new(r"(\d+)'([hdb])([0-9a-fA-F]+)").unwrap()); static ACCESS_SUFFIX: LazyLock = LazyLock::new(|| Regex::new(r"(/?SC|/?SS|/?WTC|/?WTS)+$").unwrap()); +static REG_SUFFIX: LazyLock = + LazyLock::new(|| Regex::new(r"(?i)(_REG)+$").unwrap()); +static LP_GPIO: LazyLock = + LazyLock::new(|| Regex::new(r"(?i)^LP_GPIO[\d]*_").unwrap()); /// Parses Verilog-style literals like `32'hDEAD` into (value, width, base). pub fn parse_verilog_number(s: &str) -> (u64, u32, u32) { @@ -96,20 +100,24 @@ pub fn trim(s: &str) -> &str { s.trim_matches(' ') } +/// Case-insensitive ASCII strip of `prefix_` from the start of `name`. +fn strip_prefix_ci<'a>(name: &'a str, prefix: &str) -> Option<&'a str> { + let needle = format!("{prefix}_"); + let (head, rest) = name.split_at_checked(needle.len())?; + head.eq_ignore_ascii_case(&needle).then_some(rest) +} + /// Strips peripheral prefixes so SVD names are shorter (`UART0_TX` → `TX`). pub fn simplify_name(prefix: &str, name: &str) -> String { - let prefix_pattern = format!(r"(?i)^{}_", regex::escape(prefix)); - let prefix_re = Regex::new(&prefix_pattern).expect("valid prefix pattern"); - let mut name = prefix_re.replace(name, "").into_owned(); + let mut name = match strip_prefix_ci(name, prefix) { + Some(rest) => rest.to_owned(), + None => name.to_owned(), + }; if prefix.eq_ignore_ascii_case("LP_IO") { - static LP_GPIO: LazyLock = - LazyLock::new(|| Regex::new(r"(?i)^LP_GPIO[\d]*_").unwrap()); name = LP_GPIO.replace(&name, "").into_owned(); } - static REG_SUFFIX: LazyLock = - LazyLock::new(|| Regex::new(r"(?i)(_REG)+$").unwrap()); name = REG_SUFFIX.replace(&name, "").into_owned(); if name @@ -158,3 +166,50 @@ pub fn pretty_chip_name(chip: &str) -> String { .trim_matches('-') .to_owned() } + +#[cfg(test)] +mod tests { + use super::*; + + #[test] + fn verilog_and_plain_defaults() { + assert_eq!(parse_verilog_number("32'hff"), (0xff, 32, 16)); + assert_eq!(parse_verilog_number("8'b1010"), (0b1010, 8, 2)); + assert_eq!(parse_verilog_number("42"), (42, 0, 10)); + assert_eq!(parse_verilog_number(""), (0, 0, 10)); + } + + #[test] + fn remove_index_basic_and_unequal_len() { + assert_eq!( + remove_index_from_strings("ch0 status", "ch1 status", 0, 1, "$n").unwrap(), + "ch$n status" + ); + assert!(remove_index_from_strings("short", "much longer text", 0, 1, "$n").is_err()); + assert!(remove_index_from_strings("much longer text", "short", 0, 1, "$n").is_err()); + } + + #[test] + fn simplify_name_strips_prefix_and_reg() { + assert_eq!(simplify_name("UART0", "UART0_STATUS_REG"), "STATUS"); + assert_eq!(simplify_name("UART0", "uart0_status_reg"), "status"); + assert_eq!(simplify_name("GPIO", "GPIO_1"), "_1"); + assert_eq!(simplify_name("SPI", "OTHER_REG"), "OTHER"); + } + + #[test] + fn access_mapping_and_suffix_strip() { + assert_eq!(guess_field_access("R/W"), Some("read-write")); + assert_eq!(guess_field_access("RO"), Some("read-only")); + assert_eq!(guess_field_access("WT"), Some("write-only")); + assert_eq!(guess_field_access("RW/SC"), Some("read-write")); + assert_eq!(guess_field_access("NOPE"), None); + } + + #[test] + fn pretty_chip_name_examples() { + assert_eq!(pretty_chip_name("esp32s31"), "ESP32-S31"); + assert_eq!(pretty_chip_name("esp32"), "ESP32"); + assert_eq!(pretty_chip_name("esp32h2"), "ESP32-H2"); + } +} From 5e889dd86f86867b1d9908e59aaaa230e3fac079 Mon Sep 17 00:00:00 2001 From: Kirill Mikhailov Date: Wed, 5 Aug 2026 16:54:13 +0200 Subject: [PATCH 4/4] no need in noisy yml files, parse from IDF instead --- xtask/regdesc/chips/esp32/interrupts.yml | 208 ------- xtask/regdesc/chips/esp32/peripherals.yml | 139 ----- xtask/regdesc/chips/esp32/regdesc.yml | 2 - xtask/regdesc/chips/esp32c2/interrupts.yml | 131 ----- xtask/regdesc/chips/esp32c2/peripherals.yml | 82 --- xtask/regdesc/chips/esp32c2/regdesc.yml | 43 -- xtask/regdesc/chips/esp32c3/interrupts.yml | 187 ------- xtask/regdesc/chips/esp32c3/peripherals.yml | 112 ---- xtask/regdesc/chips/esp32c3/regdesc.yml | 51 -- xtask/regdesc/chips/esp32c5/interrupts.yml | 256 --------- xtask/regdesc/chips/esp32c5/peripherals.yml | 229 -------- xtask/regdesc/chips/esp32c5/regdesc.yml | 61 --- xtask/regdesc/chips/esp32c6-lp/interrupts.yml | 25 - .../regdesc/chips/esp32c6-lp/peripherals.yml | 40 -- xtask/regdesc/chips/esp32c6-lp/regdesc.yml | 15 - xtask/regdesc/chips/esp32c6/interrupts.yml | 232 -------- xtask/regdesc/chips/esp32c6/peripherals.yml | 199 ------- xtask/regdesc/chips/esp32c6/regdesc.yml | 96 ---- xtask/regdesc/chips/esp32h2/interrupts.yml | 196 ------- xtask/regdesc/chips/esp32h2/peripherals.yml | 190 ------- xtask/regdesc/chips/esp32h2/regdesc.yml | 77 --- xtask/regdesc/chips/esp32p4/interrupts.yml | 385 ------------- xtask/regdesc/chips/esp32p4/peripherals.yml | 275 ---------- xtask/regdesc/chips/esp32p4/regdesc.yml | 97 ---- .../regdesc/chips/esp32s2-ulp/interrupts.yml | 28 - .../regdesc/chips/esp32s2-ulp/peripherals.yml | 13 - xtask/regdesc/chips/esp32s2-ulp/regdesc.yml | 3 - xtask/regdesc/chips/esp32s2/interrupts.yml | 286 ---------- xtask/regdesc/chips/esp32s2/peripherals.yml | 130 ----- xtask/regdesc/chips/esp32s2/regdesc.yml | 39 -- .../regdesc/chips/esp32s3-ulp/interrupts.yml | 37 -- .../regdesc/chips/esp32s3-ulp/peripherals.yml | 13 - xtask/regdesc/chips/esp32s3-ulp/regdesc.yml | 9 - xtask/regdesc/chips/esp32s3/interrupts.yml | 286 ---------- xtask/regdesc/chips/esp32s3/peripherals.yml | 163 ------ xtask/regdesc/chips/esp32s3/regdesc.yml | 78 --- xtask/regdesc/chips/esp32s31/interrupts.yml | 510 ------------------ xtask/regdesc/chips/esp32s31/peripherals.yml | 334 ------------ xtask/regdesc/chips/esp32s31/regdesc.yml | 106 ---- xtask/src/main.rs | 26 +- xtask/src/regdesc/config.rs | 152 ++---- xtask/src/regdesc/csv.rs | 95 ++-- xtask/src/regdesc/idf.rs | 213 ++++++++ xtask/src/regdesc/merge.rs | 84 +-- xtask/src/regdesc/mod.rs | 116 +++- xtask/src/regdesc/model.rs | 34 +- xtask/src/regdesc/svd.rs | 126 +++-- xtask/src/regdesc/util.rs | 65 +-- 48 files changed, 513 insertions(+), 5761 deletions(-) delete mode 100644 xtask/regdesc/chips/esp32/interrupts.yml delete mode 100644 xtask/regdesc/chips/esp32/peripherals.yml delete mode 100644 xtask/regdesc/chips/esp32/regdesc.yml delete mode 100644 xtask/regdesc/chips/esp32c2/interrupts.yml delete mode 100644 xtask/regdesc/chips/esp32c2/peripherals.yml delete mode 100644 xtask/regdesc/chips/esp32c2/regdesc.yml delete mode 100644 xtask/regdesc/chips/esp32c3/interrupts.yml delete mode 100644 xtask/regdesc/chips/esp32c3/peripherals.yml delete mode 100644 xtask/regdesc/chips/esp32c3/regdesc.yml delete mode 100644 xtask/regdesc/chips/esp32c5/interrupts.yml delete mode 100644 xtask/regdesc/chips/esp32c5/peripherals.yml delete mode 100644 xtask/regdesc/chips/esp32c5/regdesc.yml delete mode 100644 xtask/regdesc/chips/esp32c6-lp/interrupts.yml delete mode 100644 xtask/regdesc/chips/esp32c6-lp/peripherals.yml delete mode 100644 xtask/regdesc/chips/esp32c6-lp/regdesc.yml delete mode 100644 xtask/regdesc/chips/esp32c6/interrupts.yml delete mode 100644 xtask/regdesc/chips/esp32c6/peripherals.yml delete mode 100644 xtask/regdesc/chips/esp32c6/regdesc.yml delete mode 100644 xtask/regdesc/chips/esp32h2/interrupts.yml delete mode 100644 xtask/regdesc/chips/esp32h2/peripherals.yml delete mode 100644 xtask/regdesc/chips/esp32h2/regdesc.yml delete mode 100644 xtask/regdesc/chips/esp32p4/interrupts.yml delete mode 100644 xtask/regdesc/chips/esp32p4/peripherals.yml delete mode 100644 xtask/regdesc/chips/esp32p4/regdesc.yml delete mode 100644 xtask/regdesc/chips/esp32s2-ulp/interrupts.yml delete mode 100644 xtask/regdesc/chips/esp32s2-ulp/peripherals.yml delete mode 100644 xtask/regdesc/chips/esp32s2-ulp/regdesc.yml delete mode 100644 xtask/regdesc/chips/esp32s2/interrupts.yml delete mode 100644 xtask/regdesc/chips/esp32s2/peripherals.yml delete mode 100644 xtask/regdesc/chips/esp32s2/regdesc.yml delete mode 100644 xtask/regdesc/chips/esp32s3-ulp/interrupts.yml delete mode 100644 xtask/regdesc/chips/esp32s3-ulp/peripherals.yml delete mode 100644 xtask/regdesc/chips/esp32s3-ulp/regdesc.yml delete mode 100644 xtask/regdesc/chips/esp32s3/interrupts.yml delete mode 100644 xtask/regdesc/chips/esp32s3/peripherals.yml delete mode 100644 xtask/regdesc/chips/esp32s3/regdesc.yml delete mode 100644 xtask/regdesc/chips/esp32s31/interrupts.yml delete mode 100644 xtask/regdesc/chips/esp32s31/peripherals.yml delete mode 100644 xtask/regdesc/chips/esp32s31/regdesc.yml create mode 100644 xtask/src/regdesc/idf.rs diff --git a/xtask/regdesc/chips/esp32/interrupts.yml b/xtask/regdesc/chips/esp32/interrupts.yml deleted file mode 100644 index a7011abf5b..0000000000 --- a/xtask/regdesc/chips/esp32/interrupts.yml +++ /dev/null @@ -1,208 +0,0 @@ -peripheral_interrupts: - - name: WIFI_MAC - instance: DPORT - value: 0 - - name: WIFI_NMI - instance: DPORT - value: 1 - - name: WIFI_BB - instance: DPORT - value: 2 - - name: BT_MAC - instance: DPORT - value: 3 - - name: BT_BB - instance: DPORT - value: 4 - - name: BT_BB_NMI - instance: DPORT - value: 5 - - name: RWBT - instance: DPORT - value: 6 - - name: RWBLE - instance: DPORT - value: 7 - - name: RWBT_NMI - instance: DPORT - value: 8 - - name: RWBLE_NMI - instance: DPORT - value: 9 - - name: SLC0 - instance: SLC0 - value: 10 - - name: SLC1 - instance: SLC1 - value: 11 - - name: UHCI0 - instance: UHCI0 - value: 12 - - name: UHCI1 - instance: UHCI1 - value: 13 - - name: TG0_T0_LEVEL - instance: TIMG0 - value: 14 - - name: TG0_T1_LEVEL - instance: TIMG0 - value: 15 - - name: TG0_WDT_LEVEL - instance: TIMG0 - value: 16 - - name: TG0_LACT_LEVEL - instance: TIMG0 - value: 17 - - name: TG1_T0_LEVEL - instance: TIMG1 - value: 18 - - name: TG1_T1_LEVEL - instance: TIMG1 - value: 19 - - name: TG1_WDT_LEVEL - instance: TIMG1 - value: 20 - - name: TG1_LACT_LEVEL - instance: TIMG1 - value: 21 - - name: GPIO - instance: GPIO - value: 22 - - name: GPIO_NMI - instance: GPIO - value: 23 - - name: FROM_CPU_INTR0 - instance: DPORT - value: 24 - - name: FROM_CPU_INTR1 - instance: DPORT - value: 25 - - name: FROM_CPU_INTR2 - instance: DPORT - value: 26 - - name: FROM_CPU_INTR3 - instance: DPORT - value: 27 - - name: SPI0 - instance: SPI0 - value: 28 - - name: SPI1 - instance: SPI1 - value: 29 - - name: SPI2 - instance: SPI2 - value: 30 - - name: SPI3 - instance: SPI3 - value: 31 - - name: I2S0 - instance: I2S0 - value: 32 - - name: I2S1 - instance: I2S1 - value: 33 - - name: UART0 - instance: UART0 - value: 34 - - name: UART1 - instance: UART1 - value: 35 - - name: UART2 - instance: UART2 - value: 36 - - name: SDIO_HOST - instance: DPORT - value: 37 - - name: ETH_MAC - instance: DPORT - value: 38 - - name: MCPWM0 - instance: MCPWM0 - value: 39 - - name: MCPWM1 - instance: MCPWM0 - value: 40 - - name: MCPWM2 - instance: MCPWM0 - value: 41 - - name: MCPWM3 - instance: MCPWM0 - value: 42 - - name: LEDC - instance: LEDC - value: 43 - - name: EFUSE - instance: EFUSE - value: 44 - - name: TWAI0 - instance: TWAI0 - value: 45 - - name: RTC_CORE - instance: RTC_CNTL - value: 46 - - name: RMT - instance: RMT - value: 47 - - name: PCNT - instance: PCNT - value: 48 - - name: I2C_EXT0 - instance: I2C0 - value: 49 - - name: I2C_EXT1 - instance: I2C1 - value: 50 - - name: RSA - instance: RSA - value: 51 - - name: SPI1_DMA - instance: SPI1 - value: 52 - - name: SPI2_DMA - instance: SPI2 - value: 53 - - name: SPI3_DMA - instance: SPI3 - value: 54 - - name: WDT - instance: DPORT - value: 55 - - name: TIMER1 - instance: LEDC - value: 56 - - name: TIMER2 - instance: LEDC - value: 57 - - name: TG0_T0_EDGE - instance: TIMG0 - value: 58 - - name: TG0_T1_EDGE - instance: TIMG0 - value: 59 - - name: TG0_WDT_EDGE - instance: TIMG0 - value: 60 - - name: TG0_LACT_EDGE - instance: TIMG0 - value: 61 - - name: TG1_T0_EDGE - instance: TIMG1 - value: 62 - - name: TG1_T1_EDGE - instance: TIMG1 - value: 63 - - name: TG1_WDT_EDGE - instance: TIMG1 - value: 64 - - name: TG1_LACT_EDGE - instance: TIMG1 - value: 65 - - name: MMU_IA - instance: DPORT - value: 66 - - name: MPU_IA - instance: DPORT - value: 67 - - name: CACHE_IA - instance: DPORT - value: 68 diff --git a/xtask/regdesc/chips/esp32/peripherals.yml b/xtask/regdesc/chips/esp32/peripherals.yml deleted file mode 100644 index c6c4a3c886..0000000000 --- a/xtask/regdesc/chips/esp32/peripherals.yml +++ /dev/null @@ -1,139 +0,0 @@ -peripheral_instances: - - name: AES - peripheral: AES - base_addr: 0x3ff01000 - - name: APB_CTRL - peripheral: APB_CTRL - base_addr: 0x3ff66000 - - name: BB - peripheral: BB - base_addr: 0x3ff5D000 - - name: DPORT - peripheral: DPORT - base_addr: 0x3ff00000 - - name: EFUSE - peripheral: EFUSE - base_addr: 0x3ff5a000 - - name: EMAC_DMA - peripheral: EMAC_DMA - base_addr: 0x3ff69000 - - name: EMAC_EXT - peripheral: EMAC_EXT - base_addr: 0x3ff69800 - - name: EMAC_MAC - peripheral: EMAC_MAC - base_addr: 0x3ff6A000 - - name: FLASH_ENCRYPTION - peripheral: FLASH_ENCRYPTION - base_addr: 0x3ff46000 - - name: FRC_TIMER - peripheral: FRC - base_addr: 0x3ff47000 - - name: GPIO - peripheral: GPIO - base_addr: 0x3ff44000 - - name: GPIO_SD - peripheral: GPIO_SIGMADELTA - base_addr: 0x3ff44f00 - - name: HINF - peripheral: HINF - base_addr: 0x3ff4B000 - - name: I2C0 - peripheral: I2C - base_addr: 0x3ff53000 - - name: I2C1 - peripheral: I2C - base_addr: 0x3ff67000 - - name: I2S0 - peripheral: I2S - base_addr: 0x3ff4f000 - - name: I2S1 - peripheral: I2S - base_addr: 0x3FF6D000 - - name: IO_MUX - peripheral: IO_MUX - base_addr: 0x3ff49000 - - name: LEDC - peripheral: LEDC - base_addr: 0x3ff59000 - - name: MCPWM0 - peripheral: MCPWM - base_addr: 0x3ff5E000 - - name: MCPWM1 - peripheral: MCPWM - base_addr: 0x3ff6C000 - - name: NRX - peripheral: NRX - base_addr: 0x3ff5CC00 - - name: PCNT - peripheral: PCNT - base_addr: 0x3ff57000 - - name: RMT - peripheral: RMT - base_addr: 0x3ff56000 - - name: RNG - peripheral: RNG - base_addr: 0x60035000 - - name: RSA - peripheral: RSA - base_addr: 0x3ff02000 - - name: RTC_CNTL - peripheral: RTC_CNTL - base_addr: 0x3ff48000 - - name: RTC_IO - peripheral: RTC_GPIO - base_addr: 0x3ff48400 - - name: RTC_I2C - peripheral: RTC_I2C - base_addr: 0x3ff48C00 - - name: SDHOST - peripheral: SDHOST - base_addr: 0x3ff68000 - - name: SENS - peripheral: SENS - base_addr: 0x3ff48800 - - name: SHA - peripheral: SHA - base_addr: 0x3ff03000 - - name: SLC - peripheral: SLC - base_addr: 0x3ff58000 - - name: SLCHOST - peripheral: SLCHOST - base_addr: 0x3ff55000 - - name: SPI0 - peripheral: SPI - base_addr: 0x3ff43000 - - name: SPI1 - peripheral: SPI - base_addr: 0x3ff42000 - - name: SPI2 - peripheral: SPI - base_addr: 0x3ff64000 - - name: SPI3 - peripheral: SPI - base_addr: 0x3ff65000 - - name: TIMG0 - peripheral: TIMG - base_addr: 0x3ff5F000 - - name: TIMG1 - peripheral: TIMG - base_addr: 0x3ff60000 - - name: TWAI0 - peripheral: TWAI - base_addr: 0x3ff6B000 - - name: UART0 - peripheral: UART - base_addr: 0x3ff40000 - - name: UART1 - peripheral: UART - base_addr: 0x3ff50000 - - name: UART2 - peripheral: UART - base_addr: 0x3ff6e000 - - name: UHCI0 - peripheral: UHCI - base_addr: 0x3ff54000 - - name: UHCI1 - peripheral: UHCI - base_addr: 0x3ff4C000 diff --git a/xtask/regdesc/chips/esp32/regdesc.yml b/xtask/regdesc/chips/esp32/regdesc.yml deleted file mode 100644 index 623da7beb0..0000000000 --- a/xtask/regdesc/chips/esp32/regdesc.yml +++ /dev/null @@ -1,2 +0,0 @@ ---- -twai_reg.csv: {} diff --git a/xtask/regdesc/chips/esp32c2/interrupts.yml b/xtask/regdesc/chips/esp32c2/interrupts.yml deleted file mode 100644 index d07dfadc46..0000000000 --- a/xtask/regdesc/chips/esp32c2/interrupts.yml +++ /dev/null @@ -1,131 +0,0 @@ -peripheral_interrupts: - - name: WIFI_MAC - instance: INTERRUPT_CORE0 - value: 0 - - name: WIFI_MAC_NMI - instance: INTERRUPT_CORE0 - value: 1 - - name: WIFI_PWR - instance: INTERRUPT_CORE0 - value: 2 - - name: WIFI_BB - instance: INTERRUPT_CORE0 - value: 3 - - name: BT_MAC - instance: INTERRUPT_CORE0 - value: 4 - - name: BT_BB - instance: INTERRUPT_CORE0 - value: 5 - - name: BT_BB_NMI - instance: INTERRUPT_CORE0 - value: 6 - - name: LP_TIMER - instance: INTERRUPT_CORE0 - value: 7 - - name: COEX - instance: INTERRUPT_CORE0 - value: 8 - - name: BLE_TIMER - instance: INTERRUPT_CORE0 - value: 9 - - name: BLE_SEC - instance: INTERRUPT_CORE0 - value: 10 - - name: I2C_MST - instance: I2C0 - value: 11 - - name: APB_CTRL - instance: APB_CTRL - value: 12 - - name: GPIO - instance: GPIO - value: 13 - - name: GPIO_NMI - instance: GPIO - value: 14 - - name: SPI_INTR_1 - instance: SPI2 - value: 15 - - name: SPI_INTR_2 - instance: SPI2 - value: 16 - - name: UART0 - instance: UART0 - value: 17 - - name: UART1 - instance: UART1 - value: 18 - - name: LEDC - instance: LEDC - value: 19 - - name: EFUSE - instance: EFUSE - value: 20 - - name: RTC_CORE - instance: RTC_CNTL - value: 21 - - name: I2C_EXT0 - instance: I2C0 - value: 22 - - name: TG0_T0_LEVEL - instance: TIMG0 - value: 23 - - name: TG0_WDT_LEVEL - instance: TIMG0 - value: 24 - - name: CACHE_IA - instance: INTERRUPT_CORE0 - value: 25 - - name: SYSTIMER_TARGET0 - instance: SYSTIMER - value: 26 - - name: SYSTIMER_TARGET1 - instance: SYSTIMER - value: 27 - - name: SYSTIMER_TARGET2 - instance: SYSTIMER - value: 28 - - name: SPI_MEM_REJECT_CACHE - instance: SPI0 - value: 29 - - name: ICACHE_PRELOAD0 - instance: INTERRUPT_CORE0 - value: 30 - - name: ICACHE_SYNC0 - instance: INTERRUPT_CORE0 - value: 31 - - name: APB_ADC - instance: APB_SARADC - value: 32 - - name: DMA_CH0 - instance: DMA - value: 33 - - name: SHA - instance: SHA - value: 34 - - name: ECC - instance: INTERRUPT_CORE0 - value: 35 - - name: FROM_CPU_INTR0 - instance: INTERRUPT_CORE0 - value: 36 - - name: FROM_CPU_INTR1 - instance: INTERRUPT_CORE0 - value: 37 - - name: FROM_CPU_INTR2 - instance: INTERRUPT_CORE0 - value: 38 - - name: FROM_CPU_INTR3 - instance: INTERRUPT_CORE0 - value: 39 - - name: ASSIST_DEBUG - description: Assist debug interrupt - instance: ASSIST_DEBUG - value: 40 - - name: ETS_CORE0_PIF_PMS_SIZE - instance: INTERRUPT_CORE0 - value: 41 - - name: ETS_CACHE_CORE0_ACS - instance: - value: 42 diff --git a/xtask/regdesc/chips/esp32c2/peripherals.yml b/xtask/regdesc/chips/esp32c2/peripherals.yml deleted file mode 100644 index 000276dd7d..0000000000 --- a/xtask/regdesc/chips/esp32c2/peripherals.yml +++ /dev/null @@ -1,82 +0,0 @@ -peripheral_instances: - - name: APB_CTRL - peripheral: APB_CTRL - base_addr: 0x60026000 - - name: APB_SARADC - peripheral: APB_SARADC - base_addr: 0x60040000 - - name: ASSIST_DEBUG - peripheral: ASSIST_DEBUG - base_addr: 0x600ce000 - - name: BB - peripheral: BB - base_addr: 0x6001D000 - - name: DMA - peripheral: DMA - base_addr: 0x6003f000 - - name: EFUSE - peripheral: EFUSE - base_addr: 0x60008800 - - name: ECC - peripheral: ECC - base_addr: 0x6003e000 - - name: EXTMEM - peripheral: EXTMEM - base_addr: 0x600c4000 - - name: GPIO - peripheral: GPIO - base_addr: 0x60004000 - - name: I2C0 - peripheral: I2C - base_addr: 0x60013000 - - name: INTERRUPT_CORE0 - peripheral: INTERRUPT_CORE0 - base_addr: 0x600c2000 - - name: IO_MUX - peripheral: IO_MUX - base_addr: 0x60009000 - - name: LEDC - peripheral: LEDC - base_addr: 0x60019000 - - name: MODEM_CLKRST - peripheral: MODEM_CLKRST - base_addr: 0x6004d800 - - name: RNG - peripheral: RNG - base_addr: 0x60026000 - - name: RTC_CNTL - peripheral: RTC_CNTL - base_addr: 0x60008000 - - name: SENSITIVE - peripheral: SENSITIVE - base_addr: 0x600c1000 - - name: SHA - peripheral: SHA - base_addr: 0x6003b000 - - name: SPI0 - peripheral: SPI0 - base_addr: 0x60003000 - - name: SPI1 - peripheral: SPI1 - base_addr: 0x60002000 - - name: SPI2 - peripheral: SPI2 - base_addr: 0x60024000 - - name: SYSTIMER - peripheral: SYSTIMER - base_addr: 0x60023000 - - name: SYSTEM - peripheral: SYSTEM - base_addr: 0x600c0000 - - name: TIMG0 - peripheral: TIMG - base_addr: 0x6001F000 - - name: UART0 - peripheral: UART - base_addr: 0x60000000 - - name: UART1 - peripheral: UART - base_addr: 0x60010000 - - name: XTS_AES - peripheral: XTS_AES - base_addr: 0x600CC000 diff --git a/xtask/regdesc/chips/esp32c2/regdesc.yml b/xtask/regdesc/chips/esp32c2/regdesc.yml deleted file mode 100644 index 23f95f0ec9..0000000000 --- a/xtask/regdesc/chips/esp32c2/regdesc.yml +++ /dev/null @@ -1,43 +0,0 @@ ---- -apb_ctrl_reg.csv: {} -apb_saradc_reg.csv: - name: APB_SARADC - wno: - - reg-names - - field-names -assist_debug_reg.csv: {} -dma_reg.csv: {} -ecc_mult_reg.csv: - name: ECC - wno: - - field-names -efuse_software.csv: {} -extmem_reg.csv: {} -gpio_reg.csv: {} -i2c_ext.csv: {} -interrupt_core0_reg.csv: {} -io_mux_reg.csv: {} -ledc_6ch_reg_for_trm.csv: {} -rtc_cntl_reg_sw_pass_for_trm.csv: {} -sensitive_reg.csv: {} -sha_reg_for_trm.csv: {} -spi1_mem_reg.csv: - name: SPI1 - wno: - - reg-names - - field-names -spi2_reg.csv: - name: SPI2 - wno: - - reg-names - - field-names -spi_mem_reg.csv: - name: SPI0 - wno: - - reg-names - - field-names -sys_timer_reg_for_trm.csv: {} -system_reg.csv: {} -timers_single_reg_for_trm.csv: {} -Uart_reg.csv: {} -xts_aes_reg_for_trm.csv: {} diff --git a/xtask/regdesc/chips/esp32c3/interrupts.yml b/xtask/regdesc/chips/esp32c3/interrupts.yml deleted file mode 100644 index dbb988a5a0..0000000000 --- a/xtask/regdesc/chips/esp32c3/interrupts.yml +++ /dev/null @@ -1,187 +0,0 @@ -peripheral_interrupts: - - name: WIFI_MAC - instance: INTERRUPT_CORE0 - value: 0 - - name: WIFI_MAC_NMI - instance: INTERRUPT_CORE0 - value: 1 - - name: WIFI_PWR - instance: INTERRUPT_CORE0 - value: 2 - - name: WIFI_BB - instance: INTERRUPT_CORE0 - value: 3 - - name: BT_MAC - instance: INTERRUPT_CORE0 - value: 4 - - name: BT_BB - instance: INTERRUPT_CORE0 - value: 5 - - name: BT_BB_NMI - instance: INTERRUPT_CORE0 - value: 6 - - name: RWBT - instance: INTERRUPT_CORE0 - value: 7 - - name: RWBLE - instance: INTERRUPT_CORE0 - value: 8 - - name: RWBT_NMI - instance: INTERRUPT_CORE0 - value: 9 - - name: RWBLE_NMI - instance: INTERRUPT_CORE0 - value: 10 - - name: I2C_MASTER - instance: I2C0 - value: 11 - - name: SLC0 - instance: INTERRUPT_CORE0 - value: 12 - - name: SLC1 - instance: INTERRUPT_CORE0 - value: 13 - - name: APB_CTRL - instance: APB_CTRL - value: 14 - - name: UHCI0 - instance: UHCI0 - value: 15 - - name: GPIO - instance: GPIO - value: 16 - - name: GPIO_NMI - instance: GPIO - value: 17 - - name: SPI1 - instance: SPI1 - value: 18 - - name: SPI2 - instance: SPI2 - value: 19 - - name: I2S0 - instance: I2S0 - value: 20 - - name: UART0 - instance: UART0 - value: 21 - - name: UART1 - instance: UART1 - value: 22 - - name: LEDC - instance: LEDC - value: 23 - - name: EFUSE - instance: EFUSE - value: 24 - - name: TWAI0 - instance: TWAI0 - value: 25 - - name: USB_DEVICE - instance: USB_DEVICE - value: 26 - - name: RTC_CORE - instance: RTC_CNTL - value: 27 - - name: RMT - instance: RMT - value: 28 - - name: I2C_EXT0 - instance: I2C0 - value: 29 - - name: TIMER1 - instance: LEDC - value: 30 - - name: TIMER2 - instance: LEDC - value: 31 - - name: TG0_T0_LEVEL - instance: TIMG0 - value: 32 - - name: TG0_WDT_LEVEL - instance: TIMG0 - value: 33 - - name: TG1_T0_LEVEL - instance: TIMG1 - value: 34 - - name: TG1_WDT_LEVEL - instance: TIMG1 - value: 35 - - name: CACHE_IA - instance: INTERRUPT_CORE0 - value: 36 - - name: SYSTIMER_TARGET0 - instance: SYSTIMER - value: 37 - - name: SYSTIMER_TARGET1 - instance: SYSTIMER - value: 38 - - name: SYSTIMER_TARGET2 - instance: SYSTIMER - value: 39 - - name: SPI_MEM_REJECT_CACHE - instance: SPI0 - value: 40 - - name: ICACHE_PRELOAD0 - instance: INTERRUPT_CORE0 - value: 41 - - name: ICACHE_SYNC0 - instance: INTERRUPT_CORE0 - value: 42 - - name: APB_ADC - instance: APB_SARADC - value: 43 - - name: DMA_CH0 - instance: DMA - value: 44 - - name: DMA_CH1 - instance: DMA - value: 45 - - name: DMA_CH2 - instance: DMA - value: 46 - - name: RSA - instance: RSA - value: 47 - - name: AES - instance: AES - value: 48 - - name: SHA - instance: SHA - value: 49 - - name: FROM_CPU_INTR0 - instance: INTERRUPT_CORE0 - value: 50 - - name: FROM_CPU_INTR1 - instance: INTERRUPT_CORE0 - value: 51 - - name: FROM_CPU_INTR2 - instance: INTERRUPT_CORE0 - value: 52 - - name: FROM_CPU_INTR3 - instance: INTERRUPT_CORE0 - value: 53 - - name: ASSIST_DEBUG - instance: ASSIST_DEBUG - value: 54 - - name: DMA_APBPERI_PMS - instance: DMA - value: 55 - - name: CORE0_IRAM0_PMS - instance: INTERRUPT_CORE0 - value: 56 - - name: CORE0_DRAM0_PMS - instance: INTERRUPT_CORE0 - value: 57 - - name: CORE0_PIF_PMS - instance: INTERRUPT_CORE0 - value: 58 - - name: CORE0_PIF_PMS_SIZE - instance: INTERRUPT_CORE0 - value: 59 - - name: BAK_PMS_VIOLATE - instance: INTERRUPT_CORE0 - value: 60 - - name: CACHE_CORE0_ACS - instance: INTERRUPT_CORE0 - value: 61 diff --git a/xtask/regdesc/chips/esp32c3/peripherals.yml b/xtask/regdesc/chips/esp32c3/peripherals.yml deleted file mode 100644 index 27603a486f..0000000000 --- a/xtask/regdesc/chips/esp32c3/peripherals.yml +++ /dev/null @@ -1,112 +0,0 @@ -peripheral_instances: - - name: AES - peripheral: AES - base_addr: 0x6003a000 - - name: APB_CTRL - peripheral: APB_CTRL - base_addr: 0x60026000 - - name: APB_SARADC - peripheral: APB_SARADC - base_addr: 0x60040000 - - name: ASSIST_DEBUG - peripheral: ASSIST_DEBUG - base_addr: 0x600ce000 - - name: BB - peripheral: BB - base_addr: 0x6001D000 - - name: DMA - peripheral: DMA - base_addr: 0x6003f000 - - name: DS - peripheral: DS - base_addr: 0x6003d000 - - name: EFUSE - peripheral: EFUSE - base_addr: 0x60008800 - - name: EXTMEM - peripheral: EXTMEM - base_addr: 0x600c4000 - - name: GPIO - peripheral: GPIO - base_addr: 0x60004000 - - name: GPIO_SD - peripheral: GPIOSD - base_addr: 0x60004f00 - - name: HMAC - peripheral: HMAC - base_addr: 0x6003e000 - - name: I2C0 - peripheral: I2C - base_addr: 0x60013000 - - name: I2S0 - peripheral: I2S - base_addr: 0x6002d000 - - name: INTERRUPT_CORE0 - peripheral: INTERRUPT_CORE0 - base_addr: 0x600c2000 - - name: IO_MUX - peripheral: IO_MUX - base_addr: 0x60009000 - - name: LEDC - peripheral: LEDC - base_addr: 0x60019000 - - name: RMT - peripheral: RMT - base_addr: 0x60016000 - - name: RNG - peripheral: RNG - base_addr: 0x60026000 - - name: RSA - peripheral: RSA - base_addr: 0x6003c000 - - name: RTC_CNTL - peripheral: RTC_CNTL - base_addr: 0x60008000 - - name: SENSITIVE - peripheral: SENSITIVE - base_addr: 0x600c1000 - - name: SHA - peripheral: SHA - base_addr: 0x6003b000 - - name: SPI0 - peripheral: SPI0 - base_addr: 0x60003000 - - name: SPI1 - peripheral: SPI1 - base_addr: 0x60002000 - - name: SPI2 - peripheral: SPI2 - base_addr: 0x60024000 - - name: SYSTEM - peripheral: SYSTEM - base_addr: 0x600c0000 - - name: SYSTIMER - peripheral: SYSTIMER - base_addr: 0x60023000 - - name: TIMG0 - peripheral: TIMG - base_addr: 0x6001f000 - - name: TIMG1 - peripheral: TIMG - base_addr: 0x60020000 - - name: TWAI0 - peripheral: TWAI - base_addr: 0x6002B000 - - name: UART0 - peripheral: UART - base_addr: 0x60000000 - - name: UART1 - peripheral: UART - base_addr: 0x60010000 - - name: UHCI0 - peripheral: UHCI - base_addr: 0x60014000 - - name: UHCI1 - peripheral: UHCI - base_addr: 0x6000c000 - - name: USB_DEVICE - peripheral: USB_DEVICE - base_addr: 0x60043000 - - name: XTS_AES - peripheral: XTS_AES - base_addr: 0x600cc000 diff --git a/xtask/regdesc/chips/esp32c3/regdesc.yml b/xtask/regdesc/chips/esp32c3/regdesc.yml deleted file mode 100644 index aabd26b0c3..0000000000 --- a/xtask/regdesc/chips/esp32c3/regdesc.yml +++ /dev/null @@ -1,51 +0,0 @@ ---- -aes_reg.csv: {} -apb_ctrl_reg.csv: {} -apb_saradc_sw_pass.csv: {} -assist_debug_reg.csv: {} -core0_interrupt_reg.csv: {} -dma_reg.csv: {} -ds_reg.csv: - name: DS - wno: - - overlap -efuse_software_0720.csv: {} -extmem_reg_726.csv: {} -gpio_reg.csv: {} -gpio_sd_reg.csv: {} -hmac_reg.csv: - name: HMAC - wno: - - overlap -i2c_ext_sw.csv: {} -i2s1_reg.csv: {} -io_mux_reg.csv: {} -ledc_6ch_reg_sw.csv: {} -rmt_reg_sw.csv: {} -rsa_reg.csv: {} -rtc_cntl_reg_sw_pass.csv: {} -sensitive_reg.csv: {} -sha_reg.csv: {} -spi1_mem_reg.csv: - name: SPI1 - wno: - - reg-names - - field-names -spi2_reg.csv: - name: SPI2 - wno: - - reg-names - - field-names -spi_mem_reg.csv: - name: SPI0 - wno: - - reg-names - - field-names -sys_timer_reg_sw.csv: {} -system_reg.csv: {} -timers_single_reg_sw.csv: {} -twai_reg.csv: {} -Uart_reg.csv: {} -uhci_reg.csv: {} -usb_device_reg.csv: {} -xts_aes_reg.csv: {} diff --git a/xtask/regdesc/chips/esp32c5/interrupts.yml b/xtask/regdesc/chips/esp32c5/interrupts.yml deleted file mode 100644 index 9b988ef0d1..0000000000 --- a/xtask/regdesc/chips/esp32c5/interrupts.yml +++ /dev/null @@ -1,256 +0,0 @@ -peripheral_interrupts: -- name: WIFI_MAC - instance: INTERRUPT_CORE0 - value: 0 -- name: WIFI_MAC_NMI - instance: INTERRUPT_CORE0 - value: 1 -- name: WIFI_PWR - instance: INTERRUPT_CORE0 - value: 2 -- name: WIFI_BB - instance: INTERRUPT_CORE0 - value: 3 -- name: BT_MAC - instance: INTERRUPT_CORE0 - value: 4 -- name: BT_BB - instance: INTERRUPT_CORE0 - value: 5 -- name: BT_BB_NMI - instance: INTERRUPT_CORE0 - value: 6 -- name: LP_TIMER - instance: INTERRUPT_CORE0 - value: 7 -- name: COEX - instance: INTERRUPT_CORE0 - value: 8 -- name: BLE_TIMER - instance: INTERRUPT_CORE0 - value: 9 -- name: BLE_SEC - instance: INTERRUPT_CORE0 - value: 10 -- name: I2C_MASTER - instance: I2C0 - value: 11 -- name: ZB_MAC - instance: INTERRUPT_CORE0 - value: 12 -- name: PMU - instance: PMU - value: 13 -- name: EFUSE - instance: EFUSE - value: 14 -- name: LP_RTC_TIMER - instance: LP_TIMER - value: 15 -- name: LP_UART - instance: LP_UART - value: 16 -- name: LP_I2C - instance: LP_I2C0 - value: 17 -- name: LP_WDT - instance: LP_WDT - value: 18 -- name: LP_PERI_TIMEOUT - instance: LP_PERI - value: 19 -- name: LP_APM_M0 - instance: LP_APM0 - value: 20 -- name: LP_APM_M1 - instance: LP_APM0 - value: 21 -- name: HUK - instance: HUK - value: 22 -- name: FROM_CPU_INTR0 - instance: INTERRUPT_CORE0 - value: 23 -- name: FROM_CPU_INTR1 - instance: INTERRUPT_CORE0 - value: 24 -- name: FROM_CPU_INTR2 - instance: INTERRUPT_CORE0 - value: 25 -- name: FROM_CPU_INTR3 - instance: INTERRUPT_CORE0 - value: 26 -# - name: ASSIST_DEBUG -# instance: INTERRUPT_CORE0 -# value: 27 -- name: TRACE - instance: TRACE - value: 28 -- name: CACHE - instance: INTERRUPT_CORE0 - value: 29 -- name: CPU_PERI_TIMEOUT - instance: INTERRUPT_CORE0 - value: 30 -- name: GPIO - instance: GPIO - value: 31 -- name: GPIO_EXT - instance: GPIO_EXT - value: 32 -- name: PAU - instance: PAU - value: 33 -- name: HP_PERI_TIMEOUT - instance: HP_SYS - value: 34 -- name: MODEM_PERI_TIMEOUT - instance: HP_SYS - value: 35 -- name: HP_APM_M0 - instance: HP_APM - value: 36 -- name: HP_APM_M1 - instance: HP_APM - value: 37 -- name: HP_APM_M2 - instance: HP_APM - value: 38 -- name: HP_APM_M3 - instance: HP_APM - value: 39 -- name: HP_APM_M4 - instance: HP_APM - value: 40 -- name: LP_APM0 - instance: LP_APM0 - value: 41 -- name: CPU_APM_M0 - instance: INTERRUPT_CORE0 - value: 42 -- name: CPU_APM_M1 - instance: INTERRUPT_CORE0 - value: 43 -- name: MSPI - instance: SPI0 - value: 44 -- name: I2S - instance: I2S0 - value: 45 -- name: UHCI0 - instance: UHCI0 - value: 46 -- name: UART0 - instance: UART0 - value: 47 -- name: UART1 - instance: UART1 - value: 48 -- name: LEDC - instance: LEDC - value: 49 -- name: TWAI0 - instance: TWAI0 - value: 50 -- name: TWAI0_TIMER - instance: TWAI0 - value: 51 -- name: TWAI1 - instance: TWAI1 - value: 52 -- name: TWAI1_TIMER - instance: TWAI1 - value: 53 -- name: USB_SERIAL_JTAG - instance: USB_DEVICE - value: 54 -- name: RMT - instance: RMT - value: 55 -- name: I2C_EXT0 - instance: I2C0 - value: 56 -- name: TG0_T0_LEVEL - instance: TIMG0 - value: 57 -- name: TG0_WDT_LEVEL - instance: TIMG0 - value: 58 -- name: TG1_T0_LEVEL - instance: TIMG1 - value: 59 -- name: TG1_WDT_LEVEL - instance: TIMG1 - value: 60 -- name: SYSTIMER_TARGET0 - instance: SYSTIMER - value: 61 -- name: SYSTIMER_TARGET1 - instance: SYSTIMER - value: 62 -- name: SYSTIMER_TARGET2 - instance: SYSTIMER - value: 63 -- name: APB_ADC - instance: APB_SARADC - value: 64 -- name: MCPWM0 - instance: MCPWM0 - value: 65 -- name: PCNT - instance: PCNT - value: 66 -- name: PARL_IO_TX - instance: PARL_IO - value: 67 -- name: PARL_IO_RX - instance: PARL_IO - value: 68 -- name: SLC0 - instance: SLCHOST - value: 69 -- name: SLC1 - instance: SLCHOST - value: 70 -# - name: DMA_IN_CH0 -# instance: TODO -# value: 71 -# - name: DMA_IN_CH1 -# instance: TODO -# value: 72 -# - name: DMA_IN_CH2 -# instance: TODO -# value: 73 -# - name: DMA_OUT_CH0 -# instance: TODO -# value: 74 -# - name: DMA_OUT_CH1 -# instance: TODO -# value: 75 -# - name: DMA_OUT_CH2 -# instance: TODO -# value: 76 -- name: GPSPI2 - instance: SPI2 - value: 77 -- name: AES - instance: AES - value: 78 -- name: SHA - instance: SHA - value: 79 -- name: RSA - instance: RSA - value: 80 -- name: ECC - instance: ECC - value: 81 -- name: ECDSA - instance: ECDSA - value: 82 -# - name: KM -# instance: TODO -# value: 83 -# - name: MAX -# instance: TODO -# value: 84 diff --git a/xtask/regdesc/chips/esp32c5/peripherals.yml b/xtask/regdesc/chips/esp32c5/peripherals.yml deleted file mode 100644 index e518962cb7..0000000000 --- a/xtask/regdesc/chips/esp32c5/peripherals.yml +++ /dev/null @@ -1,229 +0,0 @@ -peripheral_instances: -- name: AES - peripheral: AES - base_addr: 0x60088000 -- name: AHB_DMA - peripheral: AHB_DMA - base_addr: 0x60080000 -- name: APB_SARADC - peripheral: APB_SARADC - base_addr: 0x6000E000 -- name: ATOMIC - peripheral: ATOMIC - base_addr: 0x60011000 -- name: BITSCRAMBLER - peripheral: BITSCRAMBLER - base_addr: 0x60082000 -- name: BUS_MONITOR - peripheral: BUS_MONITOR - base_addr: 0x600C2000 -- name: CACHE - peripheral: CACHE - base_addr: 0x600C8000 -- name: CLINT_M - peripheral: CLINT_M - base_addr: 0x20000000 -- name: CPU_APM - peripheral: CPU_APM - base_addr: 0x6009A000 -- name: DS - peripheral: DS - base_addr: 0x6008C000 -- name: ECC - peripheral: ECC_MULT - base_addr: 0x6008B000 -- name: ECDSA - peripheral: ECDSA - base_addr: 0x6008E000 -- name: EFUSE - peripheral: EFUSE - base_addr: 0x600B4800 -- name: GPIO - peripheral: GPIO - base_addr: 0x60091000 -- name: GPIO_EXT - peripheral: GPIO_EXT - base_addr: 0x60091e00 -- name: HINF - peripheral: HINF - base_addr: 0x60016000 -- name: HMAC - peripheral: HMAC - base_addr: 0x6008D000 -- name: HP_APM - peripheral: HP_APM - base_addr: 0x60099000 -- name: HP_SYSTEM - peripheral: HP_SYSTEM - base_addr: 0x60095000 -- name: HUK - peripheral: HUK - base_addr: 0x600B3000 -- name: I2C0 - peripheral: I2C - base_addr: 0x60004000 -- name: I2C_ANA_MST - peripheral: I2C_ANA_MST - base_addr: 0x600AF800 -- name: I2S0 - peripheral: I2S - base_addr: 0x6000C000 -- name: INTPRI - peripheral: INTPRI - base_addr: 0x600C5000 -- name: INTERRUPT_CORE0 - peripheral: INTERRUPT_CORE0 - base_addr: 0x60010000 -- name: IO_MUX - peripheral: IO_MUX - base_addr: 0x60090000 -- name: KEYMNG - peripheral: KEYMNG - base_addr: 0x60087000 -- name: LEDC - peripheral: LEDC - base_addr: 0x60007000 -- name: LP_ANA - peripheral: LP_ANA - base_addr: 0x600B2C00 -- name: LP_APM0 - peripheral: LP_APM - base_addr: 0x600B3800 -- name: LP_AON - peripheral: LP_AON - base_addr: 0x600B1000 -- name: LP_CLKRST - peripheral: LP_CLKRST - base_addr: 0x600B0400 -- name: LP_IO - peripheral: LP_GPIO - base_addr: 0x600B4400 -- name: LP_IO_MUX - peripheral: LP_IO_MUX - base_addr: 0x600B4000 -- name: LP_I2C0 - peripheral: LP_I2C - base_addr: 0x600B1800 -- name: LP_I2C_ANA_MST - peripheral: LP_I2C_ANA_MST - base_addr: 0x600B2400 -- name: LP_TEE - peripheral: LP_TEE - base_addr: 0x600B3400 -- name: LP_TIMER - peripheral: LP_TIMER - base_addr: 0x600B0C00 -- name: LP_UART - peripheral: LP_UART - base_addr: 0x600B1400 -- name: LP_WDT - peripheral: LP_WDT - base_addr: 0x600B1C00 -- name: LPPERI - peripheral: LPPERI - base_addr: 0x600B2800 -- name: MCPWM0 - peripheral: MCPWM - base_addr: 0x60014000 -- name: MEM_MONITOR - peripheral: MEM_MONITOR - base_addr: 0x60092000 -- name: MISC - peripheral: MISC - base_addr: 0x6009F000 -- name: MODEM0 - peripheral: MODEM0 - base_addr: 0x600A0000 -- name: MODEM1 - peripheral: MODEM1 - base_addr: 0x600AC000 -- name: MODEM_PWR0 - peripheral: MODEM_PWR0 - base_addr: 0x600AD000 -- name: MODEM_PWR1 - peripheral: MODEM_PWR1 - base_addr: 0x600AF000 -- name: OTP_DEBUG - peripheral: OTP_DEBUG - base_addr: 0x600B4D00 -- name: PARL_IO - peripheral: PARL_IO - base_addr: 0x60015000 -- name: PAU - peripheral: PAU - base_addr: 0x60093000 -- name: PCR - peripheral: PCR - base_addr: 0x60096000 -- name: PCNT - peripheral: PCNT - base_addr: 0x60012000 -- name: PMU - peripheral: PMU - base_addr: 0x600B0000 -- name: PSRAM_MEM_MONITOR - peripheral: PSRAM_MEM_MONITOR - base_addr: 0x6001A000 -- name: PVT - peripheral: PVT - base_addr: 0x60019000 -- name: RMT - peripheral: RMT - base_addr: 0x60006000 -- name: RSA - peripheral: RSA - base_addr: 0x6008A000 -- name: SHA - peripheral: SHA - base_addr: 0x60089000 -- name: SLC - peripheral: SLC - base_addr: 0x60017000 -- name: SLCHOST - peripheral: SLCHOST - base_addr: 0x60018000 -- name: SOC_ETM - peripheral: SOC_ETM - base_addr: 0x60013000 -- name: SPI0 - peripheral: SPI - base_addr: 0x60002000 -- name: SPI1 - peripheral: SPI1 - base_addr: 0x60003000 -- name: SPI2 - peripheral: SPI2 - base_addr: 0x60081000 -- name: SYSTIMER - peripheral: SYSTIMER - base_addr: 0x6000A000 -- name: TEE - peripheral: TEE - base_addr: 0x60098000 -- name: TIMG0 - peripheral: TIMG - base_addr: 0x60008000 -- name: TIMG1 - peripheral: TIMG - base_addr: 0x60009000 -- name: TRACE - peripheral: TRACE - base_addr: 0x600C0000 -- name: TWAI0 - peripheral: TWAIFD - base_addr: 0x6000B000 -- name: TWAI1 - peripheral: TWAIFD - base_addr: 0x6000D000 -- name: UART0 - peripheral: UART - base_addr: 0x60000000 -- name: UART1 - peripheral: UART - base_addr: 0x60001000 -- name: UHCI0 - peripheral: UHCI - base_addr: 0x60005000 -- name: USB_DEVICE - peripheral: USB_SERIAL_JTAG - base_addr: 0x6000F000 diff --git a/xtask/regdesc/chips/esp32c5/regdesc.yml b/xtask/regdesc/chips/esp32c5/regdesc.yml deleted file mode 100644 index 5020abc6f1..0000000000 --- a/xtask/regdesc/chips/esp32c5/regdesc.yml +++ /dev/null @@ -1,61 +0,0 @@ ---- -aes_reg.csv: {} -ahb_dma_reg.csv: {} -apb_saradc_reg.csv: {} -bitscrambler_reg.csv: {} -bus_monitor_reg.csv: {} -cache_reg.csv: {} -ds_reg.csv: {} -ecc_mult_reg.csv: {} -ecdsa_reg.csv: {} -efuse_mem_reg.csv: {} -gpio_ext_reg.csv: {} -gpio_reg.csv: {} -hmac_reg.csv: {} -hp_apm_reg.csv: {} -hp_system_reg.csv: {} -huk_reg.csv: {} -i2c_ext_reg.csv: {} -i2s_reg.csv: {} -interrupt_matrix_reg.csv: {} -intpri_reg.csv: {} -io_mux_reg.csv: {} -keymng_reg.csv: {} -ledc_reg.csv: {} -lp_ana_reg.csv: {} -lp_aon_reg.csv: {} -lp_apm_reg.csv: {} -lp_apm0_reg.csv: {} -lp_clkrst_reg.csv: {} -lp_gpio_reg.csv: {} -lp_i2c_ana_mst_reg.csv: {} -lp_i2c_ext_reg.csv: {} -lp_io_mux_reg.csv: {} -lp_tee_reg.csv: {} -lp_timer_reg.csv: {} -lp_uart_reg.csv: {} -lp_wdt_reg.csv: {} -lpperi_reg.csv: {} -mem_monitor_reg.csv: {} -parl_io_reg.csv: {} -pau_reg.csv: {} -pcnt_reg.csv: {} -pcr_reg.csv: {} -pmu_reg.csv: {} -pvt_reg.csv: {} -pwm_reg.csv: {} -rmt_reg.csv: {} -rsa_reg.csv: {} -sha_reg.csv: {} -soc_etm_reg.csv: {} -spi_mem_reg.csv: {} -spi1_mem_reg.csv: {} -spi2_reg.csv: {} -sys_timer_reg.csv: {} -tee_reg.csv: {} -timers_reg.csv: {} -trace_reg.csv: {} -twaifd_reg.csv: {} -uart_reg.csv: {} -uhci_reg.csv: {} -usb_serial_jtag_reg.csv: {} \ No newline at end of file diff --git a/xtask/regdesc/chips/esp32c6-lp/interrupts.yml b/xtask/regdesc/chips/esp32c6-lp/interrupts.yml deleted file mode 100644 index c005fcbe44..0000000000 --- a/xtask/regdesc/chips/esp32c6-lp/interrupts.yml +++ /dev/null @@ -1,25 +0,0 @@ -peripheral_interrupts: - - name: LP_TIMER - instance: LP_TIMER - value: 7 - - name: LP_RTC_TIMER - instance: LP_RTC_TIMER - value: 15 - - name: LP_UART - instance: LP_UART - value: 16 - - name: LP_I2C - instance: LP_I2C0 - value: 17 - - name: LP_WDT - instance: LP_WDT - value: 18 - - name: LP_PERI_TIMEOUT - instance: LP_PERI - value: 19 - - name: LP_APM_M0 - instance: LP_APM - value: 20 - - name: LP_APM_M1 - instance: LP_APM - value: 21 diff --git a/xtask/regdesc/chips/esp32c6-lp/peripherals.yml b/xtask/regdesc/chips/esp32c6-lp/peripherals.yml deleted file mode 100644 index b3ed5cb16f..0000000000 --- a/xtask/regdesc/chips/esp32c6-lp/peripherals.yml +++ /dev/null @@ -1,40 +0,0 @@ -peripheral_instances: - - name: LP_I2C0 - peripheral: I2C - base_addr: 0x600B1800 - - name: LP_PERI - peripheral: LPPERI - base_addr: 0x600B2800 - - name: LP_ANA_PERI - peripheral: LP_ANA - base_addr: 0x600B2C00 - - name: LP_AON - peripheral: LP_AON - base_addr: 0x600B1000 - - name: LP_APM - peripheral: LP_APM - base_addr: 0x600B3800 - # - name: LP_APM0 - # peripheral: LP_APM0 - # base_addr: 0x0 - - name: LP_CLKRST - peripheral: LP_CLKRST - base_addr: 0x600B0400 - - name: LP_I2C_ANA_MST - peripheral: LP_I2C_ANA_MST - base_addr: 0x600B2400 - - name: LP_IO - peripheral: LP_IO - base_addr: 0x600B2000 - - name: LP_TEE - peripheral: LP_TEE - base_addr: 0x600B3400 - - name: LP_TIMER - peripheral: LP_TIMER - base_addr: 0x600B0C00 - - name: LP_UART - peripheral: LP_UART - base_addr: 0x600B1400 - - name: LP_WDT - peripheral: LP_WDT - base_addr: 0x600B1C00 diff --git a/xtask/regdesc/chips/esp32c6-lp/regdesc.yml b/xtask/regdesc/chips/esp32c6-lp/regdesc.yml deleted file mode 100644 index e6bcc308c9..0000000000 --- a/xtask/regdesc/chips/esp32c6-lp/regdesc.yml +++ /dev/null @@ -1,15 +0,0 @@ -# TODO: Do we need `hardware_lock_reg.csv` and `pcr_reg.csv` as well? Others? ---- -lp_analog_peri_reg.csv: {} -lp_aon_reg.csv: {} -lp_apm0_reg.csv: {} -lp_apm_reg.csv: {} -lp_clkrst_reg.csv: {} -lp_i2c_ana_mst_reg.csv: {} -lp_i2c_ext_reg.csv: {} -lp_io_reg.csv: {} -lp_tee_reg.csv: {} -lp_timer_reg.csv: {} -lp_uart_reg.csv: {} -lp_wdt_reg.csv: {} -lpperi_reg.csv: {} diff --git a/xtask/regdesc/chips/esp32c6/interrupts.yml b/xtask/regdesc/chips/esp32c6/interrupts.yml deleted file mode 100644 index 39647af0be..0000000000 --- a/xtask/regdesc/chips/esp32c6/interrupts.yml +++ /dev/null @@ -1,232 +0,0 @@ -peripheral_interrupts: - - name: WIFI_MAC - instance: INTERRUPT_CORE0 - value: 0 - - name: WIFI_MAC_NMI - instance: INTERRUPT_CORE0 - value: 1 - - name: WIFI_PWR - instance: INTERRUPT_CORE0 - value: 2 - - name: WIFI_BB - instance: INTERRUPT_CORE0 - value: 3 - - name: BT_MAC - instance: INTERRUPT_CORE0 - value: 4 - - name: BT_BB - instance: INTERRUPT_CORE0 - value: 5 - - name: BT_BB_NMI - instance: INTERRUPT_CORE0 - value: 6 - - name: LP_TIMER - instance: INTERRUPT_CORE0 - value: 7 - - name: COEX - instance: INTERRUPT_CORE0 - value: 8 - - name: BLE_TIMER - instance: INTERRUPT_CORE0 - value: 9 - - name: BLE_SEC - instance: INTERRUPT_CORE0 - value: 10 - - name: I2C_MASTER - instance: I2C0 - value: 11 - - name: ZB_MAC - instance: INTERRUPT_CORE0 - value: 12 - - name: PMU - instance: PMU - value: 13 - - name: EFUSE - instance: EFUSE - value: 14 - - name: LP_RTC_TIMER - instance: LP_TIMER - value: 15 - - name: LP_UART - instance: LP_UART - value: 16 - - name: LP_I2C - instance: LP_I2C0 - value: 17 - - name: LP_WDT - instance: LP_WDT - value: 18 - - name: LP_PERI_TIMEOUT - instance: LP_PERI - value: 19 - - name: LP_APM_M0 - instance: LP_APM - value: 20 - - name: LP_APM_M1 - instance: LP_APM - value: 21 - - name: FROM_CPU_INTR0 - instance: INTERRUPT_CORE0 - value: 22 - - name: FROM_CPU_INTR1 - instance: INTERRUPT_CORE0 - value: 23 - - name: FROM_CPU_INTR2 - instance: INTERRUPT_CORE0 - value: 24 - - name: FROM_CPU_INTR3 - instance: INTERRUPT_CORE0 - value: 25 - - name: ASSIST_DEBUG - instance: ASSIST_DEBUG - value: 26 - - name: TRACE - instance: TRACE - value: 27 - - name: CACHE - instance: INTERRUPT_CORE0 - value: 28 - - name: CPU_PERI_TIMEOUT - instance: INTERRUPT_CORE0 - value: 29 - - name: GPIO - instance: GPIO - value: 30 - - name: GPIO_NMI - instance: GPIO - value: 31 - - name: PAU - instance: PAU - value: 32 - - name: HP_PERI_TIMEOUT - instance: HP_SYS - value: 33 - - name: MODEM_PERI_TIMEOUT - instance: HP_SYS - value: 34 - - name: HP_APM_M0 - instance: HP_APM - value: 35 - - name: HP_APM_M1 - instance: HP_APM - value: 36 - - name: HP_APM_M2 - instance: HP_APM - value: 37 - - name: HP_APM_M3 - instance: HP_APM - value: 38 - - name: LP_APM0 - instance: LP_APM - value: 39 - - name: MSPI - instance: SPI2 - value: 40 - - name: I2S0 - instance: I2S0 - value: 41 - - name: UHCI0 - instance: UHCI0 - value: 42 - - name: UART0 - instance: UART0 - value: 43 - - name: UART1 - instance: UART1 - value: 44 - - name: LEDC - instance: LEDC - value: 45 - - name: TWAI0 - instance: TWAI0 - value: 46 - - name: TWAI1 - instance: TWAI1 - value: 47 - - name: USB_DEVICE - instance: USB_DEVICE - value: 48 - - name: RMT - instance: RMT - value: 49 - - name: I2C_EXT0 - instance: I2C0 - value: 50 - - name: TG0_T0_LEVEL - instance: TIMG0 - value: 51 - - name: TG0_T1_LEVEL - instance: TIMG0 - value: 52 - - name: TG0_WDT_LEVEL - instance: TIMG0 - value: 53 - - name: TG1_T0_LEVEL - instance: TIMG1 - value: 54 - - name: TG1_T1_LEVEL - instance: TIMG1 - value: 55 - - name: TG1_WDT_LEVEL - instance: TIMG1 - value: 56 - - name: SYSTIMER_TARGET0 - instance: SYSTIMER - value: 57 - - name: SYSTIMER_TARGET1 - instance: SYSTIMER - value: 58 - - name: SYSTIMER_TARGET2 - instance: SYSTIMER - value: 59 - - name: APB_SARADC - instance: APB_SARADC - value: 60 - - name: MCPWM0 - instance: MCPWM0 - value: 61 - - name: PCNT - instance: PCNT - value: 62 - - name: PARL_IO - instance: PARL_IO - value: 63 - - name: SLC0 - instance: SLCHOST - value: 64 - - name: SLC1 - instance: SLCHOST - value: 65 - - name: DMA_IN_CH0 - instance: DMA - value: 66 - - name: DMA_IN_CH1 - instance: DMA - value: 67 - - name: DMA_IN_CH2 - instance: DMA - value: 68 - - name: DMA_OUT_CH0 - instance: DMA - value: 69 - - name: DMA_OUT_CH1 - instance: DMA - value: 70 - - name: DMA_OUT_CH2 - instance: DMA - value: 71 - - name: SPI2 - instance: SPI2 - value: 72 - - name: AES - instance: AES - value: 73 - - name: SHA - instance: SHA - value: 74 - - name: RSA - instance: RSA - value: 75 - - name: ECC - instance: ECC - value: 76 diff --git a/xtask/regdesc/chips/esp32c6/peripherals.yml b/xtask/regdesc/chips/esp32c6/peripherals.yml deleted file mode 100644 index d60f6adb4e..0000000000 --- a/xtask/regdesc/chips/esp32c6/peripherals.yml +++ /dev/null @@ -1,199 +0,0 @@ -peripheral_instances: - - name: AES - peripheral: AES - base_addr: 0x60088000 - - name: APB_SARADC - peripheral: APB_SARADC - base_addr: 0x6000E000 - - name: ASSIST_DEBUG - peripheral: ASSIST_DEBUG - base_addr: 0x600C2000 - - name: ATOMIC - peripheral: ATOMIC - base_addr: 0x60011000 - - name: DMA - peripheral: DMA - base_addr: 0x60080000 - - name: DS - peripheral: DS - base_addr: 0x6008C000 - - name: ECC - peripheral: ECC - base_addr: 0x6008B000 - - name: EFUSE - peripheral: EFUSE - base_addr: 0x600B0800 - - name: EXTMEM - peripheral: EXTMEM - base_addr: 0x600C8000 - - name: GPIO - peripheral: GPIO - base_addr: 0x60091000 - - name: GPIO_SD - peripheral: GPIOSD - base_addr: 0x60091f00 - - name: HINF - peripheral: HINF - base_addr: 0x60016000 - - name: HMAC - peripheral: HMAC - base_addr: 0x6008D000 - - name: HP_APM - peripheral: HP_APM - base_addr: 0x60099000 - - name: HP_SYS - peripheral: HP_SYS - base_addr: 0x60095000 - - name: I2C0 - peripheral: I2C - base_addr: 0x60004000 - - name: I2S0 - peripheral: I2S - base_addr: 0x6000C000 - - name: IEEE802154 - peripheral: IEEE802154 - base_addr: 0x600A3000 - - name: INTERRUPT_CORE0 - peripheral: INTMTX_CORE0 - base_addr: 0x60010000 - - name: INTPRI - peripheral: INTPRI - base_addr: 0x600C5000 - - name: IO_MUX - peripheral: IO_MUX - base_addr: 0x60090000 - - name: LEDC - peripheral: LEDC - base_addr: 0x60007000 - - name: LP_PERI - peripheral: LPPERI - base_addr: 0x600B2800 - - name: LP_ANA - peripheral: LP_ANA - base_addr: 0x600B2C00 - - name: LP_AON - peripheral: LP_AON - base_addr: 0x600B1000 - - name: LP_APM - peripheral: LP_APM - base_addr: 0x600B3800 - - name: LP_APM0 - peripheral: LP_APM0 - base_addr: 0x60099800 - - name: LP_CLKRST - peripheral: LP_CLKRST - base_addr: 0x600B0400 - - name: LP_I2C0 - peripheral: LP_I2C0 - base_addr: 0x600B1800 - - name: LP_I2C_ANA_MST - peripheral: LP_I2C_ANA_MST - base_addr: 0x600B2400 - - name: LP_IO - peripheral: LP_IO - base_addr: 0x600B2000 - - name: LP_TEE - peripheral: LP_TEE - base_addr: 0x600B3400 - - name: LP_TIMER - peripheral: LP_TIMER - base_addr: 0x600B0C00 - - name: LP_UART - peripheral: LP_UART - base_addr: 0x600B1400 - - name: LP_WDT - peripheral: LP_WDT - base_addr: 0x600B1C00 - - name: MODEM_LPCON - peripheral: MODEM_LPCON - base_addr: 0x600AF000 - - name: MODEM_SYSCON - peripheral: MODEM_SYSCON - base_addr: 0x600A9800 - - name: MCPWM0 - peripheral: MCPWM - base_addr: 0x60014000 - - name: MEM_MONITOR - peripheral: MEM_MONITOR - base_addr: 0x60092000 - - name: OTP_DEBUG - peripheral: OTP_DEBUG - base_addr: 0x600B3C00 - - name: PARL_IO - peripheral: PARL_IO - base_addr: 0x60015000 - - name: PAU - peripheral: PAU - base_addr: 0x60093000 - - name: PCNT - peripheral: PCNT - base_addr: 0x60012000 - - name: PCR - peripheral: PCR - base_addr: 0x60096000 - - name: PMU - peripheral: PMU - base_addr: 0x600B0000 - - name: RMT - peripheral: RMT - base_addr: 0x60006000 - - name: RNG - peripheral: RNG - base_addr: 0x600B2800 - - name: RSA - peripheral: RSA - base_addr: 0x6008A000 - # - name: SDIO - # peripheral: SDIO - # base_addr: 0x0 - - name: SHA - peripheral: SHA - base_addr: 0x60089000 - - name: SLCHOST - peripheral: SLCHOST - base_addr: 0x60017000 - - name: SOC_ETM - peripheral: SOC_ETM - base_addr: 0x60013000 - - name: SPI0 - peripheral: SPI0 - base_addr: 0x60002000 - - name: SPI1 - peripheral: SPI1 - base_addr: 0x60003000 - - name: SPI2 - peripheral: SPI2 - base_addr: 0x60081000 - - name: SYSTIMER - peripheral: SYSTIMER - base_addr: 0x6000A000 - - name: TEE - peripheral: TEE - base_addr: 0x60098000 - - name: TIMG0 - peripheral: TIMG - base_addr: 0x60008000 - - name: TIMG1 - peripheral: TIMG - base_addr: 0x60009000 - - name: TRACE - peripheral: TRACE - base_addr: 0x600C0000 - - name: TWAI0 - peripheral: TWAI - base_addr: 0x6000B000 - - name: TWAI1 - peripheral: TWAI - base_addr: 0x6000D000 - - name: UART0 - peripheral: UART - base_addr: 0x60000000 - - name: UART1 - peripheral: UART - base_addr: 0x60001000 - - name: UHCI0 - peripheral: UHCI - base_addr: 0x60005000 - - name: USB_DEVICE - peripheral: USB_DEVICE - base_addr: 0x6000F000 diff --git a/xtask/regdesc/chips/esp32c6/regdesc.yml b/xtask/regdesc/chips/esp32c6/regdesc.yml deleted file mode 100644 index 2eceed3e7a..0000000000 --- a/xtask/regdesc/chips/esp32c6/regdesc.yml +++ /dev/null @@ -1,96 +0,0 @@ ---- -aes_reg.csv: {} -apb_saradc_reg.csv: - name: APB_SARADC - wno: - - reg-names -assist_debug_reg.csv: {} -dma_reg.csv: {} -ds_reg.csv: {} -ecc_mult_reg.csv: - name: ECC - wno: - - field-names - - overlap -efuse_reg.csv: {} -extmem_reg.csv: {} -gpio_reg.csv: {} -gpio_sd_reg.csv: {} -hardware_lock_reg.csv: {} -hmac_reg.csv: {} -host_reg.csv: {} -hp_apm_reg.csv: {} -hp_system_reg.csv: {} -i2c_ext_reg.csv: {} -i2s1_reg.csv: {} -interrupt_matrix_reg.csv: {} -intpri_reg.csv: {} -io_mux_reg.csv: {} -ledc_reg.csv: {} -lp_analog_peri_reg.csv: {} -lp_aon_reg.csv: {} -lp_apm0_reg.csv: {} -lp_apm_reg.csv: {} -lp_clkrst_reg.csv: {} -lp_i2c_ana_mst_reg.csv: - wno: - - field-names -lp_i2c_ext_reg.csv: - name: LP_I2C0 - wno: - - reg-names - - field-names -lp_io_reg.csv: - wno: - - field-names -lp_tee_reg.csv: - wno: - - field-names -lp_timer_reg.csv: {} -lp_uart_reg.csv: {} -lp_wdt_reg.csv: {} -lpperi_reg.csv: {} -mem_monitor_reg.csv: {} -otp_debug_reg.csv: - wno: - - field-names -parl_io_reg.csv: {} -pau_reg.csv: {} -pcnt_reg.csv: {} -pcr_reg.csv: {} -pmu_reg.csv: {} -pwm_reg.csv: {} -rmt_reg.csv: {} -rsa_reg.csv: {} -sdio_hinf_reg.csv: {} -sdio_slc_reg.csv: {} -sha_reg.csv: {} -soc_etm_reg.csv: {} -spi1_mem_reg.csv: - name: SPI1 - wno: - - reg-names - - field-names -spi2_reg.csv: - name: SPI2 - wno: - - reg-names - - field-names -spi_mem_reg.csv: - name: SPI0 - wno: - - reg-names - - field-names -sys_timer_reg.csv: {} -tee_reg.csv: {} -timers_single_reg.csv: {} -touch_reg.csv: - wno: - - field-names -trace_reg.csv: {} -twai_reg.csv: {} -uart_reg.csv: {} -uhci_reg.csv: {} -usb_device_reg.csv: - wno: - - field-names diff --git a/xtask/regdesc/chips/esp32h2/interrupts.yml b/xtask/regdesc/chips/esp32h2/interrupts.yml deleted file mode 100644 index 77e8a3edc3..0000000000 --- a/xtask/regdesc/chips/esp32h2/interrupts.yml +++ /dev/null @@ -1,196 +0,0 @@ -peripheral_interrupts: - - name: PMU - instance: PMU - value: 0 - - name: EFUSE - instance: EFUSE - value: 1 - - name: LP_RTC_TIMER - instance: LP_TIMER - value: 2 - - name: LP_BLE_TIMER - instance: LP_TIMER - value: 3 - - name: LP_WDT - instance: LP_WDT - value: 4 - - name: LP_PERI_TIMEOUT - instance: LP_PERI - value: 5 - - name: LP_APM_M0 - instance: LP_APM - value: 6 - - name: FROM_CPU_INTR0 - instance: INTERRUPT_CORE0 - value: 7 - - name: FROM_CPU_INTR1 - instance: INTERRUPT_CORE0 - value: 8 - - name: FROM_CPU_INTR2 - instance: INTERRUPT_CORE0 - value: 9 - - name: FROM_CPU_INTR3 - instance: INTERRUPT_CORE0 - value: 10 - - name: ASSIST_DEBUG - instance: ASSIST_DEBUG - value: 11 - - name: TRACE - instance: TRACE - value: 12 - - name: CACHE - instance: INTERRUPT_CORE0 - value: 13 - - name: CPU_PERI_TIMEOUT - instance: INTERRUPT_CORE0 - value: 14 - - name: BT_MAC - instance: INTERRUPT_CORE0 - value: 15 - - name: BT_BB - instance: INTERRUPT_CORE0 - value: 16 - - name: BT_BB_NMI - instance: INTERRUPT_CORE0 - value: 17 - - name: COEX - instance: INTERRUPT_CORE0 - value: 18 - - name: BLE_TIMER - instance: INTERRUPT_CORE0 - value: 19 - - name: BLE_SEC - instance: INTERRUPT_CORE0 - value: 20 - - name: ZB_MAC - instance: INTERRUPT_CORE0 - value: 21 - - name: GPIO - instance: GPIO - value: 22 - - name: GPIO_NMI - instance: GPIO - value: 23 - - name: PAU - instance: PAU - value: 24 - - name: HP_PERI_TIMEOUT - instance: HP_SYS - value: 25 - - name: HP_APM_M0 - instance: HP_APM - value: 26 - - name: HP_APM_M1 - instance: HP_APM - value: 27 - - name: HP_APM_M2 - instance: HP_APM - value: 28 - - name: HP_APM_M3 - instance: HP_APM - value: 29 - - name: MSPI - instance: SPI2 - value: 30 - - name: I2S0 - instance: I2S0 - value: 31 - - name: UHCI0 - instance: UHCI0 - value: 32 - - name: UART0 - instance: UART0 - value: 33 - - name: UART1 - instance: UART1 - value: 34 - - name: LEDC - instance: LEDC - value: 35 - - name: TWAI0 - instance: TWAI0 - value: 36 - - name: USB_DEVICE - instance: USB_DEVICE - value: 37 - - name: RMT - instance: RMT - value: 38 - - name: I2C_EXT0 - instance: I2C0 - value: 39 - - name: I2C_EXT1 - instance: I2C1 - value: 40 - - name: TG0_T0_LEVEL - instance: TIMG0 - value: 41 - - name: TG0_WDT_LEVEL - instance: TIMG0 - value: 42 - - name: TG1_T0_LEVEL - instance: TIMG1 - value: 43 - - name: TG1_WDT_LEVEL - instance: TIMG1 - value: 44 - - name: SYSTIMER_TARGET0 - instance: SYSTIMER - value: 45 - - name: SYSTIMER_TARGET1 - instance: SYSTIMER - value: 46 - - name: SYSTIMER_TARGET2 - instance: SYSTIMER - value: 47 - - name: APB_ADC - instance: APB_SARADC - value: 48 - - name: MCPWM0 - instance: MCPWM0 - value: 49 - - name: PCNT - instance: PCNT - value: 50 - - name: PARL_IO_TX - instance: PARL_IO - value: 51 - - name: PARL_IO_RX - instance: PARL_IO - value: 52 - - name: DMA_IN_CH0 - instance: DMA - value: 53 - - name: DMA_IN_CH1 - instance: DMA - value: 54 - - name: DMA_IN_CH2 - instance: DMA - value: 55 - - name: DMA_OUT_CH0 - instance: DMA - value: 56 - - name: DMA_OUT_CH1 - instance: DMA - value: 57 - - name: DMA_OUT_CH2 - instance: DMA - value: 58 - - name: GPSPI2 - instance: SPI2 - value: 59 - - name: AES - instance: AES - value: 60 - - name: SHA - instance: SHA - value: 61 - - name: RSA - instance: RSA - value: 62 - - name: ECC - instance: ECC - value: 63 - - name: ECDSA - instance: INTERRUPT_CORE0 - value: 64 diff --git a/xtask/regdesc/chips/esp32h2/peripherals.yml b/xtask/regdesc/chips/esp32h2/peripherals.yml deleted file mode 100644 index aba059caa9..0000000000 --- a/xtask/regdesc/chips/esp32h2/peripherals.yml +++ /dev/null @@ -1,190 +0,0 @@ -peripheral_instances: - - name: AES - peripheral: AES - base_addr: 0x60088000 - - name: APB_SARADC - peripheral: APB_SARADC - base_addr: 0x6000E000 - - name: ASSIST_DEBUG - peripheral: ASSIST_DEBUG - base_addr: 0x600C2000 - - name: DMA - peripheral: DMA - base_addr: 0x60080000 - - name: DS - peripheral: DS - base_addr: 0x6008C000 - - name: ECC - peripheral: ECC - base_addr: 0x6008B000 - - name: EFUSE - peripheral: EFUSE - base_addr: 0x600B0800 - - name: GPIO - peripheral: GPIO - base_addr: 0x60091000 - - name: GPIO_SD - peripheral: GPIOSD - base_addr: 0x60091f00 - - name: HINF - peripheral: HINF - base_addr: 0x6000B000 - - name: HMAC - peripheral: HMAC - base_addr: 0x6008D000 - - name: HOST - peripheral: HOST - base_addr: 0x60015000 - - name: HP_APM - peripheral: HP_APM - base_addr: 0x60099000 - - name: HP_SYS - peripheral: HP_SYS - base_addr: 0x60095000 - - name: I2C0 - peripheral: I2C - base_addr: 0x60004000 - - name: I2C1 - peripheral: I2C - base_addr: 0x60005000 - - name: I2S0 - peripheral: I2S - base_addr: 0x6000D000 - - name: IEEE802154 - peripheral: IEEE802154 - base_addr: 0x60047000 - - name: INTERRUPT_CORE0 - peripheral: INTMTX_CORE0 - base_addr: 0x60010000 - - name: INTPRI - peripheral: INTPRI - base_addr: 0x600C5000 - - name: IO_MUX - peripheral: IO_MUX - base_addr: 0x60090000 - - name: LEDC - peripheral: LEDC - base_addr: 0x60008000 - - name: LP_AON - peripheral: LP_AON - base_addr: 0x600B1000 - - name: LP_ANA - peripheral: LP_ANA - base_addr: 0x600B2C00 - - name: LP_APM - peripheral: LP_APM - base_addr: 0x600B3800 - - name: LP_CLKRST - peripheral: LP_CLKRST - base_addr: 0x600B0400 - - name: LP_PERI - peripheral: LPPERI - base_addr: 0x600B2800 - - name: LP_TIMER - peripheral: LP_TIMER - base_addr: 0x600B0C00 - - name: LP_WDT - peripheral: LP_WDT - base_addr: 0x600B1C00 - - name: MODEM_LPCON - peripheral: MODEM_LPCON - base_addr: 0x600AD000 - - name: MODEM_SYSCON - peripheral: MODEM_SYSCON - base_addr: 0x600A5400 - - name: MCPWM0 - peripheral: MCPWM - base_addr: 0x60014000 - - name: MEM_MONITOR - peripheral: MEM_MONITOR - base_addr: 0x60092000 - - name: OTP_DEBUG - peripheral: OTP_DEBUG - base_addr: 0x600B3C00 - - name: PARL_IO - peripheral: PARL_IO - base_addr: 0x60015000 - - name: PAU - peripheral: PAU - base_addr: 0x60093000 - - name: PCNT - peripheral: PCNT - base_addr: 0x60012000 - - name: PCR - peripheral: PCR - base_addr: 0x60096000 - - name: PMU - peripheral: PMU - base_addr: 0x600B0000 - - name: RMT - peripheral: RMT - base_addr: 0x60007000 - - name: RMTMEM - peripheral: RMTMEM - base_addr: 0x60016400 - - name: RNG - peripheral: RNG - base_addr: 0x600B2800 - - name: RSA - peripheral: RSA - base_addr: 0x6008A000 - - name: RTC_CNTL - peripheral: RTCCNTL - base_addr: 0x60008000 - - name: RTC_IO - peripheral: RTCIO - base_addr: 0x60008400 - - name: SDM - peripheral: SDM - base_addr: 0x60004f00 - - name: SLC - peripheral: SLC - base_addr: 0x60018000 - - name: SHA - peripheral: SHA - base_addr: 0x60089000 - - name: SOC_ETM - peripheral: SOC_ETM - base_addr: 0x60013000 - - name: SPI0 - peripheral: SPI0 - base_addr: 0x60002000 - - name: SPI1 - peripheral: SPI1 - base_addr: 0x60003000 - - name: SPI2 - peripheral: SPI2 - base_addr: 0x60081000 - - name: SYSCON - peripheral: SYSCON - base_addr: 0x60026000 - - name: SYSTIMER - peripheral: SYSTIMER - base_addr: 0x6000B000 - - name: TEE - peripheral: TEE - base_addr: 0x60098000 - - name: TIMG0 - peripheral: TIMG - base_addr: 0x60009000 - - name: TIMG1 - peripheral: TIMG - base_addr: 0x6000A000 - - name: TRACE - peripheral: TRACE - base_addr: 0x600C0000 - - name: TWAI0 - peripheral: TWAI - base_addr: 0x6000C000 - - name: UART0 - peripheral: UART - base_addr: 0x60000000 - - name: UART1 - peripheral: UART - base_addr: 0x60001000 - - name: UHCI0 - peripheral: UHCI - base_addr: 0x60006000 - - name: USB_DEVICE - peripheral: USB_DEVICE - base_addr: 0x6000F000 diff --git a/xtask/regdesc/chips/esp32h2/regdesc.yml b/xtask/regdesc/chips/esp32h2/regdesc.yml deleted file mode 100644 index e86b9b0d93..0000000000 --- a/xtask/regdesc/chips/esp32h2/regdesc.yml +++ /dev/null @@ -1,77 +0,0 @@ ---- -aes_reg.csv: {} -apb_saradc_reg.csv: - name: APB_SARADC - wno: - - reg-names -assist_debug_reg.csv: {} -cache_reg.csv: {} -dma_reg.csv: {} -ds_reg.csv: {} -ecc_mult_reg.csv: - name: ECC - wno: - - field-names -ecdsa_reg.csv: {} -efuse_reg.csv: {} -gpio_reg.csv: {} -gpio_sd_reg.csv: {} -hmac_reg.csv: {} -hp_apm_reg.csv: {} -hp_system_reg.csv: {} -i2c_ext_reg.csv: {} -i2s_reg.csv: {} -interrupt_matrix_reg.csv: {} -intpri_reg.csv: {} -io_mux_reg.csv: {} -ledc_reg.csv: {} -lp_analog_peri_reg.csv: {} -lp_aon_reg.csv: {} -lp_apm0_reg.csv: {} -lp_apm_reg.csv: {} -lp_clkrst_reg.csv: {} -lp_timer_reg.csv: {} -lp_wdt_reg.csv: {} -lpperi_reg.csv: {} -mem_monitor_reg.csv: {} -otp_debug_reg.csv: - name: OTP_DEBUG - wno: - - field-names -parl_io_reg.csv: {} -pau_reg.csv: {} -pcnt_reg.csv: {} -pcr_reg.csv: {} -pmu_reg.csv: {} -pwm_reg.csv: {} -rmt_reg.csv: {} -rsa_reg.csv: {} -rtc_ble_timer_reg.csv: {} -sha_reg.csv: {} -soc_etm_reg.csv: {} -spi1_mem_reg.csv: - name: SPI1 - wno: - - reg-names - - field-names -spi2_reg.csv: - name: SPI2 - wno: - - reg-names - - field-names -spi_mem_reg.csv: - name: SPI0 - wno: - - reg-names - - field-names -sys_timer_reg.csv: {} -tee_reg.csv: {} -timers_single_reg.csv: {} -trace_reg.csv: {} -twai_reg.csv: {} -uart_reg.csv: {} -uhci_reg.csv: {} -usb_device_reg.csv: - name: USB_DEVICE - wno: - - field-names diff --git a/xtask/regdesc/chips/esp32p4/interrupts.yml b/xtask/regdesc/chips/esp32p4/interrupts.yml deleted file mode 100644 index 416ca8a0c3..0000000000 --- a/xtask/regdesc/chips/esp32p4/interrupts.yml +++ /dev/null @@ -1,385 +0,0 @@ -peripheral_interrupts: - # - name: LP_RTC - # instance: - # value: 0 - - name: LP_WDT - instance: LP_WDT - value: 1 - - name: LP_TIMER0 - instance: LP_TIMER - value: 2 - - name: LP_TIMER1 - instance: LP_TIMER - value: 3 - # - name: MB_HP - # instance: - # value: 4 - # - name: MB_LP - # instance: - # value: 5 - - name: PMU0 - instance: PMU - value: 6 - - name: PMU1 - instance: PMU - value: 7 - - name: LP_ANA - instance: LP_ANA_PERI - value: 8 - - name: LP_ADC - instance: LP_ADC - value: 9 - - name: LP_GPIO - instance: LP_GPIO - value: 10 - - name: LP_I2C0 - instance: LP_I2C0 - value: 11 - - name: LP_I2S0 - instance: LP_I2S0 - value: 12 - - name: LP_SPI - instance: LP_SPI - value: 13 - - name: LP_TOUCH - instance: LP_TOUCH - value: 14 - - name: LP_TSENS - instance: LP_TSENS - value: 15 - - name: LP_UART - instance: LP_UART - value: 16 - # - name: LP_EFUSE - # instance: - # value: 17 - # - name: LP_SW - # instance: - # value: 18 - - name: LP_SYS - instance: LP_SYS - value: 19 - - name: LP_HUK - instance: LP_HUK - value: 20 - # - name: SYS_ICM - # instance: - # value: 21 - - name: USB_DEVICE - instance: USB_DEVICE - value: 22 - # - name: SDIO_HOST - # instance: - # value: 23 - - name: DMA - instance: DMA - value: 24 - - name: SPI2 - instance: SPI2 - value: 25 - - name: SPI3 - instance: SPI3 - value: 26 - - name: I2S0 - instance: I2S0 - value: 27 - - name: I2S1 - instance: I2S1 - value: 28 - - name: I2S2 - instance: I2S2 - value: 29 - - name: UHCI0 - instance: UHCI0 - value: 30 - - name: UART0 - instance: UART0 - value: 31 - - name: UART1 - instance: UART1 - value: 32 - - name: UART2 - instance: UART2 - value: 33 - - name: UART3 - instance: UART3 - value: 34 - - name: UART4 - instance: UART4 - value: 35 - - name: LCD_CAM - instance: - value: 36 - - name: ADC - instance: - value: 37 - - name: PWM0 - instance: MCPWM0 - value: 38 - - name: PWM1 - instance: MCPWM1 - value: 39 - - name: TWAI0 - instance: TWAI0 - value: 40 - - name: TWAI1 - instance: TWAI1 - value: 41 - - name: TWAI2 - instance: TWAI2 - value: 42 - - name: RMT - instance: RMT - value: 43 - - name: I2C0 - instance: I2C0 - value: 44 - - name: I2C1 - instance: I2C1 - value: 45 - - name: TG0_T0 - instance: TIMG0 - value: 46 - - name: TG0_T1 - instance: TIMG0 - value: 47 - - name: TG0_WDT - instance: TIMG0 - value: 48 - - name: TG1_T0 - instance: TIMG1 - value: 49 - - name: TG1_T1 - instance: TIMG1 - value: 50 - - name: TG1_WDT - instance: TIMG1 - value: 51 - - name: LEDC - instance: LEDC - value: 52 - - name: SYSTIMER_TARGET0 - instance: SYSTIMER - value: 53 - - name: SYSTIMER_TARGET1 - instance: SYSTIMER - value: 54 - - name: SYSTIMER_TARGET2 - instance: SYSTIMER - value: 55 - - name: AHB_PDMA_IN_CH0 - instance: AHB_DMA - value: 56 - - name: AHB_PDMA_IN_CH1 - instance: AHB_DMA - value: 57 - - name: AHB_PDMA_IN_CH2 - instance: AHB_DMA - value: 58 - - name: AHB_PDMA_OUT_CH0 - instance: AHB_DMA - value: 59 - - name: AHB_PDMA_OUT_CH1 - instance: AHB_DMA - value: 60 - - name: AHB_PDMA_OUT_CH2 - instance: AHB_DMA - value: 61 - - name: AXI_PDMA_IN_CH0 - instance: AHB_DMA - value: 62 - - name: AXI_PDMA_IN_CH1 - instance: AHB_DMA - value: 63 - - name: AXI_PDMA_IN_CH2 - instance: AHB_DMA - value: 64 - - name: AXI_PDMA_OUT_CH0 - instance: AHB_DMA - value: 65 - - name: AXI_PDMA_OUT_CH1 - instance: AHB_DMA - value: 66 - - name: AXI_PDMA_OUT_CH2 - instance: AHB_DMA - value: 67 - - name: RSA - instance: RSA - value: 68 - - name: AES - instance: AES - value: 69 - - name: SHA - instance: SHA - value: 70 - - name: ECC - instance: ECC - value: 71 - - name: ECDSA - instance: - value: 72 - # - name: KM - # instance: - # value: 73 - - name: GPIO_INT0 - instance: GPIO - value: 74 - - name: GPIO_INT1 - instance: GPIO - value: 75 - - name: GPIO_INT2 - instance: GPIO - value: 76 - - name: GPIO_INT3 - instance: GPIO - value: 77 - - name: GPIO_PAD_COMP - instance: GPIO - value: 78 - # - name: CPU_INT_FROM_CPU_0 - # instance: - # value: 79 - # - name: CPU_INT_FROM_CPU_1 - # instance: - # value: 80 - # - name: CPU_INT_FROM_CPU_2 - # instance: - # value: 81 - # - name: CPU_INT_FROM_CPU_3 - # instance: - # value: 82 - - name: CACHE - instance: CACHE - value: 83 - # - name: FLASH_MSPI - # instance: - # value: 84 - - name: CSI_BRIDGE - instance: MIPI_CSI_BRIDGE - value: 85 - - name: DSI_BRIDGE - instance: MIPI_DSI_BRIDGE - value: 86 - - name: CSI - instance: MIPI_CSI_HOST - value: 87 - - name: DSI - instance: MIPI_DSI_HOST - value: 88 - # - name: GMII_PHY - # instance: - # value: 89 - # - name: LPI - # instance: - # value: 90 - # - name: PMT - # instance: - # value: 91 - # - name: SBD - # instance: - # value: 92 - # - name: USB_OTG - # instance: - # value: 93 - # - name: USB_OTG_ENDP_MULTI_PROC - # instance: - # value: 94 - - name: JPEG - instance: JPEG - value: 95 - - name: PPA - instance: PPA - value: 96 - - name: CORE0_TRACE - instance: TRACE - value: 97 - - name: CORE1_TRACE - instance: TRACE - value: 98 - # - name: HP_CORE - # instance: - # value: 99 - - name: ISP - instance: ISP - value: 100 - - name: I3C - instance: I3C_MST - value: 101 - - name: I3C_SLV - instance: I3C_SLV - value: 102 - - name: USB_OTG11 - instance: DMA2D - value: 103 - - name: DMA2D_IN_CH0 - instance: DMA2D - value: 104 - - name: DMA2D_IN_CH1 - instance: DMA2D - value: 105 - - name: DMA2D_OUT_CH0 - instance: DMA2D - value: 106 - - name: DMA2D_OUT_CH1 - instance: DMA2D - value: 107 - - name: DMA2D_OUT_CH2 - instance: DMA2D - value: 108 - - name: PSRAM_MSPI - instance: DMA2D - value: 109 - - name: HP_SYS - instance: HP_SYS - value: 110 - - name: PCNT - instance: PCNT - value: 111 - - name: PAU - instance: PAU - value: 112 - - name: PARLIO_RX - instance: PARL_IO - value: 113 - - name: PARLIO_TX - instance: PARL_IO - value: 114 - - name: H264_DMA2D_OUT_CH0 - instance: H264_DMA - value: 115 - - name: H264_DMA2D_OUT_CH1 - instance: H264_DMA - value: 116 - - name: H264_DMA2D_OUT_CH2 - instance: H264_DMA - value: 117 - - name: H264_DMA2D_OUT_CH3 - instance: H264_DMA - value: 118 - - name: H264_DMA2D_OUT_CH4 - instance: H264_DMA - value: 119 - - name: H264_DMA2D_IN_CH0 - instance: H264_DMA - value: 120 - - name: H264_DMA2D_IN_CH1 - instance: H264_DMA - value: 121 - - name: H264_DMA2D_IN_CH2 - instance: H264_DMA - value: 122 - - name: H264_DMA2D_IN_CH3 - instance: H264_DMA - value: 123 - - name: H264_DMA2D_IN_CH4 - instance: H264_DMA - value: 124 - - name: H264_DMA2D_IN_CH5 - instance: H264_DMA - value: 125 - - name: H264_REG - instance: H264 - value: 126 - - name: ASSIST_DEBUG - instance: ASSIST_DEBUG - value: 127 diff --git a/xtask/regdesc/chips/esp32p4/peripherals.yml b/xtask/regdesc/chips/esp32p4/peripherals.yml deleted file mode 100644 index b1dd2f6829..0000000000 --- a/xtask/regdesc/chips/esp32p4/peripherals.yml +++ /dev/null @@ -1,275 +0,0 @@ -peripheral_instances: - - name: ADC - peripheral: ADC - base_addr: 0x500DE000 - - name: AES - peripheral: AES - base_addr: 0x50090000 - - name: AHB_DMA - peripheral: AHB_DMA - base_addr: 0x50085000 - - name: ASSIST_DEBUG - peripheral: ASSIST_DEBUG - base_addr: 0x3FF06000 - - name: AXI_DMA - peripheral: AXI_DMA - base_addr: 0x5008a000 - - name: AXI_ICM - peripheral: ICM_AXI - base_addr: 0x500A4000 - - name: BITSCRAMBLER - peripheral: BITSCRAMBLER - base_addr: 0x500A3000 - - name: CACHE - peripheral: CACHE - base_addr: 0x3FF10000 - - name: DMA - peripheral: DMAC - base_addr: 0x50081000 - # FIXME: build errors in PAC - # - name: DMA2D - # peripheral: DMA2D - # base_addr: 0x50088000 - - name: DS - peripheral: DS - base_addr: 0x50094000 - - name: ECC - peripheral: ECC - base_addr: 0x50093000 - - name: ECDSA - peripheral: ECDSA - base_addr: 0x50096000 - - name: EFUSE - peripheral: EFUSE - base_addr: 0x5012D000 - - name: GPIO - peripheral: GPIO - base_addr: 0x500E0000 - - name: GPIO_SD - peripheral: GPIOSD - base_addr: 0x500E0F00 - - name: H264 - peripheral: H264 - base_addr: 0x50084000 - - name: H264_DMA - peripheral: H264_DMA - base_addr: 0x500A7000 - - name: HMAC - peripheral: HMAC - base_addr: 0x50095000 - - name: HP_SYS - peripheral: HP_SYS - base_addr: 0x500E5000 - - name: HP_SYS_CLKRST - peripheral: HP_SYS_CLKRST - base_addr: 0x500E6000 - - name: INTERRUPT_CORE0 - peripheral: CORE0 - base_addr: 0x500D6000 - - name: INTERRUPT_CORE1 - peripheral: CORE1 - base_addr: 0x500D6800 - - name: IO_MUX - peripheral: IO_MUX - base_addr: 0x500e1000 - - name: ISP - peripheral: ISP - base_addr: 0x500A1000 - - name: I2C0 - peripheral: I2C - base_addr: 0x500C4000 - - name: I2C1 - peripheral: I2C - base_addr: 0x500C5000 - - name: I2S0 - peripheral: I2S - base_addr: 0x500C6000 - - name: I2S1 - peripheral: I2S - base_addr: 0x500C7000 - - name: I2S2 - peripheral: I2S - base_addr: 0x500C8000 - - name: I3C_MST - peripheral: I3C_MST - base_addr: 0x500DA000 - - name: I3C_MST_MEM - peripheral: I3C_MST_MEM - base_addr: 0x500DA000 - - name: I3C_SLV - peripheral: I3C_SLV - base_addr: 0x500DB000 - - name: JPEG - peripheral: JPEG - base_addr: 0x50086000 - - name: LCD_CAM - peripheral: LCDCAM - base_addr: 0x500dc000 - - name: LEDC - peripheral: LEDC - base_addr: 0x500D3000 - - name: LP_ADC - peripheral: RTCADC - base_addr: 0x50127000 - - name: LP_ANA_PERI - peripheral: LP_ANA_PERI - base_addr: 0x50113000 - - name: LP_AON_CLKRST - peripheral: LP_AON_CLKRST - base_addr: 0x50111000 - - name: LP_GPIO - peripheral: LP_GPIO - base_addr: 0x5012A000 - - name: LP_HUK - peripheral: HUK - base_addr: 0x50114000 - - name: LP_INTR - peripheral: LPINTR - base_addr: 0x5012C000 - - name: LP_IO_MUX - peripheral: LP_IOMUX - base_addr: 0x5012B000 - - name: LP_I2C0 - peripheral: LP_I2C - base_addr: 0x50122000 - - name: LP_I2C_ANA_MST - peripheral: ANA_I2C_MST - base_addr: 0x50124000 - - name: LP_I2S0 - peripheral: LP_I2S - base_addr: 0x50125000 - - name: LP_PERI - peripheral: LPPERI - base_addr: 0x50120000 - - name: LP_SYS - peripheral: LPSYSREG - base_addr: 0x50110000 - - name: LP_TIMER - peripheral: RTC_TIMER - base_addr: 0x50112000 - - name: LP_TOUCH - peripheral: RTC_TOUCH - base_addr: 0x50128000 - - name: LP_TSENS - peripheral: TSENS - base_addr: 0x5012F000 - - name: LP_UART - peripheral: LP_UART - base_addr: 0x50121000 - - name: LP_WDT - peripheral: RTC_WDT - base_addr: 0x50116000 - - name: MCPWM0 - peripheral: MCPWM - base_addr: 0x500C0000 - - name: MCPWM1 - peripheral: MCPWM - base_addr: 0x500C1000 - - name: MIPI_CSI_BRIDGE - peripheral: CSI_BRIG - base_addr: 0x5009F800 - - name: MIPI_CSI_HOST - peripheral: CSI_HOST - base_addr: 0x5009F000 - - name: MIPI_DSI_BRIDGE - peripheral: DSI_BRG - base_addr: 0x500A0800 - - name: MIPI_DSI_HOST - peripheral: DSI_HOST - base_addr: 0x500A0000 - - name: PARL_IO - peripheral: PARL_IO - base_addr: 0x500CF000 - - name: PAU - peripheral: PAU - base_addr: 0x60093000 - - name: PCNT - peripheral: PCNT - base_addr: 0x500C9000 - - name: PMU - peripheral: PMU - base_addr: 0x50115000 - - name: PPA - peripheral: PPA - base_addr: 0x50087000 - - name: PVT - peripheral: PVT - base_addr: 0x5009E000 - - name: RMT - peripheral: RMT - base_addr: 0x500D4000 - - name: RSA - peripheral: RSA - base_addr: 0x50092000 - - name: SDHOST - peripheral: SDHOST - base_addr: 0x50083000 - - name: SHA - peripheral: SHA - base_addr: 0x50091000 - - name: SOC_ETM - peripheral: SOC_ETM - base_addr: 0x500D5000 - - name: SPI0 - peripheral: SPI0 - base_addr: 0x5008C000 - - name: SPI1 - peripheral: SPI1 - base_addr: 0x5008D000 - - name: SPI2 - peripheral: SPI2 - base_addr: 0x500D0000 - - name: SPI3 - peripheral: SPI3 - base_addr: 0x500D1000 - - name: SYSTIMER - peripheral: SYSTIMER - base_addr: 0x500E2000 - - name: TEE - peripheral: TEE - base_addr: 0x60098000 - - name: TIMG0 - peripheral: TIMG - base_addr: 0x500C2000 - - name: TIMG1 - peripheral: TIMG - base_addr: 0x500C3000 - - name: TRACE0 - peripheral: TRACE - base_addr: 0x3FF04000 - - name: TRACE1 - peripheral: TRACE - base_addr: 0x3FF05000 - - name: TWAI0 - peripheral: TWAI - base_addr: 0x500D7000 - - name: TWAI1 - peripheral: TWAI - base_addr: 0x500D8000 - - name: TWAI2 - peripheral: TWAI - base_addr: 0x500D9000 - - name: UART0 - peripheral: UART - base_addr: 0x500CA000 - - name: UART1 - peripheral: UART - base_addr: 0x500CB000 - - name: UART2 - peripheral: UART - base_addr: 0x500CC000 - - name: UART3 - peripheral: UART - base_addr: 0x500CD000 - - name: UART4 - peripheral: UART - base_addr: 0x500CE000 - - name: UHCI0 - peripheral: UHCI - base_addr: 0x500DF000 - - name: USB_DEVICE - peripheral: USB_DEVICE - base_addr: 0x500D2000 - - name: USB_WRAP - peripheral: USB_WRAP - base_addr: 0x50080000 diff --git a/xtask/regdesc/chips/esp32p4/regdesc.yml b/xtask/regdesc/chips/esp32p4/regdesc.yml deleted file mode 100644 index 00b3147d51..0000000000 --- a/xtask/regdesc/chips/esp32p4/regdesc.yml +++ /dev/null @@ -1,97 +0,0 @@ ---- -adc_reg.csv: {} -aes_reg.csv: {} -ahb_dma_reg.csv: {} -ana_i2c_mst_reg.csv: {} -assist_debug_reg.csv: {} -axi_dma_reg.csv: {} -bitscrambler_reg.csv: {} -cache_reg.csv: {} -core0_interrupt_reg.csv: {} -core1_interrupt_reg.csv: {} -dma2d_reg.csv: {} -ds_reg.csv: {} -ecc_mult_reg.csv: - name: ECC -ecdsa_reg.csv: {} -efuse_mem_reg.csv: {} -gdma_reg.csv: {} -gpio_reg.csv: {} -gpio_sd_reg.csv: {} -h264_dma_reg.csv: {} -h264_reg.csv: {} -hmac_reg.csv: {} -hp_sys_clkrst_reg.csv: {} -hp_sys_reg.csv: - name: HP_SYS -huk_reg.csv: {} -i2c_ext_reg.csv: {} -i2s_reg.csv: {} -i3c_mst_mem_reg.csv: {} -i3c_mst_reg.csv: {} -i3c_slv_reg.csv: {} -icm_sys_qos_reg.csv: {} -icm_sys_reg.csv: {} -iomux_mspi_pin_reg.csv: {} -iomux_reg.csv: {} -isp_reg.csv: {} -jpeg_reg.csv: {} -keymng_reg.csv: {} -l2mem_monitor_reg.csv: {} -lcdcam_reg.csv: {} -ledc_reg.csv: {} -lp_analog_peri_reg.csv: - name: LP_ANA_PERI -lp_aonclkrst_reg.csv: - name: LP_AON_CLKRST -lp_gpio_reg.csv: {} -lp_i2c_ext_reg.csv: {} -lp_i2s_reg.csv: {} -lp_intr_reg.csv: {} -lp_iomux_reg.csv: {} -lp_mailbox_reg.csv: {} -lp_peri_reg.csv: {} -lp_spi_reg.csv: {} -lp_sys_reg.csv: {} -lp_uart_reg.csv: {} -mipi_csi_bridge_reg.csv: {} -mipi_csi_host_reg.csv: {} -mipi_dsi_bridge_reg.csv: {} -mipi_dsi_host_reg.csv: {} -parl_io_reg.csv: {} -pau_reg.csv: {} -pcnt_reg.csv: {} -pmu_reg.csv: {} -ppa_reg.csv: {} -pvt_reg.csv: {} -pwm_reg.csv: - name: MCPWM -rmt_reg.csv: {} -rsa_reg.csv: {} -rtc_timer_reg.csv: {} -rtc_wdt_reg.csv: {} -rtcadc_reg.csv: {} -rtclockcali_reg.csv: {} -sdmmc_reg.csv: {} -sha_reg.csv: {} -soc_etm_reg.csv: {} -spi1_mem_reg_s.csv: # TODO: am I using the correct file? (c/s) - name: SPI1 -spi2_reg_s.csv: - name: SPI2 -spi3_reg.csv: - name: SPI3 -spi_mem_reg_s.csv: # TODO: am I using the correct file? (c/s) - name: SPI0 -sys_timer_reg.csv: {} -tcm_monitor_reg.csv: {} -timers_reg.csv: {} -touch_reg.csv: {} -trace_reg.csv: {} -tsens_reg.csv: {} -twai_reg.csv: {} -twaifd_reg.csv: {} -uart_reg.csv: {} -uhci_reg.csv: {} -usb_device_reg.csv: {} -usbwrap_reg.csv: {} diff --git a/xtask/regdesc/chips/esp32s2-ulp/interrupts.yml b/xtask/regdesc/chips/esp32s2-ulp/interrupts.yml deleted file mode 100644 index 65ef3e335e..0000000000 --- a/xtask/regdesc/chips/esp32s2-ulp/interrupts.yml +++ /dev/null @@ -1,28 +0,0 @@ -peripheral_interrupts: - - name: TOUCH_DONE_INT - instance: SENS - value: 0 - - name: TOUCH_INACTIVE_INT - instance: SENS - value: 1 - - name: TOUCH_ACTIVE_INT - instance: SENS - value: 2 - - name: SARADC1_DONE_INT - instance: SENS - value: 3 - - name: SARADC2_DONE_INT - instance: SENS - value: 4 - - name: TSENS_DONE_INT - instance: SENS - value: 5 - - name: RISCV_START_INT - instance: RTC_CNTL - value: 6 - - name: SW_INT - instance: RTC_CNTL - value: 7 - - name: SWD_INT - instance: RTC_CNTL - value: 8 diff --git a/xtask/regdesc/chips/esp32s2-ulp/peripherals.yml b/xtask/regdesc/chips/esp32s2-ulp/peripherals.yml deleted file mode 100644 index 8508ffae76..0000000000 --- a/xtask/regdesc/chips/esp32s2-ulp/peripherals.yml +++ /dev/null @@ -1,13 +0,0 @@ -peripheral_instances: - - name: RTC_IO - peripheral: RTCIO - base_addr: 0xA400 - - name: RTC_CNTL - peripheral: RTC_CNTL - base_addr: 0x8000 - - name: RTC_I2C - peripheral: RTC_I2C - base_addr: 0xEC00 - - name: SENS - peripheral: SENS - base_addr: 0xC800 diff --git a/xtask/regdesc/chips/esp32s2-ulp/regdesc.yml b/xtask/regdesc/chips/esp32s2-ulp/regdesc.yml deleted file mode 100644 index 68f5d7eea8..0000000000 --- a/xtask/regdesc/chips/esp32s2-ulp/regdesc.yml +++ /dev/null @@ -1,3 +0,0 @@ ---- -rtc_i2c_reg.csv: {} -rtc_io_reg.csv: {} diff --git a/xtask/regdesc/chips/esp32s2/interrupts.yml b/xtask/regdesc/chips/esp32s2/interrupts.yml deleted file mode 100644 index 4a529d7e2c..0000000000 --- a/xtask/regdesc/chips/esp32s2/interrupts.yml +++ /dev/null @@ -1,286 +0,0 @@ -peripheral_interrupts: - - name: WIFI_MAC - instance: INTERRUPT_CORE0 - value: 0 - - name: WIFI_NMI - instance: INTERRUPT_CORE0 - value: 1 - - name: WIFI_PWR - instance: INTERRUPT_CORE0 - value: 2 - - name: WIFI_BB - instance: INTERRUPT_CORE0 - value: 3 - - name: BT_MAC - instance: INTERRUPT_CORE0 - value: 4 - - name: BT_BB - instance: INTERRUPT_CORE0 - value: 5 - - name: BT_BB_NMI - instance: INTERRUPT_CORE0 - value: 6 - - name: RWBT - instance: INTERRUPT_CORE0 - value: 7 - - name: RWBLE - instance: INTERRUPT_CORE0 - value: 8 - - name: RWBT_NMI - instance: INTERRUPT_CORE0 - value: 9 - - name: RWBLE_NMI - instance: INTERRUPT_CORE0 - value: 10 - - name: SLC0 - instance: INTERRUPT_CORE0 - value: 11 - - name: SLC1 - instance: INTERRUPT_CORE0 - value: 12 - - name: UHCI0 - instance: UHCI0 - value: 13 - - name: UHCI1 - instance: UHCI0 - value: 14 - - name: TG0_T0_LEVEL - instance: TIMG0 - value: 15 - - name: TG0_T1_LEVEL - instance: TIMG0 - value: 16 - - name: TG0_WDT_LEVEL - instance: TIMG0 - value: 17 - - name: TG0_LACT_LEVEL - instance: TIMG0 - value: 18 - - name: TG1_T0_LEVEL - instance: TIMG1 - value: 19 - - name: TG1_T1_LEVEL - instance: TIMG1 - value: 20 - - name: TG1_WDT_LEVEL - instance: TIMG1 - value: 21 - - name: TG1_LACT_LEVEL - instance: TIMG1 - value: 22 - - name: GPIO - instance: GPIO - value: 23 - - name: GPIO_NMI - instance: GPIO - value: 24 - - name: GPIO_INTR_2 - instance: GPIO - value: 25 - - name: GPIO_NMI_2 - instance: GPIO - value: 26 - - name: DEDICATED_GPIO - instance: DEDICATED_GPIO - value: 27 - - name: FROM_CPU_INTR0 - instance: INTERRUPT_CORE0 - value: 28 - - name: FROM_CPU_INTR1 - instance: INTERRUPT_CORE0 - value: 29 - - name: FROM_CPU_INTR2 - instance: INTERRUPT_CORE0 - value: 30 - - name: FROM_CPU_INTR3 - instance: INTERRUPT_CORE0 - value: 31 - - name: SPI1 - instance: SPI1 - value: 32 - - name: SPI2 - instance: SPI2 - value: 33 - - name: SPI3 - instance: SPI3 - value: 34 - - name: I2S0 - instance: I2S0 - value: 35 - - name: I2S1 - instance: I2S0 - value: 36 - - name: UART0 - instance: UART0 - value: 37 - - name: UART1 - instance: UART1 - value: 38 - - name: UART2 - instance: UART1 - value: 39 - - name: SDIO_HOST - instance: INTERRUPT_CORE0 - value: 40 - - name: MCPWM0 - instance: MCPWM0 - value: 41 - - name: MCPWM1 - instance: MCPWM0 - value: 42 - - name: MCPWM2 - instance: MCPWM1 - value: 43 - - name: MCPWM3 - instance: MCPWM1 - value: 44 - - name: LEDC - instance: LEDC - value: 45 - - name: EFUSE - instance: EFUSE - value: 46 - - name: TWAI0 - instance: TWAI0 - value: 47 - - name: USB - instance: USB0 - value: 48 - - name: RTC_CORE - instance: RTC_CNTL - value: 49 - - name: RMT - instance: RMT - value: 50 - - name: PCNT - instance: PCNT - value: 51 - - name: I2C_EXT0 - instance: I2C0 - value: 52 - - name: I2C_EXT1 - instance: I2C1 - value: 53 - - name: RSA - instance: RSA - value: 54 - - name: SHA - instance: SHA - value: 55 - - name: AES - instance: AES - value: 56 - - name: SPI2_DMA - instance: SPI2 - value: 57 - - name: SPI3_DMA - instance: SPI3 - value: 58 - - name: WDT - instance: INTERRUPT_CORE0 - value: 59 - - name: TIMER1 - instance: LEDC - value: 60 - - name: TIMER2 - instance: LEDC - value: 61 - - name: TG0_T0_EDGE - instance: TIMG0 - value: 62 - - name: TG0_T1_EDGE - instance: TIMG0 - value: 63 - - name: TG0_WDT_EDGE - instance: TIMG0 - value: 64 - - name: TG0_LACT_EDGE - instance: TIMG0 - value: 65 - - name: TG1_T0_EDGE - instance: TIMG1 - value: 66 - - name: TG1_T1_EDGE - instance: TIMG1 - value: 67 - - name: TG1_WDT_EDGE - instance: TIMG1 - value: 68 - - name: TG1_LACT_EDGE - instance: TIMG1 - value: 69 - - name: CACHE_IA - instance: INTERRUPT_CORE0 - value: 70 - - name: SYSTIMER_TARGET0 - instance: SYSTIMER - value: 71 - - name: SYSTIMER_TARGET1 - instance: SYSTIMER - value: 72 - - name: SYSTIMER_TARGET2 - instance: SYSTIMER - value: 73 - - name: ASSIST_DEBUG - instance: ASSIST_DEBUG - value: 74 - - name: PMS_PRO_IRAM0_ILG - instance: PMS - value: 75 - - name: PMS_PRO_DRAM0_ILG - instance: PMS - value: 76 - - name: PMS_PRO_DPORT_ILG - instance: PMS - value: 77 - - name: PMS_PRO_AHB_ILG - instance: PMS - value: 78 - - name: PMS_PRO_CACHE_ILG - instance: PMS - value: 79 - - name: PMS_DMA_APB_I_ILG - instance: PMS - value: 80 - - name: PMS_DMA_RX_I_ILG - instance: PMS - value: 81 - - name: PMS_DMA_TX_I_ILG - instance: PMS - value: 82 - - name: SPI0_REJECT_CACHE - instance: SPI0 - value: 83 - - name: DMA_COPY - instance: DMA - value: 84 - - name: SPI4_DMA - instance: SPI4 - value: 85 - - name: SPI4 - instance: SPI4 - value: 86 - - name: ICACHE_PRELOAD - instance: INTERRUPT_CORE0 - value: 87 - - name: DCACHE_PRELOAD - instance: INTERRUPT_CORE0 - value: 88 - - name: APB_ADC - instance: APB_SARADC - value: 89 - - name: CRYPTO_DMA - instance: DMA - value: 90 - - name: CPU_PERI_ERR - instance: INTERRUPT_CORE0 - value: 91 - - name: APB_PERI_ERR - instance: INTERRUPT_CORE0 - value: 92 - - name: DCACHE_SYNC - instance: INTERRUPT_CORE0 - value: 93 - - name: ICACHE_SYNC - instance: INTERRUPT_CORE0 - value: 94 diff --git a/xtask/regdesc/chips/esp32s2/peripherals.yml b/xtask/regdesc/chips/esp32s2/peripherals.yml deleted file mode 100644 index b242583464..0000000000 --- a/xtask/regdesc/chips/esp32s2/peripherals.yml +++ /dev/null @@ -1,130 +0,0 @@ -peripheral_instances: - - name: AES - peripheral: AES - base_addr: 0x6003a000 - - name: APB_SARADC - peripheral: APB_SARADC - base_addr: 0x3f440000 - - name: BB - peripheral: BB - base_addr: 0x3f41D000 - - name: DEDICATED_GPIO - peripheral: DEDIC_GPIO - base_addr: 0x3f4cf000 - - name: DS - peripheral: DS - base_addr: 0x6003d000 - - name: EFUSE - peripheral: EFUSE - base_addr: 0x3f41a000 - - name: EXTMEM - peripheral: EXTMEM - base_addr: 0x61800000 - - name: GPIO - peripheral: GPIO - base_addr: 0x3f404000 - - name: GPIO_SD - peripheral: GPIOSD - base_addr: 0x3f404f00 - - name: HMAC - peripheral: HMAC - base_addr: 0x6003e000 - - name: I2C0 - peripheral: I2C - base_addr: 0x3f413000 - - name: I2C1 - peripheral: I2C - base_addr: 0x3f427000 - - name: I2S0 - peripheral: I2S - base_addr: 0x3f40f000 - - name: INTERRUPT_CORE0 - peripheral: INTERRUPT_CORE0 - base_addr: 0x3f4c2000 - - name: IO_MUX - peripheral: IO_MUX - base_addr: 0x3f409000 - - name: LEDC - peripheral: LEDC - base_addr: 0x3f419000 - - name: PCNT - peripheral: PCNT - base_addr: 0x3f417000 - - name: PMS - peripheral: PMS - base_addr: 0x3f4c1000 - - name: RMT - peripheral: RMT - base_addr: 0x3f416000 - - name: RNG - peripheral: RNG - base_addr: 0x60035000 - - name: RSA - peripheral: RSA - base_addr: 0x6003c000 - - name: RTC_CNTL - peripheral: RTC_CNTL - base_addr: 0x3f408000 - - name: RTC_IO - peripheral: RTCIO - base_addr: 0x3f408400 - - name: RTC_I2C - peripheral: RTC_I2C - base_addr: 0x3f408c00 - - name: SENS - peripheral: SENS - base_addr: 0x3f408800 - - name: SHA - peripheral: SHA - base_addr: 0x6003b000 - - name: SPI0 - peripheral: SPI - base_addr: 0x3f403000 - - name: SPI1 - peripheral: SPI - base_addr: 0x3f402000 - - name: SPI2 - peripheral: SPI - base_addr: 0x3f424000 - - name: SPI3 - peripheral: SPI - base_addr: 0x3f425000 - - name: SPI4 - peripheral: SPI - base_addr: 0x3f437000 - - name: SYSCON - peripheral: SYSCON - base_addr: 0x3f426000 - - name: SYSTEM - peripheral: SYSTEM - base_addr: 0x3f4c0000 - - name: SYSTIMER - peripheral: SYSTIMER - base_addr: 0x3f423000 - - name: TIMG0 - peripheral: TIMG - base_addr: 0x3f41f000 - - name: TIMG1 - peripheral: TIMG - base_addr: 0x3f420000 - - name: TWAI0 - peripheral: TWAI - base_addr: 0x3f42b000 - - name: UART0 - peripheral: UART - base_addr: 0x3f400000 - - name: UART1 - peripheral: UART - base_addr: 0x3f410000 - - name: UHCI0 - peripheral: UHCI - base_addr: 0x3f414000 - - name: USB0 - peripheral: USB - base_addr: 0x60080000 - - name: USB_WRAP - peripheral: USB_WRAP - base_addr: 0x3f439000 - - name: XTS_AES - peripheral: XTS_AES - base_addr: 0x6003a100 diff --git a/xtask/regdesc/chips/esp32s2/regdesc.yml b/xtask/regdesc/chips/esp32s2/regdesc.yml deleted file mode 100644 index 2acde15e46..0000000000 --- a/xtask/regdesc/chips/esp32s2/regdesc.yml +++ /dev/null @@ -1,39 +0,0 @@ ---- -aes_reg.csv: {} -apb_saradc_reg.csv: - name: APB_SARADC -dedicated_gpio_reg.csv: - name: DEDIC_GPIO -digital_signature_reg.csv: {} -efuse_reg.csv: {} -extmem_reg_723.csv: {} -gpio_7.2.3.csv: {} -gpio_sd_reg.csv: {} -hmac_reg.csv: {} -i2c_ext.csv: {} -i2s_reg.csv: {} -interrupt_reg.csv: - name: INTERRUPT_CORE0 - wno: - - reg-names - - field-names -io_mux_reg.csv: {} -ledc_reg.csv: {} -pcnt_reg.csv: {} -permission_reg.csv: {} -rmt_reg_11.csv: {} -rsa_reg.csv: {} -rtc_i2c_reg.csv: - name: RTC_I2C -rtc_io_reg.csv: {} -sha_reg.csv: {} -spi_reg.csv: {} -system_reg.csv: {} -system_timer.csv: {} -timers_reg.csv: {} -twai_reg.csv: {} -uart_reg.csv: {} -uhci_reg.csv: {} -usb_wrap_reg_for_trm.csv: {} -xts_aes_reg.csv: - name: XTS_AES diff --git a/xtask/regdesc/chips/esp32s3-ulp/interrupts.yml b/xtask/regdesc/chips/esp32s3-ulp/interrupts.yml deleted file mode 100644 index d97af5df48..0000000000 --- a/xtask/regdesc/chips/esp32s3-ulp/interrupts.yml +++ /dev/null @@ -1,37 +0,0 @@ -peripheral_interrupts: - - name: TOUCH_DONE_INT - instance: SENS - value: 0 - - name: TOUCH_INACTIVE_INT - instance: SENS - value: 1 - - name: TOUCH_ACTIVE_INT - instance: SENS - value: 2 - - name: SARADC1_DONE_INT - instance: SENS - value: 3 - - name: SARADC2_DONE_INT - instance: SENS - value: 4 - - name: TSENS_DONE_INT - instance: SENS - value: 5 - - name: RISCV_START_INT - instance: RTC_CNTL - value: 6 - - name: SW_INT - instance: RTC_CNTL - value: 7 - - name: SWD_INT - instance: RTC_CNTL - value: 8 - - name: TOUCH_TIME_OUT_INT - instance: SENS - value: 9 - - name: TOUCH_APPROACH_LOOP_DONE_INT - instance: SENS - value: 10 - - name: TOUCH_SCAN_DONE_INT - instance: SENS - value: 11 diff --git a/xtask/regdesc/chips/esp32s3-ulp/peripherals.yml b/xtask/regdesc/chips/esp32s3-ulp/peripherals.yml deleted file mode 100644 index 9d198e65f3..0000000000 --- a/xtask/regdesc/chips/esp32s3-ulp/peripherals.yml +++ /dev/null @@ -1,13 +0,0 @@ -peripheral_instances: - - name: RTC_IO - peripheral: RTC_IO - base_addr: 0xA400 - - name: RTC_CNTL - peripheral: RTC_CNTL - base_addr: 0x8000 - - name: RTC_I2C - peripheral: RTC_I2C - base_addr: 0xEC00 - - name: SENS - peripheral: SENS - base_addr: 0xC800 diff --git a/xtask/regdesc/chips/esp32s3-ulp/regdesc.yml b/xtask/regdesc/chips/esp32s3-ulp/regdesc.yml deleted file mode 100644 index 341db9b33d..0000000000 --- a/xtask/regdesc/chips/esp32s3-ulp/regdesc.yml +++ /dev/null @@ -1,9 +0,0 @@ ---- -rtc_cntl_reg_for_trm.csv: {} -rtc_i2c_reg_for_trm.csv: {} -rtc_io_reg_for_trm.csv: {} -saradc_reg_for_trm.csv: - name: SENS - wno: - - reg-names - - field-names diff --git a/xtask/regdesc/chips/esp32s3/interrupts.yml b/xtask/regdesc/chips/esp32s3/interrupts.yml deleted file mode 100644 index dc39dafb92..0000000000 --- a/xtask/regdesc/chips/esp32s3/interrupts.yml +++ /dev/null @@ -1,286 +0,0 @@ -peripheral_interrupts: - - name: WIFI_MAC - instance: INTERRUPT_CORE0 - value: 0 - - name: WIFI_NMI - instance: INTERRUPT_CORE0 - value: 1 - - name: WIFI_PWR - instance: INTERRUPT_CORE0 - value: 2 - - name: WIFI_BB - instance: INTERRUPT_CORE0 - value: 3 - - name: BT_MAC - instance: INTERRUPT_CORE0 - value: 4 - - name: BT_BB - instance: INTERRUPT_CORE0 - value: 5 - - name: BT_BB_NMI - instance: INTERRUPT_CORE0 - value: 6 - - name: RWBT - instance: INTERRUPT_CORE0 - value: 7 - - name: RWBLE - instance: INTERRUPT_CORE0 - value: 8 - - name: RWBT_NMI - instance: INTERRUPT_CORE0 - value: 9 - - name: RWBLE_NMI - instance: INTERRUPT_CORE0 - value: 10 - - name: I2C_MASTER - instance: I2C0 - value: 11 - - name: SLC0 - instance: INTERRUPT_CORE0 - value: 12 - - name: SLC1 - instance: INTERRUPT_CORE0 - value: 13 - - name: UHCI0 - instance: UHCI0 - value: 14 - - name: UHCI1 - instance: UHCI1 - value: 15 - - name: GPIO - instance: GPIO - value: 16 - - name: GPIO_NMI - instance: GPIO - value: 17 - - name: GPIO_INTR_2 - instance: GPIO - value: 18 - - name: GPIO_NMI_2 - instance: GPIO - value: 19 - - name: SPI1 - instance: SPI1 - value: 20 - - name: SPI2 - instance: SPI2 - value: 21 - - name: SPI3 - instance: SPI3 - value: 22 - - name: LCD_CAM - instance: LCD_CAM - value: 24 - - name: I2S0 - instance: I2S0 - value: 25 - - name: I2S1 - instance: I2S1 - value: 26 - - name: UART0 - instance: UART0 - value: 27 - - name: UART1 - instance: UART1 - value: 28 - - name: UART2 - instance: UART2 - value: 29 - - name: SDIO_HOST - instance: INTERRUPT_CORE0 - value: 30 - - name: MCPWM0 - instance: MCPWM0 - value: 31 - - name: MCPWM1 - instance: MCPWM1 - value: 32 - - name: LEDC - instance: LEDC - value: 35 - - name: EFUSE - instance: EFUSE - value: 36 - - name: TWAI0 - instance: TWAI0 - value: 37 - - name: USB - instance: USB0 - value: 38 - - name: RTC_CORE - instance: RTC_CNTL - value: 39 - - name: RMT - instance: RMT - value: 40 - - name: PCNT - instance: PCNT - value: 41 - - name: I2C_EXT0 - instance: I2C0 - value: 42 - - name: I2C_EXT1 - instance: I2C1 - value: 43 - - name: SPI2_DMA - instance: SPI2 - value: 44 - - name: SPI3_DMA - instance: SPI3 - value: 45 - - name: WDT - instance: INTERRUPT_CORE0 - value: 47 - - name: TIMER1 - instance: LEDC - value: 48 - - name: TIMER2 - instance: LEDC - value: 49 - - name: TG0_T0_LEVEL - instance: TIMG0 - value: 50 - - name: TG0_T1_LEVEL - instance: TIMG0 - value: 51 - - name: TG0_WDT_LEVEL - instance: TIMG0 - value: 52 - - name: TG1_T0_LEVEL - instance: TIMG1 - value: 53 - - name: TG1_T1_LEVEL - instance: TIMG1 - value: 54 - - name: TG1_WDT_LEVEL - instance: TIMG1 - value: 55 - - name: CACHE_IA - instance: INTERRUPT_CORE0 - value: 56 - - name: SYSTIMER_TARGET0 - instance: SYSTIMER - value: 57 - - name: SYSTIMER_TARGET1 - instance: SYSTIMER - value: 58 - - name: SYSTIMER_TARGET2 - instance: SYSTIMER - value: 59 - - name: SPI_MEM_REJECT_CACHE - instance: SPI0 - value: 60 - - name: DCACHE_PRELOAD0 - instance: INTERRUPT_CORE0 - value: 61 - - name: ICACHE_PRELOAD0 - instance: INTERRUPT_CORE0 - value: 62 - - name: DCACHE_SYNC0 - instance: INTERRUPT_CORE0 - value: 63 - - name: ICACHE_SYNC0 - instance: INTERRUPT_CORE0 - value: 64 - - name: APB_ADC - instance: APB_SARADC - value: 65 - - name: DMA_IN_CH0 - instance: DMA - value: 66 - - name: DMA_IN_CH1 - instance: DMA - value: 67 - - name: DMA_IN_CH2 - instance: DMA - value: 68 - - name: DMA_IN_CH3 - instance: DMA - value: 69 - - name: DMA_IN_CH4 - instance: DMA - value: 70 - - name: DMA_OUT_CH0 - instance: DMA - value: 71 - - name: DMA_OUT_CH1 - instance: DMA - value: 72 - - name: DMA_OUT_CH2 - instance: DMA - value: 73 - - name: DMA_OUT_CH3 - instance: DMA - value: 74 - - name: DMA_OUT_CH4 - instance: DMA - value: 75 - - name: RSA - instance: RSA - value: 76 - - name: SHA - instance: SHA - value: 77 - - name: AES - instance: - value: 78 - - name: FROM_CPU_INTR0 - instance: INTERRUPT_CORE0 - value: 79 - - name: FROM_CPU_INTR1 - instance: INTERRUPT_CORE0 - value: 80 - - name: FROM_CPU_INTR2 - instance: INTERRUPT_CORE0 - value: 81 - - name: FROM_CPU_INTR3 - instance: INTERRUPT_CORE0 - value: 82 - - name: ASSIST_DEBUG - instance: ASSIST_DEBUG - value: 83 - - name: DMA_APBPERI_PMS - instance: DMA - value: 84 - - name: CORE0_IRAM0_PMS - instance: INTERRUPT_CORE0 - value: 85 - - name: CORE0_DRAM0_PMS - instance: INTERRUPT_CORE0 - value: 86 - - name: CORE0_PIF_PMS - instance: INTERRUPT_CORE0 - value: 87 - - name: CORE0_PIF_PMS_SIZE - instance: INTERRUPT_CORE0 - value: 88 - - name: CORE1_IRAM0_PMS - instance: INTERRUPT_CORE1 - value: 89 - - name: CORE1_DRAM0_PMS - instance: INTERRUPT_CORE1 - value: 90 - - name: CORE1_PIF_PMS - instance: INTERRUPT_CORE1 - value: 91 - - name: CORE1_PIF_PMS_SIZE - instance: INTERRUPT_CORE1 - value: 92 - - name: BACKUP_PMS_VIOLATE - instance: DMA - value: 93 - - name: CACHE_CORE0_ACS - instance: INTERRUPT_CORE0 - value: 94 - - name: CACHE_CORE1_ACS - instance: INTERRUPT_CORE1 - value: 95 - - name: USB_DEVICE - instance: USB_DEVICE - value: 96 - - name: PERI_BACKUP - instance: PERI_BACKUP - value: 97 - - name: DMA_EXTMEM_REJECT - instance: DMA - value: 98 diff --git a/xtask/regdesc/chips/esp32s3/peripherals.yml b/xtask/regdesc/chips/esp32s3/peripherals.yml deleted file mode 100644 index 5a3352d6d0..0000000000 --- a/xtask/regdesc/chips/esp32s3/peripherals.yml +++ /dev/null @@ -1,163 +0,0 @@ -peripheral_instances: - - name: AES - peripheral: AES - base_addr: 0x6003A000 - - name: APB_CTRL - peripheral: APB_CTRL - base_addr: 0x60026000 - - name: APB_SARADC - peripheral: APB_SARADC - base_addr: 0x60040000 - - name: ASSIST_DEBUG - peripheral: DEBUG_ASSIST - base_addr: 0x600CE000 - - name: BB - peripheral: BB - base_addr: 0x6001D000 - - name: DMA - peripheral: DMA - base_addr: 0x6003F000 - - name: DS - peripheral: DS - base_addr: 0x6003D000 - - name: EFUSE - peripheral: EFUSE - base_addr: 0x60007000 - - name: EXTMEM - peripheral: EXTMEM - base_addr: 0x600C4000 - - name: GPIO - peripheral: GPIO - base_addr: 0x60004000 - - name: GPIO_SD - peripheral: GPIOSD - base_addr: 0x60004f00 - - name: HMAC - peripheral: HMAC - base_addr: 0x6003E000 - - name: I2C0 - peripheral: I2C - base_addr: 0x60013000 - - name: I2C1 - peripheral: I2C - base_addr: 0x60027000 - - name: I2S0 - peripheral: I2S - base_addr: 0x6000F000 - - name: I2S1 - peripheral: I2S1 - base_addr: 0x6002D000 - - name: INTERRUPT_CORE0 - peripheral: INTERRUPT_CORE0 - base_addr: 0x600C2000 - - name: INTERRUPT_CORE1 - peripheral: INTERRUPT_CORE1 - base_addr: 0x600C2000 - - name: IO_MUX - peripheral: IO_MUX - base_addr: 0x60009000 - - name: LCD_CAM - peripheral: LCD_CAM - base_addr: 0x60041000 - - name: LEDC - peripheral: LEDC - base_addr: 0x60019000 - - name: PCNT - peripheral: PCNT - base_addr: 0x60017000 - - name: PERI_BACKUP - peripheral: PERI_BACKUP - base_addr: 0x6002A000 - - name: MCPWM0 - peripheral: PWM - base_addr: 0x6001E000 - - name: MCPWM1 - peripheral: PWM - base_addr: 0x6002C000 - - name: RMT - peripheral: RMT - base_addr: 0x60016000 - - name: RNG - peripheral: RNG - base_addr: 0x60034F6C - - name: RSA - peripheral: RSA - base_addr: 0x6003C000 - - name: RTC_CNTL - peripheral: RTC_CNTL - base_addr: 0x60008000 - - name: RTC_I2C - peripheral: RTC_I2C - base_addr: 0x60008C00 - - name: RTC_IO - peripheral: RTC_IO - base_addr: 0x60008400 - - name: SDHOST - peripheral: SDHOST - base_addr: 0x60028000 - - name: SENS - peripheral: SENS - base_addr: 0x60008800 - - name: SENSITIVE - peripheral: SENSITIVE - base_addr: 0x600C1000 - - name: SHA - peripheral: SHA - base_addr: 0x6003B000 - - name: SPI0 - peripheral: SPI0 - base_addr: 0x60003000 - - name: SPI1 - peripheral: SPI1 - base_addr: 0x60002000 - - name: SPI2 - peripheral: SPI2 - base_addr: 0x60024000 - - name: SPI3 - peripheral: SPI2 - base_addr: 0x60025000 - - name: SYSTEM - peripheral: SYSTEM - base_addr: 0x600C0000 - - name: SYSTIMER - peripheral: SYSTIMER - base_addr: 0x60023000 - - name: TIMG0 - peripheral: TIMG - base_addr: 0x6001F000 - - name: TIMG1 - peripheral: TIMG - base_addr: 0x60020000 - - name: TWAI0 - peripheral: TWAI - base_addr: 0x6002B000 - - name: UART0 - peripheral: UART - base_addr: 0x60000000 - - name: UART1 - peripheral: UART - base_addr: 0x60010000 - - name: UART2 - peripheral: UART - base_addr: 0x6002E000 - - name: UHCI0 - peripheral: UHCI - base_addr: 0x60014000 - - name: UHCI1 - peripheral: UHCI - base_addr: 0x6000C000 - - name: USB0 - peripheral: USB - base_addr: 0x60080000 - - name: USB_DEVICE - peripheral: USB_DEVICE - base_addr: 0x60038000 - - name: USB_WRAP - peripheral: USB_WRAP - base_addr: 0x60039000 - - name: WCL - peripheral: WCL - base_addr: 0x600D0000 - - name: XTS_AES - peripheral: XTS_AES - base_addr: 0x600CC000 diff --git a/xtask/regdesc/chips/esp32s3/regdesc.yml b/xtask/regdesc/chips/esp32s3/regdesc.yml deleted file mode 100644 index 560800c09c..0000000000 --- a/xtask/regdesc/chips/esp32s3/regdesc.yml +++ /dev/null @@ -1,78 +0,0 @@ ---- -aes_reg.csv: {} -apb_ctrl_reg_for_trm.csv: {} -apb_saradc_reg_for_trm.csv: - name: APB_SARADC - wno: - - field-names -assist_debug_reg_for_trm.csv: {} -core0_interrupt_reg_for_trm.csv: {} -core1_interrupt_reg_for_trm.csv: {} -dma_reg_for_trm.csv: {} -ds_reg.csv: {} -efuse_software_728.csv: {} -extmem_reg_for_trm.csv: {} -gpio_7.2_for_trm.csv: {} -gpio_sd_reg_for_trm.csv: {} -hmac_reg.csv: {} -i2c_ext_for_trm.csv: {} -i2s_reg.csv: {} -i2s1_reg.csv: - name: I2S1 - wno: - - reg-names - - field-names -io_mux_reg.csv: {} -lcd_cam_reg_for_trm.csv: {} -ledc_reg_for_trm.csv: {} -pcnt_reg.csv: {} -peri_backup_reg_for_trm.csv: {} -pwm_reg_for_trm.csv: {} -rmt_reg_for_trm.csv: {} -rsa_reg.csv: {} -rtc_cntl_reg_for_trm.csv: {} -rtc_i2c_reg_for_trm.csv: {} -rtc_io_reg_for_trm.csv: {} -saradc_reg_for_trm.csv: - name: SENS - wno: - - reg-names - - field-names -sdio_host.csv: - name: SDIO_HOST - wno: - - field-names -sdmmc.csv: {} -sensitive_reg_for_trm.csv: {} -sha_reg.csv: {} -spi_mem_reg.csv: - name: SPI0 - wno: - - reg-names - - field-names -spi1_mem_reg.csv: - name: SPI1 - wno: - - reg-names - - field-names -spi2_reg.csv: - name: SPI2 - wno: - - reg-names - - field-names -spi3_reg.csv: - name: SPI3 - wno: - - reg-names - - field-names -sys_timer_reg_for_trm.csv: {} -system_reg_for_trm.csv: {} -timers_reg_for_trm.csv: {} -twai_reg.csv: {} -Uart_reg.csv: {} -uhci_reg_for_trm.csv: {} -usb_device_reg_for_trm.csv: {} -usb_wrap_reg_for_trm.csv: {} -world_controller_for_trm.csv: - name: WCL -xts_aes_reg.csv: {} diff --git a/xtask/regdesc/chips/esp32s31/interrupts.yml b/xtask/regdesc/chips/esp32s31/interrupts.yml deleted file mode 100644 index 4b149faa97..0000000000 --- a/xtask/regdesc/chips/esp32s31/interrupts.yml +++ /dev/null @@ -1,510 +0,0 @@ -peripheral_interrupts: - # Source: components/soc/esp32s31/include/soc/interrupts.h - # value = sequential enum position (ETS_*_INTR_SOURCE = N) - # - name: SYS_ICM - # instance: - # value: 0 - - name: AXI_PERF_MON - instance: AXI_PERF_MON - value: 1 - - name: USB_DEVICE - instance: USB_DEVICE - value: 2 - - name: SDIO_HOST - instance: SDHOST - value: 3 - - name: SPI2 - instance: SPI2 - value: 4 - - name: SPI3 - instance: SPI3 - value: 5 - - name: I2S0 - instance: I2S0 - value: 6 - - name: I2S1 - instance: I2S1 - value: 7 - - name: UHCI0 - instance: UHCI0 - value: 8 - - name: UART0 - instance: UART0 - value: 9 - - name: UART1 - instance: UART1 - value: 10 - - name: UART2 - instance: UART2 - value: 11 - - name: UART3 - instance: UART3 - value: 12 - - name: LCD_CAM - instance: LCD_CAM - value: 13 - - name: PWM0 - instance: MCPWM0 - value: 14 - - name: PWM1 - instance: MCPWM1 - value: 15 - - name: PWM2 - instance: MCPWM2 - value: 16 - - name: PWM3 - instance: MCPWM3 - value: 17 - - name: TWAI0 - instance: TWAI0 - value: 18 - - name: TWAI0_TIMER - instance: TWAI0 - value: 19 - - name: TWAI1 - instance: TWAI1 - value: 20 - - name: TWAI1_TIMER - instance: TWAI1 - value: 21 - - name: RMT - instance: RMT - value: 22 - - name: I2C0 - instance: I2C0 - value: 23 - - name: I2C1 - instance: I2C1 - value: 24 - - name: TG0_T0 - instance: TIMG0 - value: 25 - - name: TG0_T1 - instance: TIMG0 - value: 26 - - name: TG0_WDT - instance: TIMG0 - value: 27 - - name: TG1_T0 - instance: TIMG1 - value: 28 - - name: TG1_T1 - instance: TIMG1 - value: 29 - - name: TG1_WDT - instance: TIMG1 - value: 30 - - name: LEDC0 - instance: LEDC0 - value: 31 - - name: LEDC1 - instance: LEDC1 - value: 32 - - name: SYSTIMER_TARGET0 - instance: SYSTIMER - value: 33 - - name: SYSTIMER_TARGET1 - instance: SYSTIMER - value: 34 - - name: SYSTIMER_TARGET2 - instance: SYSTIMER - value: 35 - - name: AHB_PDMA_IN_CH0 - instance: AHB_DMA - value: 36 - - name: AHB_PDMA_IN_CH1 - instance: AHB_DMA - value: 37 - - name: AHB_PDMA_IN_CH2 - instance: AHB_DMA - value: 38 - - name: AHB_PDMA_IN_CH3 - instance: AHB_DMA - value: 39 - - name: AHB_PDMA_IN_CH4 - instance: AHB_DMA - value: 40 - - name: AHB_PDMA_OUT_CH0 - instance: AHB_DMA - value: 41 - - name: AHB_PDMA_OUT_CH1 - instance: AHB_DMA - value: 42 - - name: AHB_PDMA_OUT_CH2 - instance: AHB_DMA - value: 43 - - name: AHB_PDMA_OUT_CH3 - instance: AHB_DMA - value: 44 - - name: AHB_PDMA_OUT_CH4 - instance: AHB_DMA - value: 45 - - name: ASRC_CHNL0 - instance: ASRC - value: 46 - - name: ASRC_CHNL1 - instance: ASRC - value: 47 - - name: AXI_PDMA_IN_CH0 - instance: AXI_DMA - value: 48 - - name: AXI_PDMA_IN_CH1 - instance: AXI_DMA - value: 49 - - name: AXI_PDMA_IN_CH2 - instance: AXI_DMA - value: 50 - - name: AXI_PDMA_OUT_CH0 - instance: AXI_DMA - value: 51 - - name: AXI_PDMA_OUT_CH1 - instance: AXI_DMA - value: 52 - - name: AXI_PDMA_OUT_CH2 - instance: AXI_DMA - value: 53 - - name: RSA - instance: RSA - value: 54 - - name: AES - instance: AES - value: 55 - - name: SHA - instance: SHA - value: 56 - - name: ECC - instance: ECC - value: 57 - - name: ECDSA - instance: ECDSA - value: 58 - - name: KM - instance: KEYMNG - value: 59 - - name: RMA - instance: RMA - value: 60 - - name: GPIO_INT0 - instance: GPIO - value: 61 - - name: GPIO_INT1 - instance: GPIO - value: 62 - - name: GPIO_INT2 - instance: GPIO - value: 63 - - name: GPIO_INT3 - instance: GPIO - value: 64 - # - name: CPU_INT_FROM_CPU_0 - # instance: - # value: 65 - # - name: CPU_INT_FROM_CPU_1 - # instance: - # value: 66 - # - name: CPU_INT_FROM_CPU_2 - # instance: - # value: 67 - # - name: CPU_INT_FROM_CPU_3 - # instance: - # value: 68 - - name: CACHE - instance: CACHE - value: 69 - - name: CPU_APM_M0 - instance: CPU_APM - value: 70 - - name: CPU_APM_M1 - instance: CPU_APM - value: 71 - - name: CPU_APM_M2 - instance: CPU_APM - value: 72 - - name: CPU_APM_M3 - instance: CPU_APM - value: 73 - - name: HP_MEM_APM_M0 - instance: HP_MEM_APM - value: 74 - - name: HP_MEM_APM_M1 - instance: HP_MEM_APM - value: 75 - - name: HP_MEM_APM_M2 - instance: HP_MEM_APM - value: 76 - - name: HP_MEM_APM_M3 - instance: HP_MEM_APM - value: 77 - - name: HP_MEM_APM_M4 - instance: HP_MEM_APM - value: 78 - - name: HP_MEM_APM_M5 - instance: HP_MEM_APM - value: 79 - # - name: CPU_PERI0_TIMEOUT - # instance: - # value: 80 - # - name: CPU_PERI1_TIMEOUT - # instance: - # value: 81 - # - name: HP_PERI0_TIMEOUT - # instance: - # value: 82 - # - name: HP_PERI1_TIMEOUT - # instance: - # value: 83 - - name: HP_APM_M0 - instance: HP_APM - value: 84 - - name: HP_APM_M1 - instance: HP_APM - value: 85 - - name: HP_APM_M2 - instance: HP_APM - value: 86 - - name: HP_APM_M3 - instance: HP_APM - value: 87 - - name: HP_APM_M4 - instance: HP_APM - value: 88 - - name: HP_APM_M5 - instance: HP_APM - value: 89 - - name: HP_APM_M6 - instance: HP_APM - value: 90 - - name: HP_PERI0_PMS - instance: HP_PERI0_PMS - value: 91 - - name: HP_PERI1_PMS - instance: HP_PERI1_PMS - value: 92 - # - name: CPU0_PERI_PMS - # instance: - # value: 93 - # - name: CPU1_PERI_PMS - # instance: - # value: 94 - # - name: MSPI_FLASH - # instance: - # value: 95 - - name: LPI - instance: GMAC - value: 96 - - name: PMT - instance: GMAC - value: 97 - - name: SBD - instance: GMAC - value: 98 - - name: USB_OTG_HS - instance: USB_OTG_HS - value: 99 - - name: USB_OTG_HS_ENDP_MULTI_PROC - instance: USB_OTG_HS - value: 100 - - name: JPEG - instance: JPEG - value: 101 - - name: PPA - instance: PPA - value: 102 - - name: CORE0_TRACE - instance: TRACE0 - value: 103 - - name: CORE1_TRACE - instance: TRACE1 - value: 104 - - name: DMA2D_IN_CH0 - instance: DMA2D - value: 105 - - name: DMA2D_IN_CH1 - instance: DMA2D - value: 106 - - name: DMA2D_IN_CH2 - instance: DMA2D - value: 107 - - name: DMA2D_OUT_CH0 - instance: DMA2D - value: 108 - - name: DMA2D_OUT_CH1 - instance: DMA2D - value: 109 - - name: DMA2D_OUT_CH2 - instance: DMA2D - value: 110 - - name: DMA2D_OUT_CH3 - instance: DMA2D - value: 111 - # - name: MSPI_PSRAM - # instance: - # value: 112 - - name: HP_SYSREG - instance: HP_SYS - value: 113 - - name: PCNT0 - instance: PCNT0 - value: 114 - - name: PCNT1 - instance: PCNT1 - value: 115 - - name: HP_PAU - instance: PAU - value: 116 - - name: HP_PARLIO_RX - instance: PARL_IO - value: 117 - - name: HP_PARLIO_TX - instance: PARL_IO - value: 118 - - name: ASSIST_DEBUG - instance: - value: 119 - # - name: MODEM_WIFI_MAC - # instance: - # value: 120 - # - name: MODEM_WIFI_MAC_NMI - # instance: - # value: 121 - # - name: MODEM_WIFI_PWR - # instance: - # value: 122 - # - name: MODEM_WIFI_BB - # instance: - # value: 123 - # - name: MODEM_BT_MAC - # instance: - # value: 124 - # - name: MODEM_BT_BB - # instance: - # value: 125 - # - name: MODEM_BT_BB_NMI - # instance: - # value: 126 - # - name: MODEM_LP_TIMER - # instance: - # value: 127 - # - name: MODEM_COEX - # instance: - # value: 128 - # - name: MODEM_BLE_TIMER - # instance: - # value: 129 - # - name: MODEM_BLE_SEC - # instance: - # value: 130 - # - name: MODEM_I2C_MST - # instance: - # value: 131 - # - name: MODEM_ZB_MAC - # instance: - # value: 132 - # - name: MODEM_BT_MAC_INT1 - # instance: - # value: 133 - - name: CORDIC - instance: CORDIC - value: 134 - - name: ZERO_DET - instance: ZERO_DET - value: 135 - - name: LP_WDT - instance: LP_WDT - value: 136 - - name: LP_TIMER0 - instance: LP_TIMER - value: 137 - - name: LP_TIMER1 - instance: LP_TIMER - value: 138 - - name: MB_HP - instance: LP_MAILBOX - value: 139 - - name: MB_LP - instance: LP_MAILBOX - value: 140 - - name: PMU0 - instance: PMU - value: 141 - - name: PMU1 - instance: PMU - value: 142 - - name: LP_ANA - instance: LP_ANA_PERI - value: 143 - - name: LP_ADC - instance: ADC - value: 144 - - name: LP_DAC - instance: DAC - value: 145 - - name: LP_GPIO - instance: LP_GPIO - value: 146 - - name: LP_I2C - instance: LP_I2C0 - value: 147 - - name: LP_SPI - instance: LP_SPI - value: 148 - - name: LP_TOUCH - instance: LP_TOUCH - value: 149 - - name: LP_TSENS - instance: LP_TSENS - value: 150 - - name: LP_UART - instance: LP_UART - value: 151 - # - name: LP_EFUSE - # instance: - # value: 152 - - name: LP_SW - instance: LP_SYS - value: 153 - - name: LP_TRNG - instance: TRNG - value: 154 - - name: LP_SYSREG - instance: LP_SYS - value: 155 - - name: LP_APM_M0 - instance: LP_APM - value: 156 - - name: LP_APM_M1 - instance: LP_APM - value: 157 - - name: LP_APM_M2 - instance: LP_APM - value: 158 - - name: LP_APM_M3 - instance: LP_APM - value: 159 - - name: LP_PERI0_PMS - instance: LP_PERI_PMS - value: 160 - - name: LP_PERI1_PMS - instance: LP_PERI_PMS - value: 161 - - name: LP_HUK - instance: LP_HUK - value: 162 - # - name: LP_PERI_TIMEOUT - # instance: - # value: 163 - - name: LP_AHB_PDMA_IN_CH0 - instance: LP_AHB_DMA - value: 164 - - name: LP_AHB_PDMA_IN_CH1 - instance: LP_AHB_DMA - value: 165 - - name: LP_AHB_PDMA_OUT_CH0 - instance: LP_AHB_DMA - value: 166 - - name: LP_AHB_PDMA_OUT_CH1 - instance: LP_AHB_DMA - value: 167 - # - name: LP_SW_INVALID_SLEEP - # instance: - # value: 168 diff --git a/xtask/regdesc/chips/esp32s31/peripherals.yml b/xtask/regdesc/chips/esp32s31/peripherals.yml deleted file mode 100644 index ce207022fb..0000000000 --- a/xtask/regdesc/chips/esp32s31/peripherals.yml +++ /dev/null @@ -1,334 +0,0 @@ -peripheral_instances: - # Base addresses from components/soc/esp32s31/ld/esp32s31.peripherals.ld - # Interrupt controller bases from components/soc/esp32s31/register/soc/reg_base.h: - # DR_REG_INTR0_BASE = 0x20585000 (CORE0), +0x800 (CORE1) - - name: INTERRUPT_CORE0 - peripheral: CORE0 - base_addr: 0x20585000 - - name: INTERRUPT_CORE1 - peripheral: CORE1 - base_addr: 0x20585800 - - name: USB_OTG_HS - peripheral: USB_OTGHS - base_addr: 0x20300000 - - name: PAU - peripheral: PAU - base_addr: 0x20341000 - - name: SDHOST - peripheral: SDHOST - base_addr: 0x20342000 - - name: AHB_DMA - peripheral: AHB_DMA - base_addr: 0x20343000 - - name: JPEG - peripheral: JPEG - base_addr: 0x20344000 - - name: PPA - peripheral: PPA - base_addr: 0x20345000 - - name: DMA2D - peripheral: DMA2D - base_addr: 0x20346000 - - name: AXI_DMA - peripheral: AXI_DMA - base_addr: 0x20348000 - - name: GMAC - peripheral: GMAC - base_addr: 0x20350000 - - name: PVT - peripheral: PVT - base_addr: 0x20354000 - - name: RMT - peripheral: RMT - base_addr: 0x20355000 - - name: BITSCRAMBLER - peripheral: BITSCRAMBLER - base_addr: 0x20356000 - - name: ASRC - peripheral: ASRC - base_addr: 0x20357000 - - name: CNNT_SYS - peripheral: CNNT_SYS - base_addr: 0x20359000 - - name: MCPWM0 - peripheral: MCPWM - base_addr: 0x20381000 - - name: MCPWM1 - peripheral: MCPWM - base_addr: 0x20382000 - - name: MCPWM2 - peripheral: MCPWM - base_addr: 0x20383000 - - name: MCPWM3 - peripheral: MCPWM - base_addr: 0x20384000 - - name: I2C0 - peripheral: I2C - base_addr: 0x20385000 - - name: I2C1 - peripheral: I2C - base_addr: 0x20386000 - - name: I2S0 - peripheral: I2S - base_addr: 0x20387000 - - name: I2S1 - peripheral: I2S - base_addr: 0x20388000 - - name: PCNT0 - peripheral: PCNT - base_addr: 0x20389000 - - name: UART0 - peripheral: UART - base_addr: 0x2038A000 - - name: UART1 - peripheral: UART - base_addr: 0x2038B000 - - name: UART2 - peripheral: UART - base_addr: 0x2038C000 - - name: UART3 - peripheral: UART - base_addr: 0x2038D000 - - name: PARL_IO - peripheral: PARL_IO - base_addr: 0x2038E000 - - name: SPI2 - peripheral: SPI2 - base_addr: 0x2038F000 - - name: SPI3 - peripheral: SPI3 - base_addr: 0x20390000 - - name: USB_DEVICE - peripheral: USB_SERIAL_JTAG - base_addr: 0x20391000 - - name: LEDC0 - peripheral: LEDC - base_addr: 0x20392000 - - name: SOC_ETM - peripheral: SOC_ETM - base_addr: 0x20393000 - - name: TWAI0 - peripheral: TWAIFD - base_addr: 0x20394000 - - name: TWAI1 - peripheral: TWAIFD - base_addr: 0x20395000 - - name: LCD_CAM - peripheral: LCDCAM - base_addr: 0x20396000 - - name: UHCI0 - peripheral: UHCI - base_addr: 0x20398000 - - name: SYSTIMER - peripheral: SYSTIMER - base_addr: 0x20399000 - - name: ZERO_DET - peripheral: ZERO_DET - base_addr: 0x2039A000 - - name: CORDIC - peripheral: CORDIC - base_addr: 0x2039B000 - - name: LEDC1 - peripheral: LEDC - base_addr: 0x2039C000 - - name: PCNT1 - peripheral: PCNT - base_addr: 0x2039D000 - - name: SPI0 - peripheral: SPI0 - base_addr: 0x20500000 - - name: SPI1 - peripheral: SPI1 - base_addr: 0x20501000 - - name: TEE - peripheral: TEE - base_addr: 0x20504000 - - name: HP_APM - peripheral: HP_APM - base_addr: 0x20504400 - - name: HP_MEM_APM - peripheral: HP_MEM_APM - base_addr: 0x20504800 - - name: CPU_APM - peripheral: CPU_APM - base_addr: 0x20504C00 - - name: HP_PERI0_PMS - peripheral: HP_PERI0_PMS - base_addr: 0x20505000 - - name: KEYMNG - peripheral: KEYMNG - base_addr: 0x20506000 - - name: AES - peripheral: AES - base_addr: 0x20508000 - - name: SHA - peripheral: SHA - base_addr: 0x20509000 - - name: RSA - peripheral: RSA - base_addr: 0x2050A000 - - name: ECC - peripheral: ECC - base_addr: 0x2050B000 - - name: DS - peripheral: DS - base_addr: 0x2050C000 - - name: HMAC - peripheral: HMAC - base_addr: 0x2050D000 - - name: ECDSA - peripheral: ECDSA - base_addr: 0x2050E000 - - name: RMA - peripheral: RMA - base_addr: 0x2050F000 - - name: AXI_ICM - peripheral: ICM_SYS - base_addr: 0x20510000 - - name: ICM_SYS_AXI_IC - peripheral: ICM_SYS_AXI_IC - base_addr: 0x20510400 - - name: AXI_PERF_MON - peripheral: AXI_PERF_MON - base_addr: 0x20511000 - - name: TIMG0 - peripheral: TIMG - base_addr: 0x20580000 - - name: TIMG1 - peripheral: TIMG - base_addr: 0x20581000 - - name: IO_MUX - peripheral: IO_MUX - base_addr: 0x20582000 - - name: GPIO - peripheral: GPIO - base_addr: 0x20583000 - - name: GPIO_EXT - peripheral: GPIO_EXT - base_addr: 0x20583E00 - - name: IOMUX_MSPI_PIN - peripheral: IOMUX_MSPI_PIN - base_addr: 0x20584000 - - name: HP_SYS - peripheral: HP_SYS - base_addr: 0x20586000 - - name: HP_SYS_CLKRST - peripheral: HP_SYS_CLKRST - base_addr: 0x20587000 - - name: CNNT_IO_MUX - peripheral: CNNT_IO_MUX - base_addr: 0x20588000 - - name: HP_ALIVE_SYS - peripheral: HP_ALIVE_SYS - base_addr: 0x20589000 - - name: HP_PERI1_PMS - peripheral: HP_PERI1_PMS - base_addr: 0x2058A000 - - name: LP_SYS - peripheral: LP_SYS - base_addr: 0x20700000 - - name: LP_AON_CLKRST - peripheral: LP_AON_CLKRST - base_addr: 0x20701000 - - name: LP_ANA_PERI - peripheral: LP_ANA_PERI - base_addr: 0x20702000 - - name: LP_HUK - peripheral: HUK - base_addr: 0x20703000 - - name: PMU - peripheral: PMU - base_addr: 0x20704000 - - name: LP_TOUCH_AON - peripheral: TOUCH_AON - base_addr: 0x20705000 - - name: LP_PERI_PMS - peripheral: LP_PERI_PMS - base_addr: 0x20706000 - - name: LP_TEE - peripheral: LP_TEE - base_addr: 0x20706800 - - name: LP_APM - peripheral: LP_APM - base_addr: 0x20706C00 - - name: LP_PERICLKRST - peripheral: LP_PERICLKRST - base_addr: 0x20710000 - - name: LP_IO_MUX - peripheral: LP_IOMUX - base_addr: 0x20712000 - - name: LP_GPIO - peripheral: LP_GPIO - base_addr: 0x20713000 - - name: LP_INTR - peripheral: LP_INTR - base_addr: 0x20714000 - - name: EFUSE - peripheral: EFUSE - base_addr: 0x20715000 - - name: LP_TIMER - peripheral: RTC_TIMER - base_addr: 0x20800000 - - name: LP_WDT - peripheral: RTC_WDT - base_addr: 0x20801000 - - name: LP_CLKCALI - peripheral: RTCLOCKCALI - base_addr: 0x20802000 - - name: LP_PWR - peripheral: LP_PWR - base_addr: 0x20804000 - - name: LP_ADI - peripheral: LP_ADI - base_addr: 0x20805000 - - name: LP_UART - peripheral: LP_UART - base_addr: 0x20810000 - - name: LP_I2C0 - peripheral: LP_I2C - base_addr: 0x20811000 - - name: LP_SPI - peripheral: LP_SPI - base_addr: 0x20812000 - - name: LP_I2C_ANA_MST - peripheral: LP_I2C_ANA_MST - base_addr: 0x20813000 - - name: TRNG - peripheral: TRNG - base_addr: 0x20814000 - - name: ADC - peripheral: ADC - base_addr: 0x20815000 - - name: LP_TOUCH - peripheral: TOUCH - base_addr: 0x20816000 - - name: LP_MAILBOX - peripheral: LP_MAILBOX - base_addr: 0x20817000 - - name: LP_TSENS - peripheral: TSENS - base_addr: 0x20818000 - - name: LP_AHB_DMA - peripheral: LP_AHB_DMA - base_addr: 0x20819000 - - name: DAC - peripheral: DAC - base_addr: 0x2081A000 - - name: CACHE - peripheral: CACHE - base_addr: 0x2C000000 - - name: TRACE0 - peripheral: TRACE - base_addr: 0x2D000000 - - name: TRACE1 - peripheral: TRACE - base_addr: 0x2D001000 - - name: BUS_MONITOR - peripheral: BUS_MONITOR - base_addr: 0x2D002000 - - name: MEM_MONITOR0 - peripheral: MEM_MONITOR - base_addr: 0x2D003000 - - name: MEM_MONITOR1 - peripheral: MEM_MONITOR - base_addr: 0x2D004000 diff --git a/xtask/regdesc/chips/esp32s31/regdesc.yml b/xtask/regdesc/chips/esp32s31/regdesc.yml deleted file mode 100644 index ad6ed129a4..0000000000 --- a/xtask/regdesc/chips/esp32s31/regdesc.yml +++ /dev/null @@ -1,106 +0,0 @@ ---- -adc_reg.csv: {} -aes_reg.csv: {} -ahb_dma_reg.csv: {} -asrc_reg.csv: {} -axi_dma_reg.csv: {} -axi_perf_mon_reg.csv: {} -bitscrambler_reg.csv: {} -bus_monitor_reg.csv: {} -cache_reg.csv: {} -cnnt_io_mux_reg.csv: {} -cnnt_sys_reg.csv: {} -cordic_reg.csv: {} -core0_interrupt_reg.csv: {} -core1_interrupt_reg.csv: {} -cpu_apm_reg.csv: {} -dac_reg.csv: {} -dma2d_reg.csv: {} -ds_reg.csv: {} -ecc_mult_reg.csv: - name: ECC -ecdsa_reg.csv: {} -efuse_mem_reg.csv: {} -gmac_reg.csv: {} -gpio_ext_reg.csv: {} -gpio_reg.csv: {} -hmac_reg.csv: {} -hp_alive_sys_reg.csv: {} -hp_apm_reg.csv: {} -hp_mem_apm_reg.csv: {} -hp_peri0_pms_reg.csv: {} -hp_peri1_pms_reg.csv: {} -hp_sys_clkrst_reg.csv: {} -hp_sys_reg.csv: - name: HP_SYS -huk_reg.csv: {} -i2c_ext_reg.csv: {} -i2s_reg.csv: {} -icm_sys_axi_ic_reg.csv: {} -icm_sys_reg.csv: {} -iomux_mspi_pin_reg.csv: {} -iomux_reg.csv: {} -jpeg_reg.csv: {} -keymng_reg.csv: {} -lcdcam_reg.csv: {} -ledc_reg.csv: {} -lp_adi_reg.csv: {} -lp_ahb_dma_reg.csv: {} -lp_analog_peri_reg.csv: - name: LP_ANA_PERI -lp_aonclkrst_reg.csv: - name: LP_AON_CLKRST -lp_apm_reg.csv: {} -lp_gpio_reg.csv: {} -lp_i2c_ana_mst_reg.csv: {} -lp_i2c_ext_reg.csv: {} -lp_intr_reg.csv: {} -lp_iomux_reg.csv: {} -lp_mailbox_reg.csv: {} -lp_peri_pms_reg.csv: {} -lp_periclkrst_reg.csv: {} -lp_pwr_reg.csv: {} -lp_spi_reg.csv: {} -lp_sys_reg.csv: {} -lp_tee_reg.csv: {} -lp_uart_reg.csv: {} -mem_monitor_reg.csv: {} -parl_io_reg.csv: {} -pau_reg.csv: {} -pcnt_reg.csv: {} -pmu_reg.csv: {} -ppa_reg.csv: {} -pvt_reg.csv: {} -pwm_reg.csv: - name: MCPWM -rma_reg.csv: {} -rmt_reg.csv: {} -rsa_reg.csv: {} -rtc_timer_reg.csv: {} -rtc_wdt_reg.csv: {} -rtclockcali_reg.csv: {} -sdio_host_reg.csv: {} -sha_reg.csv: {} -soc_etm_reg.csv: {} -spi1_mem_reg_s.csv: # TODO: am I using the correct file? (c/s) - name: SPI1 -spi2_reg_s.csv: - name: SPI2 -spi3_reg.csv: - name: SPI3 -spi_mem_reg_s.csv: # TODO: am I using the correct file? (c/s) - name: SPI0 -sys_timer_reg.csv: {} -tee_reg.csv: {} -timers_reg.csv: {} -touch_aon_reg.csv: {} -touch_reg.csv: {} -trace_reg.csv: {} -trng_reg.csv: {} -tsens_reg.csv: {} -twaifd_reg.csv: {} -uart_reg.csv: {} -uhci_reg.csv: {} -usb_otghs_reg.csv: {} -usb_serial_jtag_reg.csv: {} -zero_det_reg.csv: {} diff --git a/xtask/src/main.rs b/xtask/src/main.rs index bd1053b242..07a45cc9b0 100644 --- a/xtask/src/main.rs +++ b/xtask/src/main.rs @@ -120,9 +120,10 @@ enum Commands { /// Generate a base CMSIS-SVD from GDVS register CSVs /// - /// Chip metadata (CSV mapping, peripheral instances, interrupts) is bundled - /// under `xtask/regdesc/chips/{chip}/`. Output defaults to - /// `target/generated_svds/{chip}.svd`. + /// Requires `--chip`, `--csv-dir`, `--interrupts`, and `--reg-base`. + /// Peripheral bases come from `--reg-base` (IDF `reg_base.h`) and IRQs from + /// `--interrupts` (IDF `interrupts.h`). CSV files are discovered in + /// `--csv-dir`. Output defaults to `target/generated_svds/{chip}.svd`. GenerateBaseSvd { /// Chip to generate #[arg(long, value_enum)] @@ -132,6 +133,14 @@ enum Commands { #[arg(long)] csv_dir: PathBuf, + /// Path to IDF `soc/interrupts.h` (required) + #[arg(long)] + interrupts: PathBuf, + + /// Path to IDF `register/soc/reg_base.h` (required) + #[arg(long = "reg-base", visible_alias = "reg_base")] + reg_base: PathBuf, + /// Output SVD file path #[arg(long)] output: Option, @@ -181,13 +190,18 @@ fn main() -> Result<()> { Commands::GenerateBaseSvd { chip, csv_dir, + interrupts, + reg_base, output, version, } => { let chip = chip.to_string(); - let output = - output.unwrap_or_else(|| regdesc::default_output_path(&workspace, &chip)); - regdesc::generate_base_svd(&chip, &csv_dir, &output, version) + let output = output.unwrap_or_else(|| regdesc::default_output_path(&workspace, &chip)); + let sources = regdesc::GenerateSources { + interrupts, + reg_base, + }; + regdesc::generate_base_svd(&chip, &csv_dir, &output, version, &sources) } } } diff --git a/xtask/src/regdesc/config.rs b/xtask/src/regdesc/config.rs index 9d83d39886..fba435ed72 100644 --- a/xtask/src/regdesc/config.rs +++ b/xtask/src/regdesc/config.rs @@ -1,40 +1,20 @@ -use std::collections::HashMap; -use std::fs; -use std::path::{Path, PathBuf}; +use std::{ + collections::HashMap, + fs, + path::{Path, PathBuf}, +}; use anyhow::{Context, Result}; use serde::Deserialize; use super::model::{ - ChipInfo, Peripheral, PeripheralInstance, PeripheralInterrupt, RegdescFragment, + ChipInfo, + Peripheral, + PeripheralInstance, + PeripheralInterrupt, + RegdescFragment, }; -#[derive(Debug, Deserialize)] -struct PeripheralsFile { - peripheral_instances: Vec, -} - -#[derive(Debug, Deserialize)] -struct PeripheralInstanceRaw { - name: String, - peripheral: String, - base_addr: String, - description: Option, -} - -#[derive(Debug, Deserialize)] -struct InterruptsFile { - peripheral_interrupts: Vec, -} - -#[derive(Debug, Deserialize)] -struct PeripheralInterruptRaw { - name: String, - instance: String, - value: u32, - description: Option, -} - #[derive(Debug, Deserialize)] struct DescriptionsFile { peripheral_descriptions: Vec, @@ -46,71 +26,28 @@ struct PeripheralDescription { description: String, } -#[derive(Debug, Deserialize)] -pub struct CsvEntryOptions { - pub name: Option, - /// Warning names to ignore (reserved for future use; present in YAML for compatibility). - #[serde(default)] - #[allow(dead_code)] - pub wno: Vec, -} - -/// Reads `regdesc.yml` — which CSV files to parse and any name overrides. -pub fn load_regdesc_config(path: &Path) -> Result> { - let content = fs::read_to_string(path) - .with_context(|| format!("reading regdesc config {}", path.display()))?; - serde_yaml::from_str(&content) - .with_context(|| format!("parsing regdesc config {}", path.display())) -} - -/// Loads `peripherals.yml` and `interrupts.yml` (base addresses, instances, IRQ numbers). -pub fn load_metadata( - config_dir: &Path, -) -> Result<(Vec, Vec)> { - let peripherals_path = config_dir.join("peripherals.yml"); - let interrupts_path = config_dir.join("interrupts.yml"); - - let peripherals_content = fs::read_to_string(&peripherals_path) - .with_context(|| format!("reading {}", peripherals_path.display()))?; - let interrupts_content = fs::read_to_string(&interrupts_path) - .with_context(|| format!("reading {}", interrupts_path.display()))?; - - let peripherals: PeripheralsFile = serde_yaml::from_str(&peripherals_content) - .with_context(|| format!("parsing {}", peripherals_path.display()))?; - let interrupts: InterruptsFile = serde_yaml::from_str(&interrupts_content) - .with_context(|| format!("parsing {}", interrupts_path.display()))?; - - let instances = peripherals - .peripheral_instances - .into_iter() - .map(|raw| PeripheralInstance { - name: raw.name, - peripheral: raw.peripheral, - base_addr: parse_addr(&raw.base_addr), - description: raw.description, - }) - .collect(); - - let peripheral_interrupts = interrupts - .peripheral_interrupts - .into_iter() - .map(|raw| PeripheralInterrupt { - name: raw.name, - instance: raw.instance, - value: raw.value, - description: raw.description, - }) - .collect(); - - Ok((instances, peripheral_interrupts)) +/// Lists `*.csv` files in `csv_dir` (sorted by file name). +pub fn discover_csv_files(csv_dir: &Path) -> Result> { + let mut files = Vec::new(); + for entry in fs::read_dir(csv_dir) + .with_context(|| format!("reading CSV directory {}", csv_dir.display()))? + { + let entry = entry?; + let path = entry.path(); + if path.extension().and_then(|e| e.to_str()) == Some("csv") { + files.push(path); + } + } + files.sort(); + Ok(files) } /// Loads the shared peripheral description blurbs from YAML. pub fn load_descriptions(path: &Path) -> Result> { - let content = fs::read_to_string(path) - .with_context(|| format!("reading {}", path.display()))?; - let file: DescriptionsFile = serde_yaml::from_str(&content) - .with_context(|| format!("parsing {}", path.display()))?; + let content = + fs::read_to_string(path).with_context(|| format!("reading {}", path.display()))?; + let file: DescriptionsFile = + serde_yaml::from_str(&content).with_context(|| format!("parsing {}", path.display()))?; Ok(file .peripheral_descriptions .into_iter() @@ -124,13 +61,10 @@ pub fn apply_instance_descriptions( descriptions: &HashMap, ) { for instance in instances.iter_mut() { - instance.description = descriptions - .get(&instance.name) - .cloned() - .or_else(|| { - log::warn!("{} has no description", instance.name); - Some(format!("{} Peripheral", instance.name)) - }); + instance.description = descriptions.get(&instance.name).cloned().or_else(|| { + log::warn!("{} has no description", instance.name); + Some(format!("{} Peripheral", instance.name)) + }); } } @@ -149,33 +83,11 @@ pub fn build_fragment( } } -/// Parses `"0x20343000"`-style addresses into a `u32`. -fn parse_addr(value: &str) -> u32 { - let value = value.trim(); - let parsed = if let Some(hex) = value.strip_prefix("0x").or_else(|| value.strip_prefix("0X")) { - u32::from_str_radix(hex, 16) - } else { - value.parse() - }; - match parsed { - Ok(addr) => addr, - Err(_) => { - log::warn!("invalid peripheral base address '{value}', using 0"); - 0 - } - } -} - /// Path to `xtask/regdesc/`. pub fn regdesc_root() -> PathBuf { PathBuf::from(env!("CARGO_MANIFEST_DIR")).join("regdesc") } -/// Path to `xtask/regdesc/chips/{chip}/`. -pub fn chip_config_dir(chip: &str) -> PathBuf { - regdesc_root().join("chips").join(chip) -} - /// Path to the shared `peripheral_descriptions.yml`. pub fn peripheral_descriptions_path() -> PathBuf { regdesc_root().join("peripheral_descriptions.yml") diff --git a/xtask/src/regdesc/csv.rs b/xtask/src/regdesc/csv.rs index 883c7621a9..2c11bd271a 100644 --- a/xtask/src/regdesc/csv.rs +++ b/xtask/src/regdesc/csv.rs @@ -1,18 +1,18 @@ +use std::sync::LazyLock; + use anyhow::{bail, Context, Result}; use regex::Regex; -use std::sync::LazyLock; -use super::model::{ExpandContext, Field, Peripheral, Register, RegisterGroup}; -use super::util::{parse_verilog_number, trim}; +use super::{ + model::{ExpandContext, Field, Peripheral, Register, RegisterGroup}, + util::{parse_verilog_number, trim}, +}; -static BITPOS_REGEX: LazyLock = - LazyLock::new(|| Regex::new(r"\[((\d+):)?(\d+)\]").unwrap()); -static NONREG_REGEX: LazyLock = - LazyLock::new(|| Regex::new(r"([0-9]+)\*([0-9]+)").unwrap()); +static BITPOS_REGEX: LazyLock = LazyLock::new(|| Regex::new(r"\[((\d+):)?(\d+)\]").unwrap()); +static NONREG_REGEX: LazyLock = LazyLock::new(|| Regex::new(r"([0-9]+)\*([0-9]+)").unwrap()); static C_IDENT_REGEX: LazyLock = LazyLock::new(|| Regex::new(r"^[a-zA-Z][a-zA-Z0-9_$]+$").unwrap()); -static REPEAT_LOWER: LazyLock = - LazyLock::new(|| Regex::new(r"\$([A-Z])").unwrap()); +static REPEAT_LOWER: LazyLock = LazyLock::new(|| Regex::new(r"\$([A-Z])").unwrap()); const CSV_VERSION_1_0: i32 = 100; const CSV_VERSION_1_1: i32 = 110; @@ -31,6 +31,13 @@ pub fn read_peripheral_csv(content: &str, peripheral_name: Option<&str>) -> Resu parser.parse() } +/// Probe the peripheral type name from CSV contents without a full parse. +pub fn probe_peripheral_name_from_content(content: &str) -> Result> { + let (_version, records) = parse_csv_records(content)?; + Ok(probe_peripheral_name(&records, "RegName_Chg_0") + .or_else(|| probe_peripheral_name(&records, "RegName"))) +} + struct CsvParser { lines: Vec, peripheral_name: String, @@ -39,7 +46,8 @@ struct CsvParser { } impl CsvParser { - /// Sets up the parser and figures out the peripheral name if you didn't override it. + /// Sets up the parser and figures out the peripheral name if you didn't + /// override it. fn new(content: &str, peripheral_name: Option<&str>) -> Result { let (csv_version, records) = parse_csv_records(content)?; let peripheral_name = match peripheral_name { @@ -66,7 +74,10 @@ impl CsvParser { let (register, group, consumed) = self.parse_register(line_idx)?; line_idx += consumed; - if let Some(idx) = groups.iter().position(|existing| groups_match(existing, &group)) { + if let Some(idx) = groups + .iter() + .position(|existing| groups_match(existing, &group)) + { groups[idx].add_register(register); } else { let mut new_group = group; @@ -96,9 +107,7 @@ impl CsvParser { let field_name = csv_field(line, "Signal"); if !field_name.is_empty() { - bail!( - "Field {field_name} cannot be defined on the same line as register {reg_name}" - ); + bail!("Field {field_name} cannot be defined on the same line as register {reg_name}"); } let mut reg_name = reg_name.to_owned(); @@ -190,12 +199,15 @@ impl CsvParser { } field_name = self.validate_fix_field_name(&field_name)?; - let (shift, mask) = extract_field_shift_mask(line) - .context("Field missing bit position")?; + let (shift, mask) = + extract_field_shift_mask(line).context("Field missing bit position")?; let (min_val, max_val) = extract_min_max(line); let default_raw = csv_field(line, "Default"); - let (default, _, _) = - parse_verilog_number(if default_raw.is_empty() { "0" } else { default_raw }); + let (default, _, _) = parse_verilog_number(if default_raw.is_empty() { + "0" + } else { + default_raw + }); let mut field = Field { name: field_name, @@ -507,50 +519,3 @@ fn extract_field_shift_mask(line: &CsvLine) -> Option<(u32, u32)> { }; Some((low, mask)) } - -#[cfg(test)] -mod tests { - use super::*; - - fn line(pairs: &[(&str, &str)]) -> CsvLine { - pairs - .iter() - .map(|(k, v)| ((*k).to_owned(), (*v).to_owned())) - .collect() - } - - #[test] - fn bitpos_single_and_range() { - assert_eq!( - extract_field_shift_mask(&line(&[("BitPos", "[3]")])), - Some((3, 0x1)) - ); - assert_eq!( - extract_field_shift_mask(&line(&[("BitPos", "[7:0]")])), - Some((0, 0xff)) - ); - assert_eq!( - extract_field_shift_mask(&line(&[("BitPos", "[31:0]")])), - Some((0, u32::MAX)) - ); - assert_eq!(extract_field_shift_mask(&line(&[("BitPos", "[2:5]")])), None); - } - - #[test] - fn mem_size_v12_depth_times_word() { - let l = line(&[("NonReg", "16*32")]); - assert_eq!(extract_mem_size(&l, CSV_VERSION_1_2, "X_MEM"), 64); - } - - #[test] - fn probe_name_from_common_prefix() { - let records = vec![ - line(&[("Address", "0x0"), ("RegName", "UART0_CLK_REG")]), - line(&[("Address", "0x4"), ("RegName", "UART0_STATUS_REG")]), - ]; - assert_eq!( - probe_peripheral_name(&records, "RegName").as_deref(), - Some("UART0") - ); - } -} diff --git a/xtask/src/regdesc/idf.rs b/xtask/src/regdesc/idf.rs new file mode 100644 index 0000000000..717c4b868d --- /dev/null +++ b/xtask/src/regdesc/idf.rs @@ -0,0 +1,213 @@ +//! Parse Espressif IDF headers used as SVD metadata sources. + +use std::{fs, path::Path, sync::LazyLock}; + +use anyhow::{bail, Context, Result}; +use regex::Regex; + +use super::model::{PeripheralInstance, PeripheralInterrupt}; + +static DR_REG_BASE: LazyLock = LazyLock::new(|| { + Regex::new(r#"(?m)^#define\s+DR_REG_([A-Z0-9_]+)_BASE\s+(0x[0-9a-fA-F]+)"#).unwrap() +}); +static IEEE802154_BASE: LazyLock = LazyLock::new(|| { + Regex::new(r#"(?m)^#define\s+IEEE802154_REG_BASE\s+(0x[0-9a-fA-F]+)"#).unwrap() +}); +static ETS_ENUM_ENTRY: LazyLock = + LazyLock::new(|| Regex::new(r"(?m)^\s*(ETS_[A-Z0-9_]+)\s*(?:=\s*([^,/]+))?\s*,").unwrap()); + +/// GDVS CSV filename → peripheral type when probing would not match. +pub fn csv_type_overrides() -> &'static [(&'static str, &'static str)] { + &[ + ("apb_saradc_reg.csv", "APB_SARADC"), + ("ecc_mult_reg.csv", "ECC"), + ("efuse_mem_reg.csv", "EFUSE"), + ("gpio_ext_reg.csv", "GPIOSD"), + ("spi_mem_reg.csv", "SPI0"), + ("spi1_mem_reg.csv", "SPI1"), + ("spi2_reg.csv", "SPI2"), + ("usb_serial_jtag_reg.csv", "USB_DEVICE"), + ("usb_device_reg.csv", "USB_DEVICE"), + ] +} + +/// IDF `DR_REG__BASE` stem → (instance name, peripheral type). +fn reg_base_alias(stem: &str) -> Option<(&'static str, &'static str)> { + Some(match stem { + "SPIMEM0" => ("SPI0", "SPI0"), + "SPIMEM1" => ("SPI1", "SPI1"), + "GPSPI2" => ("SPI2", "SPI2"), + "GDMA" => ("DMA", "DMA"), + "USB_SERIAL_JTAG" => ("USB_DEVICE", "USB_DEVICE"), + "INTMTX" => ("INTERRUPT_CORE0", "INTMTX_CORE0"), + "TIMERG0" => ("TIMG0", "TIMG"), + "TIMERG1" => ("TIMG1", "TIMG"), + "GPIO_EXT" => ("GPIO_SD", "GPIOSD"), + "HP_SYSTEM" => ("HP_SYS", "HP_SYS"), + "LP_ANA_PERI" => ("LP_ANA", "LP_ANA"), + "MCPWM" => ("MCPWM0", "MCPWM"), + "TWAI" => ("TWAI0", "TWAI"), + "I2S0" => ("I2S0", "I2S"), + "UHCI0" => ("UHCI0", "UHCI"), + "UART0" => ("UART0", "UART"), + "UART1" => ("UART1", "UART"), + "I2C0" => ("I2C0", "I2C"), + "I2C1" => ("I2C1", "I2C"), + "LPPERI" => ("LP_PERI", "LPPERI"), + _ => return None, + }) +} + +/// Reads `soc/interrupts.h` and returns a flat IRQ list (name + hardware source +/// id). +/// +/// Names are normalized toward historical esp-pacs interrupt identifiers. +pub fn load_interrupts_h(path: &Path, chip: &str) -> Result> { + let content = fs::read_to_string(path) + .with_context(|| format!("reading interrupts header {}", path.display()))?; + parse_interrupts_h(&content, chip) + .with_context(|| format!("parsing interrupts header {}", path.display())) +} + +/// Reads `register/soc/reg_base.h` into peripheral instances. +pub fn load_reg_base_h(path: &Path) -> Result> { + let content = fs::read_to_string(path) + .with_context(|| format!("reading reg_base header {}", path.display()))?; + parse_reg_base_h(&content) + .with_context(|| format!("parsing reg_base header {}", path.display())) +} + +pub fn parse_interrupts_h(content: &str, chip: &str) -> Result> { + let mut next_value: i64 = 0; + let mut out = Vec::new(); + let mut in_enum = false; + + for line in content.lines() { + let trimmed = line.trim(); + if trimmed.starts_with("typedef enum") { + in_enum = true; + next_value = 0; + continue; + } + if !in_enum { + continue; + } + if trimmed.starts_with('}') { + break; + } + + let Some(caps) = ETS_ENUM_ENTRY.captures(line) else { + continue; + }; + let ets = &caps[1]; + if ets == "ETS_MAX_INTR_SOURCE" { + break; + } + if let Some(explicit) = caps.get(2) { + let expr = explicit.as_str().trim(); + // Skip symbolic aliases like `= ETS_FOO_INTR_SOURCE`; keep counting. + if let Ok(v) = parse_c_int(expr) { + next_value = v; + } + } + if next_value < 0 || next_value > u32::MAX as i64 { + bail!("interrupt value out of range for {ets}: {next_value}"); + } + out.push(PeripheralInterrupt { + name: pacify_irq_name(chip, &irq_name_from_ets(ets)), + value: next_value as u32, + description: None, + }); + next_value += 1; + } + + if out.is_empty() { + bail!("no ETS_* interrupt sources found"); + } + Ok(out) +} + +pub fn parse_reg_base_h(content: &str) -> Result> { + let mut out = Vec::new(); + + for caps in DR_REG_BASE.captures_iter(content) { + let stem = &caps[1]; + let addr = u32::from_str_radix(caps[2].trim_start_matches("0x"), 16) + .with_context(|| format!("invalid base address for DR_REG_{stem}_BASE"))?; + let (name, peripheral) = match reg_base_alias(stem) { + Some((n, p)) => (n.to_owned(), p.to_owned()), + None => (stem.to_owned(), stem.to_owned()), + }; + out.push(PeripheralInstance { + name, + peripheral, + base_addr: addr, + description: None, + }); + } + + if let Some(caps) = IEEE802154_BASE.captures(content) { + let addr = u32::from_str_radix(caps[1].trim_start_matches("0x"), 16) + .context("invalid IEEE802154_REG_BASE")?; + out.push(PeripheralInstance { + name: "IEEE802154".to_owned(), + peripheral: "IEEE802154".to_owned(), + base_addr: addr, + description: None, + }); + } + + if out.is_empty() { + bail!("no DR_REG_*_BASE definitions found"); + } + + out.sort_by(|a, b| a.name.cmp(&b.name)); + Ok(out) +} + +fn irq_name_from_ets(ets: &str) -> String { + let mut name = ets.strip_prefix("ETS_").unwrap_or(ets).to_owned(); + if let Some(rest) = name.strip_suffix("_INTR_SOURCE") { + name = rest.to_owned(); + } else if let Some(rest) = name.strip_suffix("_SOURCE") { + // e.g. ETS_BT_BB_NMI_SOURCE → BT_BB_NMI + name = rest.to_owned(); + } + name +} + +/// Map IDF enum stems onto names historically used in esp-pacs PACs. +fn pacify_irq_name(chip: &str, name: &str) -> String { + // Cross-chip exact renames. + let name = match name { + "USB_SERIAL_JTAG" => return "USB_DEVICE".to_owned(), + "GPIO_INTERRUPT_PRO" => return "GPIO".to_owned(), + "GPIO_INTERRUPT_PRO_NMI" => return "GPIO_NMI".to_owned(), + "PWM" | "PWM0" => return "MCPWM0".to_owned(), + "PWM1" => return "MCPWM1".to_owned(), + "TWAI" => return "TWAI0".to_owned(), + "WIFI_MAC_NMI" if matches!(chip, "esp32" | "esp32s2" | "esp32s3") => { + return "WIFI_NMI".to_owned(); + } + "GSPI2" if chip.contains("c6") => return "SPI2".to_owned(), + "GSPI2" => return "GPSPI2".to_owned(), + other => other, + }; + + if let Some(idx) = name.strip_prefix("CPU_INTR_FROM_CPU_") { + return format!("FROM_CPU_INTR{idx}"); + } + + // Timer IRQs stay as IDF names (`TG0_T0`). Chips that want `TG0_T0_LEVEL` + // in the PAC do that in svd patches (e.g. esp32p4 / esp32s31). + + name.to_owned() +} + +fn parse_c_int(expr: &str) -> Result { + let expr = expr.trim(); + if let Some(hex) = expr.strip_prefix("0x").or_else(|| expr.strip_prefix("0X")) { + return i64::from_str_radix(hex, 16).context("hex literal"); + } + expr.parse().context("decimal literal") +} diff --git a/xtask/src/regdesc/merge.rs b/xtask/src/regdesc/merge.rs index 78119d44d9..792d0eca23 100644 --- a/xtask/src/regdesc/merge.rs +++ b/xtask/src/regdesc/merge.rs @@ -1,13 +1,13 @@ -use std::collections::HashMap; -use std::sync::LazyLock; +use std::{collections::HashMap, sync::LazyLock}; use regex::Regex; -use super::model::{ExpandContext, ExpandValue, Field, Register, Repeat}; -use super::util::remove_index_from_strings; +use super::{ + model::{ExpandContext, ExpandValue, Field, Register, Repeat}, + util::remove_index_from_strings, +}; -static INDEX_VAR_REGEX: LazyLock = - LazyLock::new(|| Regex::new(r"\$([a-zA-Z])").unwrap()); +static INDEX_VAR_REGEX: LazyLock = LazyLock::new(|| Regex::new(r"\$([a-zA-Z])").unwrap()); #[derive(Debug, Clone)] pub struct MergeError(pub String); @@ -124,8 +124,12 @@ fn merge_field_group(fields: &mut [Field], repeat_name: &str) -> Result Result { +/// Actually merges one group of repeated registers into a single dim'd +/// register. +fn merge_register_group( + registers: &mut [Register], + repeat_name: &str, +) -> Result { let start = merge_get_start(registers, repeat_name)?; for register in ®isters[1..] { if register.visible != registers[0].visible { @@ -148,7 +152,12 @@ fn merge_register_group(registers: &mut [Register], repeat_name: &str) -> Result let mut merged = registers[0].clone(); merged.name = repeat_name.to_owned(); - merged.repeat = Some(Repeat::new(registers.len() as u32, stride, index_var, start)); + merged.repeat = Some(Repeat::new( + registers.len() as u32, + stride, + index_var, + start, + )); merged.repeat_name_hint = None; merged.repeat_index_hint = None; Ok(merged) @@ -175,7 +184,11 @@ where } /// Computes the address/bit spacing between repeated items. -fn merge_get_stride(repeat_name: &str, items_list: &[T], get_offset: F) -> Result +fn merge_get_stride( + repeat_name: &str, + items_list: &[T], + get_offset: F, +) -> Result where F: Fn(&T) -> u32, { @@ -213,7 +226,9 @@ fn merge_get_index_var(repeat_name: &str) -> Result { .map(|c| c[1].to_owned()) .collect(); if index_vars.is_empty() { - return Err(MergeError(format!("No index vars found in name: {repeat_name}"))); + return Err(MergeError(format!( + "No index vars found in name: {repeat_name}" + ))); } if index_vars.len() > 1 { return Err(MergeError(format!( @@ -328,50 +343,3 @@ impl RepeatHint for Register { self.repeat_index_hint } } - -#[cfg(test)] -mod tests { - use super::*; - use crate::regdesc::model::Field; - - fn field(name: &str, shift: u32, index: i32) -> Field { - Field { - name: name.to_owned(), - shift, - mask: 0x1, - access: "RW".to_owned(), - default: 0, - description: format!("bit {index}"), - visible: true, - min_val: None, - max_val: None, - repeat: None, - repeat_name_hint: Some("BIT$n".to_owned()), - repeat_index_hint: Some(index), - } - } - - #[test] - fn merge_fields_consecutive() { - let (merged, errors) = merge_fields(vec![ - field("BIT0", 0, 0), - field("BIT1", 1, 1), - field("BIT2", 2, 2), - ]); - assert!(errors.is_empty()); - assert_eq!(merged.len(), 1); - let repeat = merged[0].repeat.as_ref().unwrap(); - assert_eq!(repeat.count, 3); - assert_eq!(repeat.stride, 1); - assert_eq!(repeat.start, 0); - assert_eq!(merged[0].name, "BIT$n"); - } - - #[test] - fn merge_fields_gap_keeps_originals() { - let (merged, errors) = merge_fields(vec![field("BIT0", 0, 0), field("BIT2", 2, 2)]); - assert_eq!(errors.len(), 1); - assert_eq!(merged.len(), 2); - } -} - diff --git a/xtask/src/regdesc/mod.rs b/xtask/src/regdesc/mod.rs index 4fdf7949d1..4fce263f0d 100644 --- a/xtask/src/regdesc/mod.rs +++ b/xtask/src/regdesc/mod.rs @@ -1,51 +1,102 @@ mod config; mod csv; +mod idf; mod merge; mod model; mod svd; mod util; -use std::fs; -use std::path::Path; +use std::{ + collections::{HashMap, HashSet}, + fs, + path::{Path, PathBuf}, +}; use anyhow::{Context, Result}; - -use config::{chip_config_dir, load_descriptions, load_metadata, load_regdesc_config, peripheral_descriptions_path}; +pub use config::default_output_path; +use config::{discover_csv_files, load_descriptions, peripheral_descriptions_path}; use model::RegdescFragment; -pub use config::default_output_path; +/// IDF headers that supply peripheral bases and the IRQ list. +#[derive(Debug, Clone)] +pub struct GenerateSources { + /// Path to `soc/interrupts.h`. + pub interrupts: PathBuf, + /// Path to `register/soc/reg_base.h` (or chip-equivalent). + pub reg_base: PathBuf, +} -/// Main entry: load config + CSVs, build the chip model, write an SVD file. -pub fn generate_base_svd(chip: &str, csv_dir: &Path, output: &Path, version: u32) -> Result<()> { +/// Main entry: load IDF metadata + CSVs, build the chip model, write an SVD +/// file. +pub fn generate_base_svd( + chip: &str, + csv_dir: &Path, + output: &Path, + version: u32, + sources: &GenerateSources, +) -> Result<()> { log::info!( - "Generating base SVD for {chip} (version {version}) using config {}", - chip_config_dir(chip).display() + "Generating base SVD for {chip} (version {version}) using {} and {}", + sources.reg_base.display(), + sources.interrupts.display() ); - let fragment = load_fragment(chip, csv_dir)?; + let fragment = load_fragment(chip, csv_dir, sources)?; write_svd(output, &fragment, version) } -/// Reads all YAML config and CSV files and assembles one in-memory chip description. -fn load_fragment(chip: &str, csv_dir: &Path) -> Result { - let config_dir = chip_config_dir(chip); - let csv_map = load_regdesc_config(&config_dir.join("regdesc.yml"))?; - let (mut instances, interrupts) = load_metadata(&config_dir)?; - let descriptions = load_descriptions(&peripheral_descriptions_path())?; +fn load_fragment(chip: &str, csv_dir: &Path, sources: &GenerateSources) -> Result { + let mut instances = idf::load_reg_base_h(&sources.reg_base)?; + let interrupts = idf::load_interrupts_h(&sources.interrupts, chip)?; + log::info!( + "loaded {} interrupts from {}", + interrupts.len(), + sources.interrupts.display() + ); + + let mut csv_overrides = HashMap::new(); + for &(csv, peri) in idf::csv_type_overrides() { + csv_overrides.insert(csv.to_owned(), peri.to_owned()); + } + let descriptions = load_descriptions(&peripheral_descriptions_path())?; config::apply_instance_descriptions(&mut instances, &descriptions); - let mut csv_files: Vec<_> = csv_map.keys().cloned().collect(); - csv_files.sort(); + let required_types: HashSet<&str> = instances.iter().map(|i| i.peripheral.as_str()).collect(); + + let mut peripherals = Vec::new(); + for csv_path in discover_csv_files(csv_dir)? { + let csv_file = csv_path + .file_name() + .and_then(|n| n.to_str()) + .with_context(|| format!("invalid CSV path {}", csv_path.display()))? + .to_owned(); - let mut peripherals = Vec::with_capacity(csv_files.len()); - for csv_file in csv_files { - let options = &csv_map[&csv_file]; - let csv_path = csv_dir.join(&csv_file); let content = fs::read_to_string(&csv_path) .with_context(|| format!("reading CSV {}", csv_path.display()))?; - let mut peripheral = csv::read_peripheral_csv(&content, options.name.as_deref()) + let name_override = csv_overrides.get(&csv_file).map(String::as_str); + let probed = csv::probe_peripheral_name_from_content(&content)?; + + let peripheral_name = match name_override { + Some(name) => name, + None => match probed.as_deref() { + Some(name) if required_types.contains(name) => name, + _ => { + log::debug!("skipping {csv_file} (not referenced by peripheral instances)"); + continue; + } + }, + }; + + if !required_types.contains(peripheral_name) { + log::warn!( + "CSV {csv_file} maps to '{peripheral_name}' but no instance uses that type; skipping" + ); + continue; + } + + let mut peripheral = csv::read_peripheral_csv(&content, Some(peripheral_name)) .with_context(|| format!("parsing CSV {}", csv_path.display()))?; for err in peripheral.merge_registers_fields() { @@ -56,10 +107,25 @@ fn load_fragment(chip: &str, csv_dir: &Path) -> Result { peripherals.push(peripheral); } - Ok(config::build_fragment(chip, peripherals, instances, interrupts)) + for (csv_file, peri_type) in &csv_overrides { + if required_types.contains(peri_type.as_str()) + && !peripherals.iter().any(|p| p.name == *peri_type) + { + log::warn!( + "CSV override '{csv_file}' → '{peri_type}' was not found in {}", + csv_dir.display() + ); + } + } + + Ok(config::build_fragment( + chip, + peripherals, + instances, + interrupts, + )) } -/// Turns the chip model into XML and saves it (creates parent dirs if needed). fn write_svd(output: &Path, fragment: &RegdescFragment, version: u32) -> Result<()> { let xml = svd::write_svd(fragment, version); diff --git a/xtask/src/regdesc/model.rs b/xtask/src/regdesc/model.rs index 1b0f5befe3..3ab008d14a 100644 --- a/xtask/src/regdesc/model.rs +++ b/xtask/src/regdesc/model.rs @@ -98,7 +98,10 @@ impl Field { field.shift += repeat.stride * i; let mut expand_ctx = ctx.clone(); if self.repeat.is_some() && !expand_ctx.values.contains_key(&repeat.index_var) { - expand_ctx.insert(repeat.index_var.clone(), ExpandValue::Int(i as i32 + repeat.start)); + expand_ctx.insert( + repeat.index_var.clone(), + ExpandValue::Int(i as i32 + repeat.start), + ); } field.name = expand_ctx.replace(&field.name); field.description = expand_ctx.replace(&field.description); @@ -168,7 +171,10 @@ impl Register { reg.addr += repeat.stride * i; let mut expand_ctx = ctx.clone(); if self.repeat.is_some() && !expand_ctx.values.contains_key(&repeat.index_var) { - expand_ctx.insert(repeat.index_var.clone(), ExpandValue::Int(i as i32 + repeat.start)); + expand_ctx.insert( + repeat.index_var.clone(), + ExpandValue::Int(i as i32 + repeat.start), + ); } reg.name = expand_ctx.replace(®.name); reg.description = expand_ctx.replace(®.description); @@ -182,7 +188,10 @@ impl Register { let mut reg = self.clone(); if let Some(repeat) = &self.repeat { let mut ctx = ExpandContext::default(); - ctx.insert(repeat.index_var.clone(), ExpandValue::Str(sub_expr.to_owned())); + ctx.insert( + repeat.index_var.clone(), + ExpandValue::Str(sub_expr.to_owned()), + ); reg.expand_context = ctx.clone(); reg.name = ctx.replace(®.name); reg.description = ctx.replace(®.description); @@ -250,7 +259,10 @@ impl RegisterGroup { group.offset += repeat.stride * i; let mut expand_ctx = ctx.clone(); if self.repeat.is_some() && !expand_ctx.values.contains_key(&repeat.index_var) { - expand_ctx.insert(repeat.index_var.clone(), ExpandValue::Int(i as i32 + repeat.start)); + expand_ctx.insert( + repeat.index_var.clone(), + ExpandValue::Int(i as i32 + repeat.start), + ); } if let Some(name) = &group.name { group.name = Some(expand_ctx.replace(name)); @@ -302,10 +314,9 @@ pub struct PeripheralInstance { pub description: Option, } -#[derive(Debug, Clone)] +#[derive(Debug, Clone, PartialEq, Eq)] pub struct PeripheralInterrupt { pub name: String, - pub instance: String, pub value: u32, pub description: Option, } @@ -324,7 +335,8 @@ pub struct ChipInfo { } impl ChipInfo { - /// Builds chip metadata (CPU type, description, FPU, etc.) from `"esp32s31"`. + /// Builds chip metadata (CPU type, description, FPU, etc.) from + /// `"esp32s31"`. pub fn from_chip_id(chip: &str) -> Self { let formal = super::util::pretty_chip_name(chip); let description = match formal.as_str() { @@ -334,9 +346,7 @@ impl ChipInfo { "ESP32-C5" => { "32-bit RISC-V MCU & 2.4 and 5 GHz Wi-Fi 6 & Bluetooth 5 (LE) & IEEE 802.15.4" } - "ESP32-C6" => { - "32-bit RISC-V MCU & 2.4 GHz Wi-Fi 6 & Bluetooth 5 (LE) & IEEE 802.15.4" - } + "ESP32-C6" => "32-bit RISC-V MCU & 2.4 GHz Wi-Fi 6 & Bluetooth 5 (LE) & IEEE 802.15.4", "ESP32-C6-LP" => "32-bit RISC-V MCU", "ESP32-C61" => "32-bit RISC-V MCU & 2.4 GHz Wi-Fi 6 & Bluetooth 5 (LE)", "ESP32-H2" => "32-bit RISC-V MCU & Bluetooth 5 (LE) & IEEE 802.15.4", @@ -345,9 +355,7 @@ impl ChipInfo { "ESP32-S2-ULP" => "32-bit RISC-V MCU", "ESP32-S3" => "32-bit MCU & 2.4 GHz Wi-Fi & Bluetooth 5 (LE)", "ESP32-S3-ULP" => "32-bit RISC-V MCU", - "ESP32-S31" => { - "32-bit RISC-V MCU & 2.4 GHz Wi-Fi & Bluetooth 5 (LE) & IEEE 802.15.4" - } + "ESP32-S31" => "32-bit RISC-V MCU & 2.4 GHz Wi-Fi & Bluetooth 5 (LE) & IEEE 802.15.4", _ => "No Chip Description", } .to_owned(); diff --git a/xtask/src/regdesc/svd.rs b/xtask/src/regdesc/svd.rs index eb166d5c1e..e5681a2e4d 100644 --- a/xtask/src/regdesc/svd.rs +++ b/xtask/src/regdesc/svd.rs @@ -1,16 +1,21 @@ -use std::fmt::Write as _; -use std::sync::LazyLock; +use std::{fmt::Write as _, sync::LazyLock}; use regex::Regex; -use super::model::{ - ChipInfo, Peripheral, PeripheralInstance, PeripheralInterrupt, Register, RegdescFragment, - Repeat, +use super::{ + model::{ + ChipInfo, + Peripheral, + PeripheralInstance, + PeripheralInterrupt, + RegdescFragment, + Register, + Repeat, + }, + util::{guess_field_access, simplify_name}, }; -use super::util::{guess_field_access, simplify_name}; -static FIELD_DESC_INDEX: LazyLock = - LazyLock::new(|| Regex::new(r"(?i)\$[a-z]").unwrap()); +static FIELD_DESC_INDEX: LazyLock = LazyLock::new(|| Regex::new(r"(?i)\$[a-z]").unwrap()); /// Turns a chip model into a full SVD XML string. pub fn write_svd(fragment: &RegdescFragment, version: u32) -> String { @@ -35,7 +40,11 @@ pub fn write_svd(fragment: &RegdescFragment, version: u32) -> String { /// Writes vendor, chip name, version, description, and the license block. fn write_device_preamble(out: &mut String, chip: &ChipInfo, version: u32) { let year = time_year(); - writeln!(out, " ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.").unwrap(); + writeln!( + out, + " ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD." + ) + .unwrap(); writeln!(out, " ESPRESSIF").unwrap(); writeln!(out, " {}", xml_escape(&chip.name)).unwrap(); writeln!(out, " {}", xml_escape(chip.series())).unwrap(); @@ -65,11 +74,7 @@ fn write_device_preamble(out: &mut String, chip: &ChipInfo, version: u32) { .unwrap(); writeln!(out, " You may obtain a copy of the License at").unwrap(); writeln!(out).unwrap(); - writeln!( - out, - " http://www.apache.org/licenses/LICENSE-2.0" - ) - .unwrap(); + writeln!(out, " http://www.apache.org/licenses/LICENSE-2.0").unwrap(); writeln!(out).unwrap(); writeln!( out, @@ -101,18 +106,8 @@ fn write_cpu(out: &mut String, chip: &ChipInfo) { writeln!(out, " {}", chip.cpu_name).unwrap(); writeln!(out, " {}", chip.cpu_revision).unwrap(); writeln!(out, " {}", chip.cpu_endian).unwrap(); - writeln!( - out, - " {}", - chip.mpu_present - ) - .unwrap(); - writeln!( - out, - " {}", - chip.fpu_present - ) - .unwrap(); + writeln!(out, " {}", chip.mpu_present).unwrap(); + writeln!(out, " {}", chip.fpu_present).unwrap(); writeln!( out, " {}", @@ -149,7 +144,10 @@ fn write_peripherals(out: &mut String, fragment: &RegdescFragment) { .collect(); if instances.is_empty() { - log::warn!("no instances found for peripheral '{}', skipping", peripheral.name); + log::warn!( + "no instances found for peripheral '{}', skipping", + peripheral.name + ); continue; } @@ -164,7 +162,8 @@ fn write_peripherals(out: &mut String, fragment: &RegdescFragment) { writeln!(out, " ").unwrap(); } -/// Writes extra instances as `derivedFrom` stubs (same layout, different base addr). +/// Writes extra instances as `derivedFrom` stubs (same layout, different base +/// addr). fn write_derived_peripheral( out: &mut String, fragment: &RegdescFragment, @@ -192,15 +191,7 @@ fn write_derived_peripheral( .unwrap(); } - let interrupts: Vec<_> = fragment - .peripheral_interrupts - .iter() - .filter(|i| i.instance == instance.name) - .collect(); - for interrupt in interrupts { - write_interrupt(out, interrupt); - } - + // Interrupts are emitted once on the IRQ host peripheral only. writeln!(out, " ").unwrap(); } } @@ -240,19 +231,41 @@ fn write_peripheral( write_address_block(out, peripheral); - let interrupts: Vec<_> = fragment - .peripheral_interrupts - .iter() - .filter(|i| i.instance == instance.name) - .collect(); - for interrupt in interrupts { - write_interrupt(out, interrupt); + if is_interrupt_host(fragment, &instance.name) { + write_instance_interrupts(out, fragment); } write_registers(out, peripheral); writeln!(out, " ").unwrap(); } +/// CMSIS-SVD requires interrupts under some ``; we park the flat +/// list on `INTERRUPT_CORE0` (or the first instance if that is missing). +fn interrupt_host_name(fragment: &RegdescFragment) -> Option<&str> { + let names: Vec<&str> = fragment + .peripheral_instances + .iter() + .map(|i| i.name.as_str()) + .collect(); + if names.iter().any(|&n| n == "INTERRUPT_CORE0") { + Some("INTERRUPT_CORE0") + } else { + names.first().copied() + } +} + +fn is_interrupt_host(fragment: &RegdescFragment, instance_name: &str) -> bool { + interrupt_host_name(fragment) == Some(instance_name) +} + +fn write_instance_interrupts(out: &mut String, fragment: &RegdescFragment) { + let mut interrupts = fragment.peripheral_interrupts.clone(); + interrupts.sort_by_key(|i| i.value); + for interrupt in &interrupts { + write_interrupt(out, interrupt); + } +} + /// Writes the `` size summary. fn write_address_block(out: &mut String, peripheral: &Peripheral) { let size: u32 = peripheral.sorted_registers().iter().map(|r| r.size).sum(); @@ -330,12 +343,7 @@ fn write_register(out: &mut String, peripheral: &Peripheral, register: &Register } } } - writeln!( - out, - " {}", - xml_escape(®ister.name) - ) - .unwrap(); + writeln!(out, " {}", xml_escape(®ister.name)).unwrap(); writeln!( out, " {}", @@ -373,7 +381,11 @@ fn write_fields(out: &mut String, peripheral: &Peripheral, register: &Register) } if field.name.contains("%s") { - field.name = field.name.replace("%s", "").trim_end_matches('_').to_owned(); + field.name = field + .name + .replace("%s", "") + .trim_end_matches('_') + .to_owned(); } let mut description = field.description.clone(); @@ -402,11 +414,19 @@ fn write_fields(out: &mut String, peripheral: &Peripheral, register: &Register) ) .unwrap(); writeln!(out, " {}", field.shift).unwrap(); - writeln!(out, " {}", field.bit_width()).unwrap(); + writeln!( + out, + " {}", + field.bit_width() + ) + .unwrap(); if let Some(access) = guess_field_access(&field.access) { writeln!(out, " {access}").unwrap(); } else { - log::warn!("unrecognized field access value '{}', ignoring", field.access); + log::warn!( + "unrecognized field access value '{}', ignoring", + field.access + ); } writeln!(out, " ").unwrap(); } diff --git a/xtask/src/regdesc/util.rs b/xtask/src/regdesc/util.rs index 19c8781500..d993f30292 100644 --- a/xtask/src/regdesc/util.rs +++ b/xtask/src/regdesc/util.rs @@ -1,14 +1,13 @@ -use regex::Regex; use std::sync::LazyLock; +use regex::Regex; + static VERILOG_NUMBER: LazyLock = LazyLock::new(|| Regex::new(r"(\d+)'([hdb])([0-9a-fA-F]+)").unwrap()); static ACCESS_SUFFIX: LazyLock = LazyLock::new(|| Regex::new(r"(/?SC|/?SS|/?WTC|/?WTS)+$").unwrap()); -static REG_SUFFIX: LazyLock = - LazyLock::new(|| Regex::new(r"(?i)(_REG)+$").unwrap()); -static LP_GPIO: LazyLock = - LazyLock::new(|| Regex::new(r"(?i)^LP_GPIO[\d]*_").unwrap()); +static REG_SUFFIX: LazyLock = LazyLock::new(|| Regex::new(r"(?i)(_REG)+$").unwrap()); +static LP_GPIO: LazyLock = LazyLock::new(|| Regex::new(r"(?i)^LP_GPIO[\d]*_").unwrap()); /// Parses Verilog-style literals like `32'hDEAD` into (value, width, base). pub fn parse_verilog_number(s: &str) -> (u64, u32, u32) { @@ -27,7 +26,8 @@ pub fn parse_verilog_number(s: &str) -> (u64, u32, u32) { (value, width, base) } -/// Finds where two descriptions differ only by an index and replaces it with `$n`. +/// Finds where two descriptions differ only by an index and replaces it with +/// `$n`. pub fn remove_index_from_strings( a: &str, b: &str, @@ -120,11 +120,7 @@ pub fn simplify_name(prefix: &str, name: &str) -> String { name = REG_SUFFIX.replace(&name, "").into_owned(); - if name - .chars() - .next() - .is_some_and(|c| c.is_ascii_digit()) - { + if name.chars().next().is_some_and(|c| c.is_ascii_digit()) { name = format!("_{name}"); } @@ -166,50 +162,3 @@ pub fn pretty_chip_name(chip: &str) -> String { .trim_matches('-') .to_owned() } - -#[cfg(test)] -mod tests { - use super::*; - - #[test] - fn verilog_and_plain_defaults() { - assert_eq!(parse_verilog_number("32'hff"), (0xff, 32, 16)); - assert_eq!(parse_verilog_number("8'b1010"), (0b1010, 8, 2)); - assert_eq!(parse_verilog_number("42"), (42, 0, 10)); - assert_eq!(parse_verilog_number(""), (0, 0, 10)); - } - - #[test] - fn remove_index_basic_and_unequal_len() { - assert_eq!( - remove_index_from_strings("ch0 status", "ch1 status", 0, 1, "$n").unwrap(), - "ch$n status" - ); - assert!(remove_index_from_strings("short", "much longer text", 0, 1, "$n").is_err()); - assert!(remove_index_from_strings("much longer text", "short", 0, 1, "$n").is_err()); - } - - #[test] - fn simplify_name_strips_prefix_and_reg() { - assert_eq!(simplify_name("UART0", "UART0_STATUS_REG"), "STATUS"); - assert_eq!(simplify_name("UART0", "uart0_status_reg"), "status"); - assert_eq!(simplify_name("GPIO", "GPIO_1"), "_1"); - assert_eq!(simplify_name("SPI", "OTHER_REG"), "OTHER"); - } - - #[test] - fn access_mapping_and_suffix_strip() { - assert_eq!(guess_field_access("R/W"), Some("read-write")); - assert_eq!(guess_field_access("RO"), Some("read-only")); - assert_eq!(guess_field_access("WT"), Some("write-only")); - assert_eq!(guess_field_access("RW/SC"), Some("read-write")); - assert_eq!(guess_field_access("NOPE"), None); - } - - #[test] - fn pretty_chip_name_examples() { - assert_eq!(pretty_chip_name("esp32s31"), "ESP32-S31"); - assert_eq!(pretty_chip_name("esp32"), "ESP32"); - assert_eq!(pretty_chip_name("esp32h2"), "ESP32-H2"); - } -}