diff --git a/esp-hal/Cargo.toml b/esp-hal/Cargo.toml index 1eed6879771..5037e353b9f 100644 --- a/esp-hal/Cargo.toml +++ b/esp-hal/Cargo.toml @@ -25,6 +25,7 @@ check-configs = [ { features = ["unstable", "rt"], env = { ESP_HAL_CONFIG_PLACE_ANON_IN_RAM = "true", ESP_HAL_CONFIG_PLACE_RMT_DRIVER_IN_RAM = "true", ESP_HAL_CONFIG_PLACE_SPI_MASTER_DRIVER_IN_RAM = "true", ESP_HAL_CONFIG_CLEAR_CRYPTO_SECRETS = "false" } }, { features = ["unstable", "rt"], env = { ESP_HAL_CONFIG_ENABLE_PMP = "false" }, if = 'riscv && !esp32c2 && !esp32c3' }, { features = ["unstable", "rt"], env = { ESP_HAL_CONFIG_INIT_STACK_PTR_RANGE_CHECK = "false" } }, + { features = ["unstable", "rt"], env = { ESP_HAL_CONFIG_USE_XTAL32K = "true" }, if = 'soc_has_xtal32k_pads' }, { features = ["unstable", "rt", "__usb_otg"], if = 'usb_otg_driver_supported' }, { features = ["unstable", "rt", "__bluetooth"], if = 'bt_driver_supported' }, { features = ["unstable", "rt", "__sdmmc"], if = 'sdmmc_driver_supported' }, diff --git a/esp-hal/esp_config.yml b/esp-hal/esp_config.yml index cd395f3af57..7b5940808d5 100644 --- a/esp-hal/esp_config.yml +++ b/esp-hal/esp_config.yml @@ -217,6 +217,16 @@ options: default: - value: true + - name: use-xtal32k + description: "Enable the external 32 kHz crystal (XTAL32K). When enabled, LP/RTC slow clock + defaults to the crystal, XTAL32K is powered at init, and the dedicated crystal + GPIO pins are removed from `Peripherals`. Do not use those pads for GPIO, ADC, LP, + or any other function (including via `steal` / `AnyPin`) while the crystal is active. + When disabled (default), XTAL32K stays off so those pins can be used as hi-Z GPIO." + default: + - value: false + active: "soc_has_xtal32k_pads" + - name: enable-pmp description: "Protects additional memory regions via Physical Memory Protection (PMP). (Only RISC-V other than ESP32-C2/C3)" default: diff --git a/esp-hal/src/peripherals/mod.rs b/esp-hal/src/peripherals/mod.rs index 68bfedc5dce..7de3366d0ab 100644 --- a/esp-hal/src/peripherals/mod.rs +++ b/esp-hal/src/peripherals/mod.rs @@ -184,7 +184,7 @@ for_each_peripheral! { }; // Define the Peripherals struct - (singletons $( ($name:ident $(($unstable:ident))?) ),*) => { + (singletons $( ( $(#[$cfg:meta])* $name:ident $(($unstable:ident))?) ),*) => { // We need a way to ignore the "unstable" marker, but macros can't generate attributes or struct fields. // The solution is printing an empty doc comment. macro_rules! ignore { ($any:tt) => {""} } @@ -217,6 +217,7 @@ for_each_peripheral! { // #[cfg(not(feature = "unstable"))] // pub(crate) PERI: PERI<'static>, // ``` + $(#[$cfg])* #[doc = concat!("The ", stringify!($name), " peripheral.")] $( #[doc = "**This API is marked as unstable** and is only available when the `unstable` @@ -229,7 +230,7 @@ for_each_peripheral! { pub $name: $name<'static>, $( - #[doc = concat!("The ", stringify!($unstable_name), " peripheral.")] + #[doc = concat!("The ", stringify!($name), " peripheral.")] #[doc = "**This API is marked as unstable** and is only available when the `unstable` crate feature is enabled. This comes with no stability guarantees, and could be changed or removed at any time."] @@ -268,6 +269,7 @@ for_each_peripheral! { unsafe { Self { $( + $(#[$cfg])* $name: $name::steal(), )* } diff --git a/esp-hal/src/rtc_cntl/mod.rs b/esp-hal/src/rtc_cntl/mod.rs index 4c0bbdd44d4..d6d43191e6c 100644 --- a/esp-hal/src/rtc_cntl/mod.rs +++ b/esp-hal/src/rtc_cntl/mod.rs @@ -137,6 +137,9 @@ pub mod sleep; #[cfg_attr(esp32s31, path = "rtc/esp32s31.rs")] pub(crate) mod rtc; +#[cfg(soc_has_xtal32k_pads)] +pub(crate) mod xtal32k; + cfg_select! { esp32s31 => { use crate::peripherals::{LP_SYS as LP_AON, LP_WDT}; diff --git a/esp-hal/src/rtc_cntl/rtc/esp32c5.rs b/esp-hal/src/rtc_cntl/rtc/esp32c5.rs index 40612d1498a..b44d9fe9362 100644 --- a/esp-hal/src/rtc_cntl/rtc/esp32c5.rs +++ b/esp-hal/src/rtc_cntl/rtc/esp32c5.rs @@ -2,6 +2,7 @@ use strum::FromRepr; use crate::{ peripherals::{LP_CLKRST, MODEM_LPCON, MODEM_SYSCON, PCR, PMU}, + rtc_cntl::xtal32k, soc::{ clocks::{ClockConfig, LpSlowClkConfig}, regi2c, @@ -900,7 +901,7 @@ impl LpSystemInit { dig_power.set_mem_dslp(false); let mut clk_power = LpClkPower::default(); - clk_power.set_xpd_xtal32k(true); + clk_power.set_xpd_xtal32k(xtal32k::use_xtal32k()); // ESP32-C5 disables RC32K in LP active by default. clk_power.set_xpd_rc32k(false); clk_power.set_xpd_fosc(true); diff --git a/esp-hal/src/rtc_cntl/rtc/esp32c6.rs b/esp-hal/src/rtc_cntl/rtc/esp32c6.rs index 136eb72efc1..87fe69ddf1e 100644 --- a/esp-hal/src/rtc_cntl/rtc/esp32c6.rs +++ b/esp-hal/src/rtc_cntl/rtc/esp32c6.rs @@ -3,6 +3,7 @@ use strum::FromRepr; use crate::{ clock::ClockConfig, peripherals::{LP_CLKRST, MODEM_LPCON, MODEM_SYSCON, PCR, PMU}, + rtc_cntl::xtal32k, soc::{clocks::LpSlowClkConfig, regi2c}, }; @@ -894,7 +895,7 @@ impl LpSystemInit { dig_power.set_mem_dslp(false); let mut clk_power = LpClkPower::default(); - clk_power.set_xpd_xtal32k(true); + clk_power.set_xpd_xtal32k(xtal32k::use_xtal32k()); clk_power.set_xpd_rc32k(true); clk_power.set_xpd_fosc(true); diff --git a/esp-hal/src/rtc_cntl/rtc/esp32c61.rs b/esp-hal/src/rtc_cntl/rtc/esp32c61.rs index d6d9f6579a1..b9ffc0d4576 100644 --- a/esp-hal/src/rtc_cntl/rtc/esp32c61.rs +++ b/esp-hal/src/rtc_cntl/rtc/esp32c61.rs @@ -2,6 +2,7 @@ use strum::FromRepr; use crate::{ peripherals::{LP_CLKRST, MODEM_LPCON, MODEM_SYSCON, PCR, PMU}, + rtc_cntl::xtal32k, soc::{ clocks::{ClockConfig, LpSlowClkConfig}, regi2c, @@ -900,7 +901,7 @@ impl LpSystemInit { dig_power.set_mem_dslp(false); let mut clk_power = LpClkPower::default(); - clk_power.set_xpd_xtal32k(true); + clk_power.set_xpd_xtal32k(xtal32k::use_xtal32k()); // ESP32-C61 disables RC32K in LP active by default. clk_power.set_xpd_rc32k(false); clk_power.set_xpd_fosc(true); diff --git a/esp-hal/src/rtc_cntl/sleep/esp32c5.rs b/esp-hal/src/rtc_cntl/sleep/esp32c5.rs index 94378d0a374..40d05fc91b6 100644 --- a/esp-hal/src/rtc_cntl/sleep/esp32c5.rs +++ b/esp-hal/src/rtc_cntl/sleep/esp32c5.rs @@ -7,6 +7,7 @@ use crate::{ Rtc, rtc::{HpAnalog, HpSysCntlReg, HpSysPower, LpAnalog, LpSysPower}, sleep::{Ext1WakeupSource, WakeTriggers, pmu_common::SleepTimeConfig}, + xtal32k, }, soc::clocks::{self, ClockTree, HpRootClkConfig, LpSlowClkConfig}, }; @@ -234,7 +235,9 @@ impl PowerSleepConfig { self.hp_sys.xtal.set_xpd_xtal(pd_flags.pd_xtal().not()); - self.lp_sys_active.clk_power.set_xpd_xtal32k(true); + self.lp_sys_active + .clk_power + .set_xpd_xtal32k(xtal32k::use_xtal32k()); self.lp_sys_active.clk_power.set_xpd_rc32k(true); self.lp_sys_active.clk_power.set_xpd_fosc(true); diff --git a/esp-hal/src/rtc_cntl/sleep/esp32c6.rs b/esp-hal/src/rtc_cntl/sleep/esp32c6.rs index c18f54a036f..53e27e2b12b 100644 --- a/esp-hal/src/rtc_cntl/sleep/esp32c6.rs +++ b/esp-hal/src/rtc_cntl/sleep/esp32c6.rs @@ -7,6 +7,7 @@ use crate::{ Rtc, rtc::{HpAnalog, HpSysCntlReg, HpSysPower, LpAnalog, LpSysPower}, sleep::{Ext1WakeupSource, WakeTriggers, pmu_common::SleepTimeConfig}, + xtal32k, }, soc::clocks::{self, ClockTree, LpSlowClkConfig, SocRootClkConfig}, }; @@ -248,7 +249,9 @@ impl PowerSleepConfig { self.hp_sys.xtal.set_xpd_xtal(pd_flags.pd_xtal().not()); - self.lp_sys_active.clk_power.set_xpd_xtal32k(true); + self.lp_sys_active + .clk_power + .set_xpd_xtal32k(xtal32k::use_xtal32k()); self.lp_sys_active.clk_power.set_xpd_rc32k(true); self.lp_sys_active.clk_power.set_xpd_fosc(true); diff --git a/esp-hal/src/rtc_cntl/sleep/esp32c61.rs b/esp-hal/src/rtc_cntl/sleep/esp32c61.rs index 26c700dedfb..c1838a30391 100644 --- a/esp-hal/src/rtc_cntl/sleep/esp32c61.rs +++ b/esp-hal/src/rtc_cntl/sleep/esp32c61.rs @@ -7,6 +7,7 @@ use crate::{ Rtc, rtc::{HpAnalog, HpSysCntlReg, HpSysPower, LpAnalog, LpSysPower}, sleep::{Ext1WakeupSource, WakeTriggers, pmu_common::SleepTimeConfig}, + xtal32k, }, soc::clocks::{self, ClockTree, HpRootClkConfig, LpSlowClkConfig}, }; @@ -236,7 +237,9 @@ impl PowerSleepConfig { self.hp_sys.xtal.set_xpd_xtal(pd_flags.pd_xtal().not()); - self.lp_sys_active.clk_power.set_xpd_xtal32k(true); + self.lp_sys_active + .clk_power + .set_xpd_xtal32k(xtal32k::use_xtal32k()); self.lp_sys_active.clk_power.set_xpd_rc32k(true); self.lp_sys_active.clk_power.set_xpd_fosc(true); diff --git a/esp-hal/src/rtc_cntl/sleep/esp32h2.rs b/esp-hal/src/rtc_cntl/sleep/esp32h2.rs index 2008bfc8c04..85dc9cd3602 100644 --- a/esp-hal/src/rtc_cntl/sleep/esp32h2.rs +++ b/esp-hal/src/rtc_cntl/sleep/esp32h2.rs @@ -7,6 +7,7 @@ use crate::{ Rtc, rtc::{HpSysCntlReg, HpSysPower, LpSysPower}, sleep::{Ext1WakeupSource, WakeTriggers, pmu_common::SleepTimeConfig}, + xtal32k, }, soc::clocks::{self, ClockTree, CpuClkConfig, HpRootClkConfig, LpSlowClkConfig}, }; @@ -138,7 +139,9 @@ impl PowerSleepConfig { self.hp_sys.xtal.set_xpd_xtal(pd_flags.pd_xtal().not()); - self.lp_sys_active.clk_power.set_xpd_xtal32k(true); + self.lp_sys_active + .clk_power + .set_xpd_xtal32k(xtal32k::use_xtal32k()); self.lp_sys_active.clk_power.set_xpd_fosc(true); self.lp_sys_sleep.dig_power.set_mem_dslp(true); diff --git a/esp-hal/src/rtc_cntl/xtal32k.rs b/esp-hal/src/rtc_cntl/xtal32k.rs new file mode 100644 index 00000000000..3d348aac07e --- /dev/null +++ b/esp-hal/src/rtc_cntl/xtal32k.rs @@ -0,0 +1,31 @@ +//! Build-time configuration of the external 32 kHz crystal (XTAL32K). +//! +//! The crystal is kept powered down unless `ESP_HAL_CONFIG_USE_XTAL32K` is set. Powering it up +//! drives the dedicated crystal pads, which stops those pins from reaching a true high-impedance +//! state when an application uses them as GPIO. + +/// Whether esp-hal should power and use the external 32 kHz crystal. +#[inline(always)] +pub(crate) const fn use_xtal32k() -> bool { + cfg!(use_xtal32k) +} + +/// The LP slow clock source to select by default. +#[cfg(soc_has_clock_node_lp_slow_clk)] +pub(crate) const fn default_lp_slow_clk() -> crate::soc::clocks::LpSlowClkConfig { + if use_xtal32k() { + crate::soc::clocks::LpSlowClkConfig::Xtal32k + } else { + crate::soc::clocks::LpSlowClkConfig::RcSlow + } +} + +/// The RTC slow clock source to select by default. +#[cfg(soc_has_clock_node_rtc_slow_clk)] +pub(crate) const fn default_rtc_slow_clk() -> crate::soc::clocks::RtcSlowClkConfig { + if use_xtal32k() { + crate::soc::clocks::RtcSlowClkConfig::Xtal32k + } else { + crate::soc::clocks::RtcSlowClkConfig::RcSlow + } +} diff --git a/esp-hal/src/soc/esp32/clocks.rs b/esp-hal/src/soc/esp32/clocks.rs index 83186a2e3e4..7638f069f2f 100644 --- a/esp-hal/src/soc/esp32/clocks.rs +++ b/esp-hal/src/soc/esp32/clocks.rs @@ -21,7 +21,7 @@ use crate::{ clock::RtcClock, efuse::VOL_LEVEL_HP_INV, peripherals::{APB_CTRL, LPWR, RMT, RTC_IO, SYSTEM, TIMG0}, - rtc_cntl::Rtc, + rtc_cntl::{Rtc, xtal32k}, soc::regi2c, time::Rate, }; @@ -56,7 +56,7 @@ impl CpuClock { cpu_pll_div: Some(CpuPllDivConfig::new(CpuPllDivDivisor::_4)), syscon_pre_div: None, cpu_clk: Some(CpuClkConfig::Pll), - rtc_slow_clk: Some(RtcSlowClkConfig::RcSlow), + rtc_slow_clk: Some(xtal32k::default_rtc_slow_clk()), rtc_fast_clk: Some(RtcFastClkConfig::Rc), timg_calibration_clock: None, }; @@ -67,7 +67,7 @@ impl CpuClock { cpu_pll_div: Some(CpuPllDivConfig::new(CpuPllDivDivisor::_2)), syscon_pre_div: None, cpu_clk: Some(CpuClkConfig::Pll), - rtc_slow_clk: Some(RtcSlowClkConfig::RcSlow), + rtc_slow_clk: Some(xtal32k::default_rtc_slow_clk()), rtc_fast_clk: Some(RtcFastClkConfig::Rc), timg_calibration_clock: None, }; @@ -78,7 +78,7 @@ impl CpuClock { cpu_pll_div: Some(CpuPllDivConfig::new(CpuPllDivDivisor::_2)), syscon_pre_div: None, cpu_clk: Some(CpuClkConfig::Pll), - rtc_slow_clk: Some(RtcSlowClkConfig::RcSlow), + rtc_slow_clk: Some(xtal32k::default_rtc_slow_clk()), rtc_fast_clk: Some(RtcFastClkConfig::Rc), timg_calibration_clock: None, }; diff --git a/esp-hal/src/soc/esp32c5/clocks.rs b/esp-hal/src/soc/esp32c5/clocks.rs index f4f55c5d17c..cfe8a0cea65 100644 --- a/esp-hal/src/soc/esp32c5/clocks.rs +++ b/esp-hal/src/soc/esp32c5/clocks.rs @@ -17,6 +17,7 @@ use crate::{ peripherals::{I2C_ANA_MST, LP_CLKRST, PCR, PMU}, + rtc_cntl::xtal32k, soc::regi2c, }; @@ -50,7 +51,7 @@ impl CpuClock { ahb_clk: Some(AhbClkConfig::new(3)), // 40MHz - cannot exceed XTAL_CLK apb_clk: Some(ApbClkConfig::new(0)), lp_fast_clk: Some(LpFastClkConfig::RcFast), - lp_slow_clk: Some(LpSlowClkConfig::RcSlow), + lp_slow_clk: Some(xtal32k::default_lp_slow_clk()), crypto_clk: Some(CryptoClkConfig::PllF480m), timg_calibration_clock: None, }; @@ -61,7 +62,7 @@ impl CpuClock { ahb_clk: Some(AhbClkConfig::new(3)), // 40MHz - cannot exceed XTAL_CLK apb_clk: Some(ApbClkConfig::new(0)), lp_fast_clk: Some(LpFastClkConfig::RcFast), - lp_slow_clk: Some(LpSlowClkConfig::RcSlow), + lp_slow_clk: Some(xtal32k::default_lp_slow_clk()), crypto_clk: Some(CryptoClkConfig::PllF480m), timg_calibration_clock: None, }; @@ -72,7 +73,7 @@ impl CpuClock { ahb_clk: Some(AhbClkConfig::new(5)), // 40MHz - cannot exceed XTAL_CLK apb_clk: Some(ApbClkConfig::new(0)), lp_fast_clk: Some(LpFastClkConfig::RcFast), - lp_slow_clk: Some(LpSlowClkConfig::RcSlow), + lp_slow_clk: Some(xtal32k::default_lp_slow_clk()), crypto_clk: Some(CryptoClkConfig::PllF480m), timg_calibration_clock: None, }; diff --git a/esp-hal/src/soc/esp32c6/clocks.rs b/esp-hal/src/soc/esp32c6/clocks.rs index 1f33725324b..dca4f65c171 100644 --- a/esp-hal/src/soc/esp32c6/clocks.rs +++ b/esp-hal/src/soc/esp32c6/clocks.rs @@ -18,6 +18,7 @@ use crate::{ peripherals::{I2C_ANA_MST, LP_CLKRST, PCR, PMU, TIMG0}, + rtc_cntl::xtal32k, soc::regi2c, }; @@ -54,7 +55,7 @@ impl CpuClock { apb_clk: Some(ApbClkConfig::new(ApbClkDivisor::_0)), ledc_sclk: Some(LedcSclkConfig::PllF80m), lp_fast_clk: Some(LpFastClkConfig::RcFastClk), - lp_slow_clk: Some(LpSlowClkConfig::RcSlow), + lp_slow_clk: Some(xtal32k::default_lp_slow_clk()), timg_calibration_clock: None, }; const PRESET_160: ClockConfig = ClockConfig { @@ -70,7 +71,7 @@ impl CpuClock { apb_clk: Some(ApbClkConfig::new(ApbClkDivisor::_0)), ledc_sclk: Some(LedcSclkConfig::PllF80m), lp_fast_clk: Some(LpFastClkConfig::RcFastClk), - lp_slow_clk: Some(LpSlowClkConfig::RcSlow), + lp_slow_clk: Some(xtal32k::default_lp_slow_clk()), timg_calibration_clock: None, }; } diff --git a/esp-hal/src/soc/esp32c61/clocks.rs b/esp-hal/src/soc/esp32c61/clocks.rs index 55c532b8dea..fbe5da9a4ea 100644 --- a/esp-hal/src/soc/esp32c61/clocks.rs +++ b/esp-hal/src/soc/esp32c61/clocks.rs @@ -15,6 +15,7 @@ use crate::{ peripherals::{I2C_ANA_MST, LP_CLKRST, PCR, PMU}, + rtc_cntl::xtal32k, soc::regi2c, }; @@ -45,7 +46,7 @@ impl CpuClock { ahb_clk: Some(AhbClkConfig::new(3)), apb_clk: Some(ApbClkConfig::new(0)), lp_fast_clk: Some(LpFastClkConfig::RcFast), - lp_slow_clk: Some(LpSlowClkConfig::RcSlow), + lp_slow_clk: Some(xtal32k::default_lp_slow_clk()), timg_calibration_clock: None, }; const PRESET_160: ClockConfig = ClockConfig { @@ -55,7 +56,7 @@ impl CpuClock { ahb_clk: Some(AhbClkConfig::new(3)), apb_clk: Some(ApbClkConfig::new(0)), lp_fast_clk: Some(LpFastClkConfig::RcFast), - lp_slow_clk: Some(LpSlowClkConfig::RcSlow), + lp_slow_clk: Some(xtal32k::default_lp_slow_clk()), timg_calibration_clock: None, }; } diff --git a/esp-hal/src/soc/esp32h2/clocks.rs b/esp-hal/src/soc/esp32h2/clocks.rs index f8f093d6a00..34f7591cadf 100644 --- a/esp-hal/src/soc/esp32h2/clocks.rs +++ b/esp-hal/src/soc/esp32h2/clocks.rs @@ -16,6 +16,7 @@ use crate::{ peripherals::{I2C_ANA_MST, LP_CLKRST, PCR, PMU, TIMG0}, + rtc_cntl::xtal32k, soc::regi2c, }; @@ -43,7 +44,7 @@ impl CpuClock { ahb_clk: Some(AhbClkConfig::new(0)), apb_clk: Some(ApbClkConfig::new(0)), lp_fast_clk: Some(LpFastClkConfig::RcFastClk), - lp_slow_clk: Some(LpSlowClkConfig::RcSlow), + lp_slow_clk: Some(xtal32k::default_lp_slow_clk()), timg_calibration_clock: None, }; } diff --git a/esp-hal/src/soc/esp32s2/clocks.rs b/esp-hal/src/soc/esp32s2/clocks.rs index 774f077c87e..2ff114178af 100644 --- a/esp-hal/src/soc/esp32s2/clocks.rs +++ b/esp-hal/src/soc/esp32s2/clocks.rs @@ -19,6 +19,7 @@ use esp_rom_sys::rom::{ets_delay_us, ets_update_cpu_frequency_rom}; use crate::{ peripherals::{I2C_ANA_MST, LPWR, RMT, SYSCON, SYSTEM, TIMG0, TIMG1}, + rtc_cntl::xtal32k, soc::regi2c, time::Rate, }; @@ -54,7 +55,7 @@ impl CpuClock { cpu_pll_div: Some(CpuPllDivConfig::new(CpuPllDivDivisor::_6)), system_pre_div: None, cpu_clk: Some(CpuClkConfig::Pll), - rtc_slow_clk: Some(RtcSlowClkConfig::RcSlow), + rtc_slow_clk: Some(xtal32k::default_rtc_slow_clk()), rtc_fast_clk: Some(RtcFastClkConfig::Rc), timg_calibration_clock: None, }; @@ -65,7 +66,7 @@ impl CpuClock { cpu_pll_div: Some(CpuPllDivConfig::new(CpuPllDivDivisor::_3)), system_pre_div: None, cpu_clk: Some(CpuClkConfig::Pll), - rtc_slow_clk: Some(RtcSlowClkConfig::RcSlow), + rtc_slow_clk: Some(xtal32k::default_rtc_slow_clk()), rtc_fast_clk: Some(RtcFastClkConfig::Rc), timg_calibration_clock: None, }; @@ -76,7 +77,7 @@ impl CpuClock { cpu_pll_div: Some(CpuPllDivConfig::new(CpuPllDivDivisor::_2)), system_pre_div: None, cpu_clk: Some(CpuClkConfig::Pll), - rtc_slow_clk: Some(RtcSlowClkConfig::RcSlow), + rtc_slow_clk: Some(xtal32k::default_rtc_slow_clk()), rtc_fast_clk: Some(RtcFastClkConfig::Rc), timg_calibration_clock: None, }; diff --git a/esp-hal/src/soc/esp32s3/clocks.rs b/esp-hal/src/soc/esp32s3/clocks.rs index 408e70015e7..c904e3094aa 100644 --- a/esp-hal/src/soc/esp32s3/clocks.rs +++ b/esp-hal/src/soc/esp32s3/clocks.rs @@ -18,6 +18,7 @@ use esp_rom_sys::rom::{ets_delay_us, ets_update_cpu_frequency_rom}; use crate::{ peripherals::{I2C_ANA_MST, LCD_CAM, LPWR, RMT, SYSTEM, TIMG0, TIMG1}, + rtc_cntl::xtal32k, soc::regi2c, time::Rate, }; @@ -54,7 +55,7 @@ impl CpuClock { cpu_pll_div_out: Some(CpuPllDivOutConfig::_80), cpu_clk: Some(CpuClkConfig::Pll), rc_fast_clk_div_n: Some(RcFastClkDivNConfig::new(0)), - rtc_slow_clk: Some(RtcSlowClkConfig::RcSlow), + rtc_slow_clk: Some(xtal32k::default_rtc_slow_clk()), rtc_fast_clk: Some(RtcFastClkConfig::Rc), low_power_clk: Some(LowPowerClkConfig::RtcSlow), timg_calibration_clock: None, @@ -66,7 +67,7 @@ impl CpuClock { cpu_pll_div_out: Some(CpuPllDivOutConfig::_160), cpu_clk: Some(CpuClkConfig::Pll), rc_fast_clk_div_n: Some(RcFastClkDivNConfig::new(0)), - rtc_slow_clk: Some(RtcSlowClkConfig::RcSlow), + rtc_slow_clk: Some(xtal32k::default_rtc_slow_clk()), rtc_fast_clk: Some(RtcFastClkConfig::Rc), low_power_clk: Some(LowPowerClkConfig::RtcSlow), timg_calibration_clock: None, @@ -78,7 +79,7 @@ impl CpuClock { cpu_pll_div_out: Some(CpuPllDivOutConfig::_240), cpu_clk: Some(CpuClkConfig::Pll), rc_fast_clk_div_n: Some(RcFastClkDivNConfig::new(0)), - rtc_slow_clk: Some(RtcSlowClkConfig::RcSlow), + rtc_slow_clk: Some(xtal32k::default_rtc_slow_clk()), rtc_fast_clk: Some(RtcFastClkConfig::Rc), low_power_clk: Some(LowPowerClkConfig::RtcSlow), timg_calibration_clock: None, diff --git a/esp-hal/src/soc/esp32s31/clocks.rs b/esp-hal/src/soc/esp32s31/clocks.rs index 2b00ae85889..925276242cf 100644 --- a/esp-hal/src/soc/esp32s31/clocks.rs +++ b/esp-hal/src/soc/esp32s31/clocks.rs @@ -15,6 +15,7 @@ use esp_rom_sys::rom::ets_update_cpu_frequency_rom; use crate::{ pac::HP_ALIVE_SYS, peripherals::{HP_SYS_CLKRST, LP_AON_CLK_RST, PMU}, + rtc_cntl::xtal32k, }; define_clock_tree_types!(); @@ -51,7 +52,7 @@ impl CpuClock { ahb_clk: Some(AhbClkConfig::new(1)), apb_clk: Some(ApbClkConfig::new(1)), lp_fast_clk: Some(LpFastClkConfig::RcFast), - lp_slow_clk: Some(LpSlowClkConfig::RcSlow), + lp_slow_clk: Some(xtal32k::default_lp_slow_clk()), timg_calibration_clock: None, }; const PRESET_240: ClockConfig = ClockConfig { @@ -62,7 +63,7 @@ impl CpuClock { ahb_clk: Some(AhbClkConfig::new(2)), apb_clk: Some(ApbClkConfig::new(1)), lp_fast_clk: Some(LpFastClkConfig::RcFast), - lp_slow_clk: Some(LpSlowClkConfig::RcSlow), + lp_slow_clk: Some(xtal32k::default_lp_slow_clk()), timg_calibration_clock: None, }; const PRESET_320: ClockConfig = ClockConfig { @@ -73,7 +74,7 @@ impl CpuClock { ahb_clk: Some(AhbClkConfig::new(2)), apb_clk: Some(ApbClkConfig::new(1)), lp_fast_clk: Some(LpFastClkConfig::RcFast), - lp_slow_clk: Some(LpSlowClkConfig::RcSlow), + lp_slow_clk: Some(xtal32k::default_lp_slow_clk()), timg_calibration_clock: None, }; } diff --git a/esp-metadata-generated/src/_build_script_utils.rs b/esp-metadata-generated/src/_build_script_utils.rs index 247cd02e268..89b948ac99c 100644 --- a/esp-metadata-generated/src/_build_script_utils.rs +++ b/esp-metadata-generated/src/_build_script_utils.rs @@ -337,6 +337,7 @@ impl Chip { "gpio_constant_1_input=\"56\"", "gpio_remap_iomux_pin_registers", "gpio_func_in_sel_offset=\"0\"", + "soc_has_xtal32k_pads", "gpio_has_bank_1", "gpio_input_signal_max=\"206\"", "gpio_output_signal_max=\"256\"", @@ -577,6 +578,7 @@ impl Chip { "cargo:rustc-cfg=gpio_constant_1_input=\"56\"", "cargo:rustc-cfg=gpio_remap_iomux_pin_registers", "cargo:rustc-cfg=gpio_func_in_sel_offset=\"0\"", + "cargo:rustc-cfg=soc_has_xtal32k_pads", "cargo:rustc-cfg=gpio_has_bank_1", "cargo:rustc-cfg=gpio_input_signal_max=\"206\"", "cargo:rustc-cfg=gpio_output_signal_max=\"256\"", @@ -2134,6 +2136,7 @@ impl Chip { "gpio_constant_0_input=\"96\"", "gpio_constant_1_input=\"64\"", "gpio_func_in_sel_offset=\"0\"", + "soc_has_xtal32k_pads", "gpio_input_signal_max=\"116\"", "gpio_output_signal_max=\"256\"", "i2c_master_version=\"3\"", @@ -2427,6 +2430,7 @@ impl Chip { "cargo:rustc-cfg=gpio_constant_0_input=\"96\"", "cargo:rustc-cfg=gpio_constant_1_input=\"64\"", "cargo:rustc-cfg=gpio_func_in_sel_offset=\"0\"", + "cargo:rustc-cfg=soc_has_xtal32k_pads", "cargo:rustc-cfg=gpio_input_signal_max=\"116\"", "cargo:rustc-cfg=gpio_output_signal_max=\"256\"", "cargo:rustc-cfg=i2c_master_version=\"3\"", @@ -2880,6 +2884,7 @@ impl Chip { "gpio_constant_0_input=\"60\"", "gpio_constant_1_input=\"56\"", "gpio_func_in_sel_offset=\"0\"", + "soc_has_xtal32k_pads", "gpio_input_signal_max=\"124\"", "gpio_output_signal_max=\"128\"", "i2c_master_version=\"3\"", @@ -3190,6 +3195,7 @@ impl Chip { "cargo:rustc-cfg=gpio_constant_0_input=\"60\"", "cargo:rustc-cfg=gpio_constant_1_input=\"56\"", "cargo:rustc-cfg=gpio_func_in_sel_offset=\"0\"", + "cargo:rustc-cfg=soc_has_xtal32k_pads", "cargo:rustc-cfg=gpio_input_signal_max=\"124\"", "cargo:rustc-cfg=gpio_output_signal_max=\"128\"", "cargo:rustc-cfg=i2c_master_version=\"3\"", @@ -3609,6 +3615,7 @@ impl Chip { "gpio_constant_0_input=\"96\"", "gpio_constant_1_input=\"64\"", "gpio_func_in_sel_offset=\"0\"", + "soc_has_xtal32k_pads", "gpio_input_signal_max=\"100\"", "gpio_output_signal_max=\"256\"", "i2c_master_version=\"3\"", @@ -3843,6 +3850,7 @@ impl Chip { "cargo:rustc-cfg=gpio_constant_0_input=\"96\"", "cargo:rustc-cfg=gpio_constant_1_input=\"64\"", "cargo:rustc-cfg=gpio_func_in_sel_offset=\"0\"", + "cargo:rustc-cfg=soc_has_xtal32k_pads", "cargo:rustc-cfg=gpio_input_signal_max=\"100\"", "cargo:rustc-cfg=gpio_output_signal_max=\"256\"", "cargo:rustc-cfg=i2c_master_version=\"3\"", @@ -4267,6 +4275,7 @@ impl Chip { "gpio_constant_0_input=\"60\"", "gpio_constant_1_input=\"56\"", "gpio_func_in_sel_offset=\"0\"", + "soc_has_xtal32k_pads", "gpio_input_signal_max=\"124\"", "gpio_output_signal_max=\"128\"", "i2c_master_version=\"3\"", @@ -4546,6 +4555,7 @@ impl Chip { "cargo:rustc-cfg=gpio_constant_0_input=\"60\"", "cargo:rustc-cfg=gpio_constant_1_input=\"56\"", "cargo:rustc-cfg=gpio_func_in_sel_offset=\"0\"", + "cargo:rustc-cfg=soc_has_xtal32k_pads", "cargo:rustc-cfg=gpio_input_signal_max=\"124\"", "cargo:rustc-cfg=gpio_output_signal_max=\"128\"", "cargo:rustc-cfg=i2c_master_version=\"3\"", @@ -5719,6 +5729,7 @@ impl Chip { "gpio_constant_0_input=\"60\"", "gpio_constant_1_input=\"56\"", "gpio_func_in_sel_offset=\"0\"", + "soc_has_xtal32k_pads", "gpio_has_bank_1", "gpio_input_signal_max=\"242\"", "gpio_output_signal_max=\"256\"", @@ -5969,6 +5980,7 @@ impl Chip { "cargo:rustc-cfg=gpio_constant_0_input=\"60\"", "cargo:rustc-cfg=gpio_constant_1_input=\"56\"", "cargo:rustc-cfg=gpio_func_in_sel_offset=\"0\"", + "cargo:rustc-cfg=soc_has_xtal32k_pads", "cargo:rustc-cfg=gpio_has_bank_1", "cargo:rustc-cfg=gpio_input_signal_max=\"242\"", "cargo:rustc-cfg=gpio_output_signal_max=\"256\"", @@ -6454,6 +6466,7 @@ impl Chip { "gpio_constant_0_input=\"60\"", "gpio_constant_1_input=\"56\"", "gpio_func_in_sel_offset=\"0\"", + "soc_has_xtal32k_pads", "gpio_has_bank_1", "gpio_input_signal_max=\"255\"", "gpio_output_signal_max=\"256\"", @@ -6756,6 +6769,7 @@ impl Chip { "cargo:rustc-cfg=gpio_constant_0_input=\"60\"", "cargo:rustc-cfg=gpio_constant_1_input=\"56\"", "cargo:rustc-cfg=gpio_func_in_sel_offset=\"0\"", + "cargo:rustc-cfg=soc_has_xtal32k_pads", "cargo:rustc-cfg=gpio_has_bank_1", "cargo:rustc-cfg=gpio_input_signal_max=\"255\"", "cargo:rustc-cfg=gpio_output_signal_max=\"256\"", @@ -7221,6 +7235,7 @@ impl Chip { "gpio_constant_0_input=\"192\"", "gpio_constant_1_input=\"128\"", "gpio_func_in_sel_offset=\"0\"", + "soc_has_xtal32k_pads", "gpio_has_bank_1", "gpio_input_signal_max=\"255\"", "gpio_output_signal_max=\"256\"", @@ -7423,6 +7438,7 @@ impl Chip { "cargo:rustc-cfg=gpio_constant_0_input=\"192\"", "cargo:rustc-cfg=gpio_constant_1_input=\"128\"", "cargo:rustc-cfg=gpio_func_in_sel_offset=\"0\"", + "cargo:rustc-cfg=soc_has_xtal32k_pads", "cargo:rustc-cfg=gpio_has_bank_1", "cargo:rustc-cfg=gpio_input_signal_max=\"255\"", "cargo:rustc-cfg=gpio_output_signal_max=\"256\"", @@ -7909,6 +7925,7 @@ impl Chip { "spi_slave_supports_dma", "i2s_supports_dma", "gpio_remap_iomux_pin_registers", + "soc_has_xtal32k_pads", "gpio_has_bank_1", "i2c_master_separate_filter_config_registers", "i2c_master_i2c0_data_register_ahb_address_is_set", diff --git a/esp-metadata-generated/src/_generated_esp32.rs b/esp-metadata-generated/src/_generated_esp32.rs index 07fa67b2742..5b4dd011e4c 100644 --- a/esp-metadata-generated/src/_generated_esp32.rs +++ b/esp-metadata-generated/src/_generated_esp32.rs @@ -4547,7 +4547,8 @@ macro_rules! for_each_peripheral { _for_each_inner_peripheral!((GPIO21)); _for_each_inner_peripheral!((GPIO22)); _for_each_inner_peripheral!((GPIO23)); _for_each_inner_peripheral!((GPIO25)); _for_each_inner_peripheral!((GPIO26)); _for_each_inner_peripheral!((GPIO27)); - _for_each_inner_peripheral!((GPIO32)); _for_each_inner_peripheral!((GPIO33)); + _for_each_inner_peripheral!((#[cfg(not(use_xtal32k))] GPIO32)); + _for_each_inner_peripheral!((#[cfg(not(use_xtal32k))] GPIO33)); _for_each_inner_peripheral!((GPIO34)); _for_each_inner_peripheral!((GPIO35)); _for_each_inner_peripheral!((GPIO36)); _for_each_inner_peripheral!((GPIO37)); _for_each_inner_peripheral!((GPIO38)); _for_each_inner_peripheral!((GPIO39)); @@ -4865,26 +4866,26 @@ macro_rules! for_each_peripheral { _for_each_inner_peripheral!((singletons(GPIO0), (GPIO1), (GPIO2), (GPIO3), (GPIO4), (GPIO5), (GPIO6), (GPIO7), (GPIO8), (GPIO9), (GPIO10), (GPIO11), (GPIO12), (GPIO13), (GPIO14), (GPIO15), (GPIO16), (GPIO17), (GPIO18), (GPIO19), - (GPIO20), (GPIO21), (GPIO22), (GPIO23), (GPIO25), (GPIO26), (GPIO27), (GPIO32), - (GPIO33), (GPIO34), (GPIO35), (GPIO36), (GPIO37), (GPIO38), (GPIO39), - (DMA_SPI2(unstable)), (DMA_SPI3(unstable)), (DMA_I2S0(unstable)), - (DMA_I2S1(unstable)), (AES(unstable)), (APB_CTRL(unstable)), (BB(unstable)), - (DPORT(unstable)), (SYSTEM(unstable)), (ETH(unstable)), - (FLASH_ENCRYPTION(unstable)), (FRC_TIMER(unstable)), (GPIO(unstable)), - (GPIO_SD(unstable)), (HINF(unstable)), (I2C0), (I2C1), (I2S0(unstable)), - (I2S1(unstable)), (IO_MUX(unstable)), (LEDC(unstable)), (MCPWM0(unstable)), - (MCPWM1(unstable)), (NRX(unstable)), (PCNT(unstable)), (RMT(unstable)), - (RNG(unstable)), (RSA(unstable)), (LPWR(unstable)), (RTC_TIMER(unstable)), - (LP_I2C0(unstable)), (RTC_IO(unstable)), (SDHOST(unstable)), (SENS(unstable)), - (SHA(unstable)), (SLC(unstable)), (SLCHOST(unstable)), (SPI0(unstable)), - (SPI1(unstable)), (SPI2), (SPI3), (TIMG0(unstable)), (TIMG1(unstable)), - (TWAI0(unstable)), (UART0), (UART1), (UART2), (UHCI0(unstable)), - (UHCI1(unstable)), (WIFI), (ADC1(unstable)), (ADC2(unstable)), (BT(unstable)), - (CPU_CTRL(unstable)), (DAC1(unstable)), (DAC2(unstable)), (FLASH(unstable)), - (PSRAM(unstable)), (SW_INTERRUPT(unstable)), (TOUCH(unstable)))); - _for_each_inner_peripheral!((dma_eligible(SPI2, Spi2, 0, SpiDmaChannel), (I2S0, - I2s0, 0, I2sDmaChannel), (SPI3, Spi3, 1, SpiDmaChannel), (I2S1, I2s1, 1, - I2sDmaChannel))); + (GPIO20), (GPIO21), (GPIO22), (GPIO23), (GPIO25), (GPIO26), (GPIO27), + (#[cfg(not(use_xtal32k))] GPIO32), (#[cfg(not(use_xtal32k))] GPIO33), (GPIO34), + (GPIO35), (GPIO36), (GPIO37), (GPIO38), (GPIO39), (DMA_SPI2(unstable)), + (DMA_SPI3(unstable)), (DMA_I2S0(unstable)), (DMA_I2S1(unstable)), + (AES(unstable)), (APB_CTRL(unstable)), (BB(unstable)), (DPORT(unstable)), + (SYSTEM(unstable)), (ETH(unstable)), (FLASH_ENCRYPTION(unstable)), + (FRC_TIMER(unstable)), (GPIO(unstable)), (GPIO_SD(unstable)), (HINF(unstable)), + (I2C0), (I2C1), (I2S0(unstable)), (I2S1(unstable)), (IO_MUX(unstable)), + (LEDC(unstable)), (MCPWM0(unstable)), (MCPWM1(unstable)), (NRX(unstable)), + (PCNT(unstable)), (RMT(unstable)), (RNG(unstable)), (RSA(unstable)), + (LPWR(unstable)), (RTC_TIMER(unstable)), (LP_I2C0(unstable)), (RTC_IO(unstable)), + (SDHOST(unstable)), (SENS(unstable)), (SHA(unstable)), (SLC(unstable)), + (SLCHOST(unstable)), (SPI0(unstable)), (SPI1(unstable)), (SPI2), (SPI3), + (TIMG0(unstable)), (TIMG1(unstable)), (TWAI0(unstable)), (UART0), (UART1), + (UART2), (UHCI0(unstable)), (UHCI1(unstable)), (WIFI), (ADC1(unstable)), + (ADC2(unstable)), (BT(unstable)), (CPU_CTRL(unstable)), (DAC1(unstable)), + (DAC2(unstable)), (FLASH(unstable)), (PSRAM(unstable)), (SW_INTERRUPT(unstable)), + (TOUCH(unstable)))); _for_each_inner_peripheral!((dma_eligible(SPI2, Spi2, 0, + SpiDmaChannel), (I2S0, I2s0, 0, I2sDmaChannel), (SPI3, Spi3, 1, SpiDmaChannel), + (I2S1, I2s1, 1, I2sDmaChannel))); }; } /// This macro can be used to generate code for each `GPIOn` instance. diff --git a/esp-metadata-generated/src/_generated_esp32c5.rs b/esp-metadata-generated/src/_generated_esp32c5.rs index 8d32707ae2c..b28c2480bd1 100644 --- a/esp-metadata-generated/src/_generated_esp32c5.rs +++ b/esp-metadata-generated/src/_generated_esp32c5.rs @@ -4700,7 +4700,8 @@ macro_rules! for_each_peripheral { disable_mac_interrupt }, WIFI_PWR : { bind_pwr_interrupt, enable_pwr_interrupt, disable_pwr_interrupt }))); _for_each_inner_peripheral!((@ peri_type #[doc = "PSRAM peripheral singleton"] PSRAM <= virtual() (unstable))); - _for_each_inner_peripheral!((GPIO0)); _for_each_inner_peripheral!((GPIO1)); + _for_each_inner_peripheral!((#[cfg(not(use_xtal32k))] GPIO0)); + _for_each_inner_peripheral!((#[cfg(not(use_xtal32k))] GPIO1)); _for_each_inner_peripheral!((GPIO2)); _for_each_inner_peripheral!((GPIO3)); _for_each_inner_peripheral!((GPIO4)); _for_each_inner_peripheral!((GPIO5)); _for_each_inner_peripheral!((GPIO6)); _for_each_inner_peripheral!((GPIO7)); @@ -5055,22 +5056,23 @@ macro_rules! for_each_peripheral { enable_mac_interrupt, disable_mac_interrupt }, WIFI_PWR : { bind_pwr_interrupt, enable_pwr_interrupt, disable_pwr_interrupt })), (@ peri_type #[doc = "PSRAM peripheral singleton"] PSRAM <= virtual() (unstable)))); - _for_each_inner_peripheral!((singletons(GPIO0), (GPIO1), (GPIO2), (GPIO3), - (GPIO4), (GPIO5), (GPIO6), (GPIO7), (GPIO8), (GPIO9), (GPIO10), (GPIO11), - (GPIO12), (GPIO13), (GPIO14), (GPIO15), (GPIO16), (GPIO17), (GPIO18), (GPIO19), - (GPIO20), (GPIO21), (GPIO22), (GPIO23), (GPIO24), (GPIO25), (GPIO26), (GPIO27), - (GPIO28), (DMA_CH0(unstable)), (DMA_CH1(unstable)), (DMA_CH2(unstable)), - (AES(unstable)), (ASSIST_DEBUG(unstable)), (APB_SARADC(unstable)), - (CACHE(unstable)), (CLINT(unstable)), (DMA(unstable)), (DS(unstable)), - (ECC(unstable)), (ECDSA(unstable)), (ETM(unstable)), (GPIO(unstable)), - (GPIO_SD(unstable)), (HMAC(unstable)), (HP_APM(unstable)), (HP_SYS(unstable)), - (HUK(unstable)), (I2C_ANA_MST(unstable)), (I2C0), (I2S0(unstable)), - (IEEE802154(unstable)), (INTERRUPT_CORE0(unstable)), (INTPRI(unstable)), - (IO_MUX(unstable)), (KEYMNG(unstable)), (LP_ANA(unstable)), (LP_AON(unstable)), - (LP_APM0(unstable)), (LP_CLKRST(unstable)), (LP_GPIO(unstable)), - (LP_I2C0(unstable)), (LP_I2C_ANA_MST(unstable)), (LP_IO_MUX(unstable)), - (LP_PERI(unstable)), (LP_TEE(unstable)), (RTC_TIMER(unstable)), - (LP_UART(unstable)), (LP_WDT(unstable)), (LPWR(unstable)), (MCPWM0(unstable)), + _for_each_inner_peripheral!((singletons(#[cfg(not(use_xtal32k))] GPIO0), + (#[cfg(not(use_xtal32k))] GPIO1), (GPIO2), (GPIO3), (GPIO4), (GPIO5), (GPIO6), + (GPIO7), (GPIO8), (GPIO9), (GPIO10), (GPIO11), (GPIO12), (GPIO13), (GPIO14), + (GPIO15), (GPIO16), (GPIO17), (GPIO18), (GPIO19), (GPIO20), (GPIO21), (GPIO22), + (GPIO23), (GPIO24), (GPIO25), (GPIO26), (GPIO27), (GPIO28), (DMA_CH0(unstable)), + (DMA_CH1(unstable)), (DMA_CH2(unstable)), (AES(unstable)), + (ASSIST_DEBUG(unstable)), (APB_SARADC(unstable)), (CACHE(unstable)), + (CLINT(unstable)), (DMA(unstable)), (DS(unstable)), (ECC(unstable)), + (ECDSA(unstable)), (ETM(unstable)), (GPIO(unstable)), (GPIO_SD(unstable)), + (HMAC(unstable)), (HP_APM(unstable)), (HP_SYS(unstable)), (HUK(unstable)), + (I2C_ANA_MST(unstable)), (I2C0), (I2S0(unstable)), (IEEE802154(unstable)), + (INTERRUPT_CORE0(unstable)), (INTPRI(unstable)), (IO_MUX(unstable)), + (KEYMNG(unstable)), (LP_ANA(unstable)), (LP_AON(unstable)), (LP_APM0(unstable)), + (LP_CLKRST(unstable)), (LP_GPIO(unstable)), (LP_I2C0(unstable)), + (LP_I2C_ANA_MST(unstable)), (LP_IO_MUX(unstable)), (LP_PERI(unstable)), + (LP_TEE(unstable)), (RTC_TIMER(unstable)), (LP_UART(unstable)), + (LP_WDT(unstable)), (LPWR(unstable)), (MCPWM0(unstable)), (MEM_MONITOR(unstable)), (MODEM_LPCON(unstable)), (MODEM_SYSCON(unstable)), (PARL_IO(unstable)), (PAU(unstable)), (PCNT(unstable)), (PCR(unstable)), (PMU(unstable)), (PVT_MONITOR(unstable)), (RMT(unstable)), (RNG(unstable)), diff --git a/esp-metadata-generated/src/_generated_esp32c6.rs b/esp-metadata-generated/src/_generated_esp32c6.rs index f849c379e18..73e47a5e61e 100644 --- a/esp-metadata-generated/src/_generated_esp32c6.rs +++ b/esp-metadata-generated/src/_generated_esp32c6.rs @@ -5613,7 +5613,8 @@ macro_rules! for_each_peripheral { bind_modem_peri_timeout_interrupt, enable_modem_peri_timeout_interrupt, disable_modem_peri_timeout_interrupt }, WIFI_PWR : { bind_pwr_interrupt, enable_pwr_interrupt, disable_pwr_interrupt }))); - _for_each_inner_peripheral!((GPIO0)); _for_each_inner_peripheral!((GPIO1)); + _for_each_inner_peripheral!((#[cfg(not(use_xtal32k))] GPIO0)); + _for_each_inner_peripheral!((#[cfg(not(use_xtal32k))] GPIO1)); _for_each_inner_peripheral!((GPIO2)); _for_each_inner_peripheral!((GPIO3)); _for_each_inner_peripheral!((GPIO4)); _for_each_inner_peripheral!((GPIO5)); _for_each_inner_peripheral!((GPIO6)); _for_each_inner_peripheral!((GPIO7)); @@ -5955,36 +5956,37 @@ macro_rules! for_each_peripheral { bind_modem_peri_timeout_interrupt, enable_modem_peri_timeout_interrupt, disable_modem_peri_timeout_interrupt }, WIFI_PWR : { bind_pwr_interrupt, enable_pwr_interrupt, disable_pwr_interrupt })))); - _for_each_inner_peripheral!((singletons(GPIO0), (GPIO1), (GPIO2), (GPIO3), - (GPIO4), (GPIO5), (GPIO6), (GPIO7), (GPIO8), (GPIO9), (GPIO10), (GPIO11), - (GPIO12), (GPIO13), (GPIO14), (GPIO15), (GPIO16), (GPIO17), (GPIO18), (GPIO19), - (GPIO20), (GPIO21), (GPIO22), (GPIO23), (GPIO24), (GPIO25), (GPIO26), (GPIO27), - (GPIO28), (GPIO29), (GPIO30), (DMA_CH0(unstable)), (DMA_CH1(unstable)), - (DMA_CH2(unstable)), (AES(unstable)), (APB_SARADC(unstable)), - (ASSIST_DEBUG(unstable)), (ATOMIC(unstable)), (DMA(unstable)), (DS(unstable)), - (ECC(unstable)), (EXTMEM(unstable)), (GPIO(unstable)), (GPIO_SD(unstable)), - (HINF(unstable)), (HMAC(unstable)), (HP_APM(unstable)), (HP_SYS(unstable)), - (I2C_ANA_MST(unstable)), (I2C0), (I2S0(unstable)), (IEEE802154(unstable)), - (INTERRUPT_CORE0(unstable)), (INTPRI(unstable)), (IO_MUX(unstable)), - (LEDC(unstable)), (LP_ANA(unstable)), (LP_AON(unstable)), (LP_APM(unstable)), - (LP_APM0(unstable)), (LP_CLKRST(unstable)), (LP_I2C0(unstable)), - (LP_I2C_ANA_MST(unstable)), (LP_IO(unstable)), (LP_PERI(unstable)), - (LP_TEE(unstable)), (RTC_TIMER(unstable)), (LP_UART(unstable)), - (LP_WDT(unstable)), (LPWR(unstable)), (MCPWM0(unstable)), - (MEM_MONITOR(unstable)), (MODEM_LPCON(unstable)), (MODEM_SYSCON(unstable)), - (OTP_DEBUG(unstable)), (PARL_IO(unstable)), (PAU(unstable)), (PCNT(unstable)), - (PCR(unstable)), (PLIC_MX(unstable)), (PMU(unstable)), (RMT(unstable)), - (RNG(unstable)), (RSA(unstable)), (SHA(unstable)), (SLCHOST(unstable)), - (ETM(unstable)), (SPI0(unstable)), (SPI1(unstable)), (SPI2), (SYSTEM(unstable)), - (SYSTIMER(unstable)), (TEE(unstable)), (TIMG0(unstable)), (TIMG1(unstable)), - (TRACE0(unstable)), (TWAI0(unstable)), (TWAI1(unstable)), (UART0), (UART1), - (UHCI0(unstable)), (USB_DEVICE(unstable)), (ADC1(unstable)), (BT(unstable)), - (FLASH(unstable)), (GPIO_DEDICATED(unstable)), (LP_CORE(unstable)), - (SW_INTERRUPT(unstable)), (TSENS(unstable)), (WIFI))); - _for_each_inner_peripheral!((dma_eligible(SPI2, Spi2, 0, AhbGdmaChannel), (UHCI0, - Uhci0, 2, AhbGdmaChannel), (I2S0, I2s0, 3, AhbGdmaChannel), (AES, Aes, 6, - AhbGdmaChannel), (SHA, Sha, 7, AhbGdmaChannel), (APB_SARADC, ApbSaradc, 8, - AhbGdmaChannel), (PARL_IO, ParlIo, 9, AhbGdmaChannel))); + _for_each_inner_peripheral!((singletons(#[cfg(not(use_xtal32k))] GPIO0), + (#[cfg(not(use_xtal32k))] GPIO1), (GPIO2), (GPIO3), (GPIO4), (GPIO5), (GPIO6), + (GPIO7), (GPIO8), (GPIO9), (GPIO10), (GPIO11), (GPIO12), (GPIO13), (GPIO14), + (GPIO15), (GPIO16), (GPIO17), (GPIO18), (GPIO19), (GPIO20), (GPIO21), (GPIO22), + (GPIO23), (GPIO24), (GPIO25), (GPIO26), (GPIO27), (GPIO28), (GPIO29), (GPIO30), + (DMA_CH0(unstable)), (DMA_CH1(unstable)), (DMA_CH2(unstable)), (AES(unstable)), + (APB_SARADC(unstable)), (ASSIST_DEBUG(unstable)), (ATOMIC(unstable)), + (DMA(unstable)), (DS(unstable)), (ECC(unstable)), (EXTMEM(unstable)), + (GPIO(unstable)), (GPIO_SD(unstable)), (HINF(unstable)), (HMAC(unstable)), + (HP_APM(unstable)), (HP_SYS(unstable)), (I2C_ANA_MST(unstable)), (I2C0), + (I2S0(unstable)), (IEEE802154(unstable)), (INTERRUPT_CORE0(unstable)), + (INTPRI(unstable)), (IO_MUX(unstable)), (LEDC(unstable)), (LP_ANA(unstable)), + (LP_AON(unstable)), (LP_APM(unstable)), (LP_APM0(unstable)), + (LP_CLKRST(unstable)), (LP_I2C0(unstable)), (LP_I2C_ANA_MST(unstable)), + (LP_IO(unstable)), (LP_PERI(unstable)), (LP_TEE(unstable)), + (RTC_TIMER(unstable)), (LP_UART(unstable)), (LP_WDT(unstable)), (LPWR(unstable)), + (MCPWM0(unstable)), (MEM_MONITOR(unstable)), (MODEM_LPCON(unstable)), + (MODEM_SYSCON(unstable)), (OTP_DEBUG(unstable)), (PARL_IO(unstable)), + (PAU(unstable)), (PCNT(unstable)), (PCR(unstable)), (PLIC_MX(unstable)), + (PMU(unstable)), (RMT(unstable)), (RNG(unstable)), (RSA(unstable)), + (SHA(unstable)), (SLCHOST(unstable)), (ETM(unstable)), (SPI0(unstable)), + (SPI1(unstable)), (SPI2), (SYSTEM(unstable)), (SYSTIMER(unstable)), + (TEE(unstable)), (TIMG0(unstable)), (TIMG1(unstable)), (TRACE0(unstable)), + (TWAI0(unstable)), (TWAI1(unstable)), (UART0), (UART1), (UHCI0(unstable)), + (USB_DEVICE(unstable)), (ADC1(unstable)), (BT(unstable)), (FLASH(unstable)), + (GPIO_DEDICATED(unstable)), (LP_CORE(unstable)), (SW_INTERRUPT(unstable)), + (TSENS(unstable)), (WIFI))); _for_each_inner_peripheral!((dma_eligible(SPI2, + Spi2, 0, AhbGdmaChannel), (UHCI0, Uhci0, 2, AhbGdmaChannel), (I2S0, I2s0, 3, + AhbGdmaChannel), (AES, Aes, 6, AhbGdmaChannel), (SHA, Sha, 7, AhbGdmaChannel), + (APB_SARADC, ApbSaradc, 8, AhbGdmaChannel), (PARL_IO, ParlIo, 9, + AhbGdmaChannel))); }; } /// This macro can be used to generate code for each `GPIOn` instance. diff --git a/esp-metadata-generated/src/_generated_esp32c61.rs b/esp-metadata-generated/src/_generated_esp32c61.rs index 15563166908..3ee6b8a752d 100644 --- a/esp-metadata-generated/src/_generated_esp32c61.rs +++ b/esp-metadata-generated/src/_generated_esp32c61.rs @@ -3614,7 +3614,8 @@ macro_rules! for_each_peripheral { disable_mac_interrupt }, WIFI_PWR : { bind_pwr_interrupt, enable_pwr_interrupt, disable_pwr_interrupt }))); _for_each_inner_peripheral!((@ peri_type #[doc = "PSRAM peripheral singleton"] PSRAM <= virtual() (unstable))); - _for_each_inner_peripheral!((GPIO0)); _for_each_inner_peripheral!((GPIO1)); + _for_each_inner_peripheral!((#[cfg(not(use_xtal32k))] GPIO0)); + _for_each_inner_peripheral!((#[cfg(not(use_xtal32k))] GPIO1)); _for_each_inner_peripheral!((GPIO2)); _for_each_inner_peripheral!((GPIO3)); _for_each_inner_peripheral!((GPIO4)); _for_each_inner_peripheral!((GPIO5)); _for_each_inner_peripheral!((GPIO6)); _for_each_inner_peripheral!((GPIO7)); @@ -3911,14 +3912,15 @@ macro_rules! for_each_peripheral { enable_mac_interrupt, disable_mac_interrupt }, WIFI_PWR : { bind_pwr_interrupt, enable_pwr_interrupt, disable_pwr_interrupt })), (@ peri_type #[doc = "PSRAM peripheral singleton"] PSRAM <= virtual() (unstable)))); - _for_each_inner_peripheral!((singletons(GPIO0), (GPIO1), (GPIO2), (GPIO3), - (GPIO4), (GPIO5), (GPIO6), (GPIO7), (GPIO8), (GPIO9), (GPIO10), (GPIO11), - (GPIO12), (GPIO13), (GPIO14), (GPIO15), (GPIO16), (GPIO17), (GPIO18), (GPIO19), - (GPIO20), (GPIO21), (GPIO22), (GPIO23), (GPIO24), (GPIO25), (GPIO26), (GPIO27), - (GPIO28), (GPIO29), (DMA_CH0(unstable)), (DMA_CH1(unstable)), - (ASSIST_DEBUG(unstable)), (CLINT(unstable)), (CACHE(unstable)), (DMA(unstable)), - (ECC(unstable)), (ECDSA(unstable)), (EFUSE(unstable)), (ETM(unstable)), - (GPIO(unstable)), (GPIO_SD(unstable)), (HP_APM(unstable)), (HP_SYS(unstable)), + _for_each_inner_peripheral!((singletons(#[cfg(not(use_xtal32k))] GPIO0), + (#[cfg(not(use_xtal32k))] GPIO1), (GPIO2), (GPIO3), (GPIO4), (GPIO5), (GPIO6), + (GPIO7), (GPIO8), (GPIO9), (GPIO10), (GPIO11), (GPIO12), (GPIO13), (GPIO14), + (GPIO15), (GPIO16), (GPIO17), (GPIO18), (GPIO19), (GPIO20), (GPIO21), (GPIO22), + (GPIO23), (GPIO24), (GPIO25), (GPIO26), (GPIO27), (GPIO28), (GPIO29), + (DMA_CH0(unstable)), (DMA_CH1(unstable)), (ASSIST_DEBUG(unstable)), + (CLINT(unstable)), (CACHE(unstable)), (DMA(unstable)), (ECC(unstable)), + (ECDSA(unstable)), (EFUSE(unstable)), (ETM(unstable)), (GPIO(unstable)), + (GPIO_SD(unstable)), (HP_APM(unstable)), (HP_SYS(unstable)), (I2C_ANA_MST(unstable)), (I2C0), (I2S0(unstable)), (INTERRUPT_CORE0(unstable)), (INTPRI(unstable)), (IO_MUX(unstable)), (LP_ANA(unstable)), (LP_AON(unstable)), (LP_APM(unstable)), (LP_CLKRST(unstable)), (LPWR(unstable)), (LP_GPIO(unstable)), diff --git a/esp-metadata-generated/src/_generated_esp32h2.rs b/esp-metadata-generated/src/_generated_esp32h2.rs index c10039ca75a..02c669513fc 100644 --- a/esp-metadata-generated/src/_generated_esp32h2.rs +++ b/esp-metadata-generated/src/_generated_esp32h2.rs @@ -4486,11 +4486,12 @@ macro_rules! for_each_peripheral { _for_each_inner_peripheral!((GPIO6)); _for_each_inner_peripheral!((GPIO7)); _for_each_inner_peripheral!((GPIO8)); _for_each_inner_peripheral!((GPIO9)); _for_each_inner_peripheral!((GPIO10)); _for_each_inner_peripheral!((GPIO11)); - _for_each_inner_peripheral!((GPIO12)); _for_each_inner_peripheral!((GPIO13)); - _for_each_inner_peripheral!((GPIO14)); _for_each_inner_peripheral!((GPIO22)); - _for_each_inner_peripheral!((GPIO23)); _for_each_inner_peripheral!((GPIO24)); - _for_each_inner_peripheral!((GPIO25)); _for_each_inner_peripheral!((GPIO26)); - _for_each_inner_peripheral!((GPIO27)); + _for_each_inner_peripheral!((GPIO12)); + _for_each_inner_peripheral!((#[cfg(not(use_xtal32k))] GPIO13)); + _for_each_inner_peripheral!((#[cfg(not(use_xtal32k))] GPIO14)); + _for_each_inner_peripheral!((GPIO22)); _for_each_inner_peripheral!((GPIO23)); + _for_each_inner_peripheral!((GPIO24)); _for_each_inner_peripheral!((GPIO25)); + _for_each_inner_peripheral!((GPIO26)); _for_each_inner_peripheral!((GPIO27)); _for_each_inner_peripheral!((DMA_CH0(unstable))); _for_each_inner_peripheral!((DMA_CH1(unstable))); _for_each_inner_peripheral!((DMA_CH2(unstable))); @@ -4752,12 +4753,13 @@ macro_rules! for_each_peripheral { (@ peri_type #[doc = "SW_INTERRUPT peripheral singleton"] SW_INTERRUPT <= virtual() (unstable)))); _for_each_inner_peripheral!((singletons(GPIO0), (GPIO1), (GPIO2), (GPIO3), (GPIO4), (GPIO5), (GPIO6), (GPIO7), (GPIO8), (GPIO9), (GPIO10), - (GPIO11), (GPIO12), (GPIO13), (GPIO14), (GPIO22), (GPIO23), (GPIO24), (GPIO25), - (GPIO26), (GPIO27), (DMA_CH0(unstable)), (DMA_CH1(unstable)), - (DMA_CH2(unstable)), (AES(unstable)), (APB_SARADC(unstable)), - (ASSIST_DEBUG(unstable)), (DMA(unstable)), (DS(unstable)), (ECC(unstable)), - (GPIO(unstable)), (GPIO_SD(unstable)), (HMAC(unstable)), (HP_APM(unstable)), - (HP_SYS(unstable)), (I2C_ANA_MST(unstable)), (I2C0), (I2C1), (I2S0(unstable)), + (GPIO11), (GPIO12), (#[cfg(not(use_xtal32k))] GPIO13), (#[cfg(not(use_xtal32k))] + GPIO14), (GPIO22), (GPIO23), (GPIO24), (GPIO25), (GPIO26), (GPIO27), + (DMA_CH0(unstable)), (DMA_CH1(unstable)), (DMA_CH2(unstable)), (AES(unstable)), + (APB_SARADC(unstable)), (ASSIST_DEBUG(unstable)), (DMA(unstable)), + (DS(unstable)), (ECC(unstable)), (GPIO(unstable)), (GPIO_SD(unstable)), + (HMAC(unstable)), (HP_APM(unstable)), (HP_SYS(unstable)), + (I2C_ANA_MST(unstable)), (I2C0), (I2C1), (I2S0(unstable)), (IEEE802154(unstable)), (INTERRUPT_CORE0(unstable)), (INTPRI(unstable)), (IO_MUX(unstable)), (LEDC(unstable)), (LPWR(unstable)), (LP_ANA(unstable)), (LP_AON(unstable)), (LP_APM(unstable)), (LP_APM0(unstable)), diff --git a/esp-metadata-generated/src/_generated_esp32s2.rs b/esp-metadata-generated/src/_generated_esp32s2.rs index 34bafc00016..a6b30278e35 100644 --- a/esp-metadata-generated/src/_generated_esp32s2.rs +++ b/esp-metadata-generated/src/_generated_esp32s2.rs @@ -4649,21 +4649,22 @@ macro_rules! for_each_peripheral { _for_each_inner_peripheral!((GPIO8)); _for_each_inner_peripheral!((GPIO9)); _for_each_inner_peripheral!((GPIO10)); _for_each_inner_peripheral!((GPIO11)); _for_each_inner_peripheral!((GPIO12)); _for_each_inner_peripheral!((GPIO13)); - _for_each_inner_peripheral!((GPIO14)); _for_each_inner_peripheral!((GPIO15)); - _for_each_inner_peripheral!((GPIO16)); _for_each_inner_peripheral!((GPIO17)); - _for_each_inner_peripheral!((GPIO18)); _for_each_inner_peripheral!((GPIO19)); - _for_each_inner_peripheral!((GPIO20)); _for_each_inner_peripheral!((GPIO21)); - _for_each_inner_peripheral!((GPIO26)); _for_each_inner_peripheral!((GPIO27)); - _for_each_inner_peripheral!((GPIO28)); _for_each_inner_peripheral!((GPIO29)); - _for_each_inner_peripheral!((GPIO30)); _for_each_inner_peripheral!((GPIO31)); - _for_each_inner_peripheral!((GPIO32)); _for_each_inner_peripheral!((GPIO33)); - _for_each_inner_peripheral!((GPIO34)); _for_each_inner_peripheral!((GPIO35)); - _for_each_inner_peripheral!((GPIO36)); _for_each_inner_peripheral!((GPIO37)); - _for_each_inner_peripheral!((GPIO38)); _for_each_inner_peripheral!((GPIO39)); - _for_each_inner_peripheral!((GPIO40)); _for_each_inner_peripheral!((GPIO41)); - _for_each_inner_peripheral!((GPIO42)); _for_each_inner_peripheral!((GPIO43)); - _for_each_inner_peripheral!((GPIO44)); _for_each_inner_peripheral!((GPIO45)); - _for_each_inner_peripheral!((GPIO46)); + _for_each_inner_peripheral!((GPIO14)); + _for_each_inner_peripheral!((#[cfg(not(use_xtal32k))] GPIO15)); + _for_each_inner_peripheral!((#[cfg(not(use_xtal32k))] GPIO16)); + _for_each_inner_peripheral!((GPIO17)); _for_each_inner_peripheral!((GPIO18)); + _for_each_inner_peripheral!((GPIO19)); _for_each_inner_peripheral!((GPIO20)); + _for_each_inner_peripheral!((GPIO21)); _for_each_inner_peripheral!((GPIO26)); + _for_each_inner_peripheral!((GPIO27)); _for_each_inner_peripheral!((GPIO28)); + _for_each_inner_peripheral!((GPIO29)); _for_each_inner_peripheral!((GPIO30)); + _for_each_inner_peripheral!((GPIO31)); _for_each_inner_peripheral!((GPIO32)); + _for_each_inner_peripheral!((GPIO33)); _for_each_inner_peripheral!((GPIO34)); + _for_each_inner_peripheral!((GPIO35)); _for_each_inner_peripheral!((GPIO36)); + _for_each_inner_peripheral!((GPIO37)); _for_each_inner_peripheral!((GPIO38)); + _for_each_inner_peripheral!((GPIO39)); _for_each_inner_peripheral!((GPIO40)); + _for_each_inner_peripheral!((GPIO41)); _for_each_inner_peripheral!((GPIO42)); + _for_each_inner_peripheral!((GPIO43)); _for_each_inner_peripheral!((GPIO44)); + _for_each_inner_peripheral!((GPIO45)); _for_each_inner_peripheral!((GPIO46)); _for_each_inner_peripheral!((DMA_SPI2(unstable))); _for_each_inner_peripheral!((DMA_SPI3(unstable))); _for_each_inner_peripheral!((DMA_I2S0(unstable))); @@ -4975,24 +4976,25 @@ macro_rules! for_each_peripheral { "ULP_RISCV_CORE peripheral singleton"] ULP_RISCV_CORE <= virtual() (unstable)))); _for_each_inner_peripheral!((singletons(GPIO0), (GPIO1), (GPIO2), (GPIO3), (GPIO4), (GPIO5), (GPIO6), (GPIO7), (GPIO8), (GPIO9), (GPIO10), (GPIO11), - (GPIO12), (GPIO13), (GPIO14), (GPIO15), (GPIO16), (GPIO17), (GPIO18), (GPIO19), - (GPIO20), (GPIO21), (GPIO26), (GPIO27), (GPIO28), (GPIO29), (GPIO30), (GPIO31), - (GPIO32), (GPIO33), (GPIO34), (GPIO35), (GPIO36), (GPIO37), (GPIO38), (GPIO39), - (GPIO40), (GPIO41), (GPIO42), (GPIO43), (GPIO44), (GPIO45), (GPIO46), - (DMA_SPI2(unstable)), (DMA_SPI3(unstable)), (DMA_I2S0(unstable)), - (DMA_CRYPTO(unstable)), (DMA_COPY(unstable)), (AES(unstable)), - (APB_SARADC(unstable)), (DEDICATED_GPIO(unstable)), (DS(unstable)), - (EXTMEM(unstable)), (FE(unstable)), (FE2(unstable)), (GPIO(unstable)), - (GPIO_SD(unstable)), (HMAC(unstable)), (I2C_ANA_MST(unstable)), (I2C0), (I2C1), - (I2S0(unstable)), (INTERRUPT_CORE0(unstable)), (IO_MUX(unstable)), - (LEDC(unstable)), (NRX(unstable)), (PCNT(unstable)), (PMS(unstable)), - (RMT(unstable)), (RNG(unstable)), (RSA(unstable)), (LPWR(unstable)), - (RTC_TIMER(unstable)), (LP_I2C0(unstable)), (RTC_IO(unstable)), (SENS(unstable)), - (SHA(unstable)), (SPI0(unstable)), (SPI1(unstable)), (SPI2), (SPI3), - (SYSCON(unstable)), (SYSTEM(unstable)), (SYSTIMER(unstable)), (TIMG0(unstable)), - (TIMG1(unstable)), (TWAI0(unstable)), (UART0), (UART1), (UHCI0(unstable)), - (USB_FS(unstable)), (XTS_AES(unstable)), (WIFI), (ADC1(unstable)), - (ADC2(unstable)), (DAC1(unstable)), (DAC2(unstable)), (FLASH(unstable)), + (GPIO12), (GPIO13), (GPIO14), (#[cfg(not(use_xtal32k))] GPIO15), + (#[cfg(not(use_xtal32k))] GPIO16), (GPIO17), (GPIO18), (GPIO19), (GPIO20), + (GPIO21), (GPIO26), (GPIO27), (GPIO28), (GPIO29), (GPIO30), (GPIO31), (GPIO32), + (GPIO33), (GPIO34), (GPIO35), (GPIO36), (GPIO37), (GPIO38), (GPIO39), (GPIO40), + (GPIO41), (GPIO42), (GPIO43), (GPIO44), (GPIO45), (GPIO46), (DMA_SPI2(unstable)), + (DMA_SPI3(unstable)), (DMA_I2S0(unstable)), (DMA_CRYPTO(unstable)), + (DMA_COPY(unstable)), (AES(unstable)), (APB_SARADC(unstable)), + (DEDICATED_GPIO(unstable)), (DS(unstable)), (EXTMEM(unstable)), (FE(unstable)), + (FE2(unstable)), (GPIO(unstable)), (GPIO_SD(unstable)), (HMAC(unstable)), + (I2C_ANA_MST(unstable)), (I2C0), (I2C1), (I2S0(unstable)), + (INTERRUPT_CORE0(unstable)), (IO_MUX(unstable)), (LEDC(unstable)), + (NRX(unstable)), (PCNT(unstable)), (PMS(unstable)), (RMT(unstable)), + (RNG(unstable)), (RSA(unstable)), (LPWR(unstable)), (RTC_TIMER(unstable)), + (LP_I2C0(unstable)), (RTC_IO(unstable)), (SENS(unstable)), (SHA(unstable)), + (SPI0(unstable)), (SPI1(unstable)), (SPI2), (SPI3), (SYSCON(unstable)), + (SYSTEM(unstable)), (SYSTIMER(unstable)), (TIMG0(unstable)), (TIMG1(unstable)), + (TWAI0(unstable)), (UART0), (UART1), (UHCI0(unstable)), (USB_FS(unstable)), + (XTS_AES(unstable)), (WIFI), (ADC1(unstable)), (ADC2(unstable)), + (DAC1(unstable)), (DAC2(unstable)), (FLASH(unstable)), (GPIO_DEDICATED(unstable)), (PSRAM(unstable)), (SW_INTERRUPT(unstable)), (ULP_RISCV_CORE(unstable)))); _for_each_inner_peripheral!((dma_eligible(SPI2, Spi2, 0, SpiDmaChannel), (I2S0, I2s0, 0, I2sDmaChannel), (AES, Aes, 0, diff --git a/esp-metadata-generated/src/_generated_esp32s3.rs b/esp-metadata-generated/src/_generated_esp32s3.rs index 3428cba5139..35db638c1bb 100644 --- a/esp-metadata-generated/src/_generated_esp32s3.rs +++ b/esp-metadata-generated/src/_generated_esp32s3.rs @@ -5386,7 +5386,8 @@ macro_rules! for_each_peripheral { _for_each_inner_peripheral!((GPIO9)); _for_each_inner_peripheral!((GPIO10)); _for_each_inner_peripheral!((GPIO11)); _for_each_inner_peripheral!((GPIO12)); _for_each_inner_peripheral!((GPIO13)); _for_each_inner_peripheral!((GPIO14)); - _for_each_inner_peripheral!((GPIO15)); _for_each_inner_peripheral!((GPIO16)); + _for_each_inner_peripheral!((#[cfg(not(use_xtal32k))] GPIO15)); + _for_each_inner_peripheral!((#[cfg(not(use_xtal32k))] GPIO16)); _for_each_inner_peripheral!((GPIO17)); _for_each_inner_peripheral!((GPIO18)); _for_each_inner_peripheral!((GPIO19)); _for_each_inner_peripheral!((GPIO20)); _for_each_inner_peripheral!((GPIO21)); _for_each_inner_peripheral!((GPIO26)); @@ -5763,11 +5764,12 @@ macro_rules! for_each_peripheral { bind_pwr_interrupt, enable_pwr_interrupt, disable_pwr_interrupt })))); _for_each_inner_peripheral!((singletons(GPIO0), (GPIO1), (GPIO2), (GPIO3), (GPIO4), (GPIO5), (GPIO6), (GPIO7), (GPIO8), (GPIO9), (GPIO10), (GPIO11), - (GPIO12), (GPIO13), (GPIO14), (GPIO15), (GPIO16), (GPIO17), (GPIO18), (GPIO19), - (GPIO20), (GPIO21), (GPIO26), (GPIO27), (GPIO28), (GPIO29), (GPIO30), (GPIO31), - (GPIO32), (GPIO33), (GPIO34), (GPIO35), (GPIO36), (GPIO37), (GPIO38), (GPIO39), - (GPIO40), (GPIO41), (GPIO42), (GPIO43), (GPIO44), (GPIO45), (GPIO46), (GPIO47), - (GPIO48), (DMA_CH0(unstable)), (DMA_CH1(unstable)), (DMA_CH2(unstable)), + (GPIO12), (GPIO13), (GPIO14), (#[cfg(not(use_xtal32k))] GPIO15), + (#[cfg(not(use_xtal32k))] GPIO16), (GPIO17), (GPIO18), (GPIO19), (GPIO20), + (GPIO21), (GPIO26), (GPIO27), (GPIO28), (GPIO29), (GPIO30), (GPIO31), (GPIO32), + (GPIO33), (GPIO34), (GPIO35), (GPIO36), (GPIO37), (GPIO38), (GPIO39), (GPIO40), + (GPIO41), (GPIO42), (GPIO43), (GPIO44), (GPIO45), (GPIO46), (GPIO47), (GPIO48), + (DMA_CH0(unstable)), (DMA_CH1(unstable)), (DMA_CH2(unstable)), (DMA_CH3(unstable)), (DMA_CH4(unstable)), (AES(unstable)), (APB_CTRL(unstable)), (APB_SARADC(unstable)), (ASSIST_DEBUG(unstable)), (DMA(unstable)), (DS(unstable)), (EXTMEM(unstable)), (GPIO(unstable)), (GPIO_SD(unstable)), diff --git a/esp-metadata-generated/src/_generated_esp32s31.rs b/esp-metadata-generated/src/_generated_esp32s31.rs index 3039c56e74b..1d08113d108 100644 --- a/esp-metadata-generated/src/_generated_esp32s31.rs +++ b/esp-metadata-generated/src/_generated_esp32s31.rs @@ -3928,37 +3928,38 @@ macro_rules! for_each_peripheral { _for_each_inner_peripheral!((@ peri_type #[doc = "SW_INTERRUPT peripheral singleton"] SW_INTERRUPT <= virtual() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc = "CPU_CTRL peripheral singleton"] - CPU_CTRL <= virtual() (unstable))); _for_each_inner_peripheral!((GPIO0)); - _for_each_inner_peripheral!((GPIO1)); _for_each_inner_peripheral!((GPIO2)); - _for_each_inner_peripheral!((GPIO3)); _for_each_inner_peripheral!((GPIO4)); - _for_each_inner_peripheral!((GPIO5)); _for_each_inner_peripheral!((GPIO6)); - _for_each_inner_peripheral!((GPIO7)); _for_each_inner_peripheral!((GPIO8)); - _for_each_inner_peripheral!((GPIO9)); _for_each_inner_peripheral!((GPIO10)); - _for_each_inner_peripheral!((GPIO11)); _for_each_inner_peripheral!((GPIO12)); - _for_each_inner_peripheral!((GPIO13)); _for_each_inner_peripheral!((GPIO14)); - _for_each_inner_peripheral!((GPIO15)); _for_each_inner_peripheral!((GPIO16)); - _for_each_inner_peripheral!((GPIO17)); _for_each_inner_peripheral!((GPIO18)); - _for_each_inner_peripheral!((GPIO19)); _for_each_inner_peripheral!((GPIO20)); - _for_each_inner_peripheral!((GPIO21)); _for_each_inner_peripheral!((GPIO22)); - _for_each_inner_peripheral!((GPIO23)); _for_each_inner_peripheral!((GPIO24)); - _for_each_inner_peripheral!((GPIO25)); _for_each_inner_peripheral!((GPIO26)); - _for_each_inner_peripheral!((GPIO27)); _for_each_inner_peripheral!((GPIO28)); - _for_each_inner_peripheral!((GPIO30)); _for_each_inner_peripheral!((GPIO31)); - _for_each_inner_peripheral!((GPIO32)); _for_each_inner_peripheral!((GPIO33)); - _for_each_inner_peripheral!((GPIO34)); _for_each_inner_peripheral!((GPIO35)); - _for_each_inner_peripheral!((GPIO36)); _for_each_inner_peripheral!((GPIO37)); - _for_each_inner_peripheral!((GPIO38)); _for_each_inner_peripheral!((GPIO39)); - _for_each_inner_peripheral!((GPIO40)); _for_each_inner_peripheral!((GPIO42)); - _for_each_inner_peripheral!((GPIO43)); _for_each_inner_peripheral!((GPIO44)); - _for_each_inner_peripheral!((GPIO45)); _for_each_inner_peripheral!((GPIO46)); - _for_each_inner_peripheral!((GPIO47)); _for_each_inner_peripheral!((GPIO48)); - _for_each_inner_peripheral!((GPIO49)); _for_each_inner_peripheral!((GPIO50)); - _for_each_inner_peripheral!((GPIO51)); _for_each_inner_peripheral!((GPIO52)); - _for_each_inner_peripheral!((GPIO53)); _for_each_inner_peripheral!((GPIO54)); - _for_each_inner_peripheral!((GPIO55)); _for_each_inner_peripheral!((GPIO56)); - _for_each_inner_peripheral!((GPIO57)); _for_each_inner_peripheral!((GPIO58)); - _for_each_inner_peripheral!((GPIO59)); _for_each_inner_peripheral!((GPIO60)); - _for_each_inner_peripheral!((GPIO61)); + CPU_CTRL <= virtual() (unstable))); + _for_each_inner_peripheral!((#[cfg(not(use_xtal32k))] GPIO0)); + _for_each_inner_peripheral!((#[cfg(not(use_xtal32k))] GPIO1)); + _for_each_inner_peripheral!((GPIO2)); _for_each_inner_peripheral!((GPIO3)); + _for_each_inner_peripheral!((GPIO4)); _for_each_inner_peripheral!((GPIO5)); + _for_each_inner_peripheral!((GPIO6)); _for_each_inner_peripheral!((GPIO7)); + _for_each_inner_peripheral!((GPIO8)); _for_each_inner_peripheral!((GPIO9)); + _for_each_inner_peripheral!((GPIO10)); _for_each_inner_peripheral!((GPIO11)); + _for_each_inner_peripheral!((GPIO12)); _for_each_inner_peripheral!((GPIO13)); + _for_each_inner_peripheral!((GPIO14)); _for_each_inner_peripheral!((GPIO15)); + _for_each_inner_peripheral!((GPIO16)); _for_each_inner_peripheral!((GPIO17)); + _for_each_inner_peripheral!((GPIO18)); _for_each_inner_peripheral!((GPIO19)); + _for_each_inner_peripheral!((GPIO20)); _for_each_inner_peripheral!((GPIO21)); + _for_each_inner_peripheral!((GPIO22)); _for_each_inner_peripheral!((GPIO23)); + _for_each_inner_peripheral!((GPIO24)); _for_each_inner_peripheral!((GPIO25)); + _for_each_inner_peripheral!((GPIO26)); _for_each_inner_peripheral!((GPIO27)); + _for_each_inner_peripheral!((GPIO28)); _for_each_inner_peripheral!((GPIO30)); + _for_each_inner_peripheral!((GPIO31)); _for_each_inner_peripheral!((GPIO32)); + _for_each_inner_peripheral!((GPIO33)); _for_each_inner_peripheral!((GPIO34)); + _for_each_inner_peripheral!((GPIO35)); _for_each_inner_peripheral!((GPIO36)); + _for_each_inner_peripheral!((GPIO37)); _for_each_inner_peripheral!((GPIO38)); + _for_each_inner_peripheral!((GPIO39)); _for_each_inner_peripheral!((GPIO40)); + _for_each_inner_peripheral!((GPIO42)); _for_each_inner_peripheral!((GPIO43)); + _for_each_inner_peripheral!((GPIO44)); _for_each_inner_peripheral!((GPIO45)); + _for_each_inner_peripheral!((GPIO46)); _for_each_inner_peripheral!((GPIO47)); + _for_each_inner_peripheral!((GPIO48)); _for_each_inner_peripheral!((GPIO49)); + _for_each_inner_peripheral!((GPIO50)); _for_each_inner_peripheral!((GPIO51)); + _for_each_inner_peripheral!((GPIO52)); _for_each_inner_peripheral!((GPIO53)); + _for_each_inner_peripheral!((GPIO54)); _for_each_inner_peripheral!((GPIO55)); + _for_each_inner_peripheral!((GPIO56)); _for_each_inner_peripheral!((GPIO57)); + _for_each_inner_peripheral!((GPIO58)); _for_each_inner_peripheral!((GPIO59)); + _for_each_inner_peripheral!((GPIO60)); _for_each_inner_peripheral!((GPIO61)); _for_each_inner_peripheral!((DMA_AXI_CH0(unstable))); _for_each_inner_peripheral!((DMA_AXI_CH1(unstable))); _for_each_inner_peripheral!((DMA_AXI_CH2(unstable))); @@ -4272,16 +4273,17 @@ macro_rules! for_each_peripheral { virtual() (unstable)), (@ peri_type #[doc = "SW_INTERRUPT peripheral singleton"] SW_INTERRUPT <= virtual() (unstable)), (@ peri_type #[doc = "CPU_CTRL peripheral singleton"] CPU_CTRL <= virtual() (unstable)))); - _for_each_inner_peripheral!((singletons(GPIO0), (GPIO1), (GPIO2), (GPIO3), - (GPIO4), (GPIO5), (GPIO6), (GPIO7), (GPIO8), (GPIO9), (GPIO10), (GPIO11), - (GPIO12), (GPIO13), (GPIO14), (GPIO15), (GPIO16), (GPIO17), (GPIO18), (GPIO19), - (GPIO20), (GPIO21), (GPIO22), (GPIO23), (GPIO24), (GPIO25), (GPIO26), (GPIO27), - (GPIO28), (GPIO30), (GPIO31), (GPIO32), (GPIO33), (GPIO34), (GPIO35), (GPIO36), - (GPIO37), (GPIO38), (GPIO39), (GPIO40), (GPIO42), (GPIO43), (GPIO44), (GPIO45), - (GPIO46), (GPIO47), (GPIO48), (GPIO49), (GPIO50), (GPIO51), (GPIO52), (GPIO53), - (GPIO54), (GPIO55), (GPIO56), (GPIO57), (GPIO58), (GPIO59), (GPIO60), (GPIO61), - (DMA_AXI_CH0(unstable)), (DMA_AXI_CH1(unstable)), (DMA_AXI_CH2(unstable)), - (AES(unstable)), (ASSIST_DEBUG(unstable)), (CACHE(unstable)), (CLIC(unstable)), + _for_each_inner_peripheral!((singletons(#[cfg(not(use_xtal32k))] GPIO0), + (#[cfg(not(use_xtal32k))] GPIO1), (GPIO2), (GPIO3), (GPIO4), (GPIO5), (GPIO6), + (GPIO7), (GPIO8), (GPIO9), (GPIO10), (GPIO11), (GPIO12), (GPIO13), (GPIO14), + (GPIO15), (GPIO16), (GPIO17), (GPIO18), (GPIO19), (GPIO20), (GPIO21), (GPIO22), + (GPIO23), (GPIO24), (GPIO25), (GPIO26), (GPIO27), (GPIO28), (GPIO30), (GPIO31), + (GPIO32), (GPIO33), (GPIO34), (GPIO35), (GPIO36), (GPIO37), (GPIO38), (GPIO39), + (GPIO40), (GPIO42), (GPIO43), (GPIO44), (GPIO45), (GPIO46), (GPIO47), (GPIO48), + (GPIO49), (GPIO50), (GPIO51), (GPIO52), (GPIO53), (GPIO54), (GPIO55), (GPIO56), + (GPIO57), (GPIO58), (GPIO59), (GPIO60), (GPIO61), (DMA_AXI_CH0(unstable)), + (DMA_AXI_CH1(unstable)), (DMA_AXI_CH2(unstable)), (AES(unstable)), + (ASSIST_DEBUG(unstable)), (CACHE(unstable)), (CLIC(unstable)), (CNNT_SYS(unstable)), (ECC(unstable)), (EFUSE(unstable)), (GPIO(unstable)), (GPIO_SD(unstable)), (HP_APM(unstable)), (HP_MEM_APM(unstable)), (HP_SYS(unstable)), (HP_ALIVE_SYS(unstable)), (HP_SYS_CLKRST(unstable)), (I2C0), @@ -4547,7 +4549,9 @@ macro_rules! for_each_gpio { macro_rules! for_each_analog_function { ($($pattern:tt => $code:tt;)*) => { macro_rules! _for_each_inner_analog_function { $(($pattern) => $code;)* ($other : - tt) => {} } _for_each_inner_analog_function!((USJ_DM, GPIO33)); + tt) => {} } _for_each_inner_analog_function!((XTAL_32K_N, GPIO0)); + _for_each_inner_analog_function!((XTAL_32K_P, GPIO1)); + _for_each_inner_analog_function!((USJ_DM, GPIO33)); _for_each_inner_analog_function!((USJ_DP, GPIO34)); _for_each_inner_analog_function!((ADC1_CH0, GPIO42)); _for_each_inner_analog_function!((ADC1_CH1, GPIO43)); @@ -4581,11 +4585,12 @@ macro_rules! for_each_analog_function { _for_each_inner_analog_function!(((ADC2_CH5, ADCn_CHm, 2, 5), GPIO55)); _for_each_inner_analog_function!(((ADC2_CH6, ADCn_CHm, 2, 6), GPIO56)); _for_each_inner_analog_function!(((ADC2_CH7, ADCn_CHm, 2, 7), GPIO57)); - _for_each_inner_analog_function!((all(USJ_DM, GPIO33), (USJ_DP, GPIO34), - (ADC1_CH0, GPIO42), (ADC1_CH1, GPIO43), (ADC1_CH2, GPIO44), (ADC1_CH3, GPIO45), - (ADC1_CH4, GPIO46), (ADC1_CH5, GPIO47), (ADC1_CH6, GPIO48), (ADC1_CH7, GPIO49), - (ADC2_CH0, GPIO50), (ADC2_CH1, GPIO51), (ADC2_CH2, GPIO52), (ADC2_CH3, GPIO53), - (ADC2_CH4, GPIO54), (ADC2_CH5, GPIO55), (ADC2_CH6, GPIO56), (ADC2_CH7, GPIO57))); + _for_each_inner_analog_function!((all(XTAL_32K_N, GPIO0), (XTAL_32K_P, GPIO1), + (USJ_DM, GPIO33), (USJ_DP, GPIO34), (ADC1_CH0, GPIO42), (ADC1_CH1, GPIO43), + (ADC1_CH2, GPIO44), (ADC1_CH3, GPIO45), (ADC1_CH4, GPIO46), (ADC1_CH5, GPIO47), + (ADC1_CH6, GPIO48), (ADC1_CH7, GPIO49), (ADC2_CH0, GPIO50), (ADC2_CH1, GPIO51), + (ADC2_CH2, GPIO52), (ADC2_CH3, GPIO53), (ADC2_CH4, GPIO54), (ADC2_CH5, GPIO55), + (ADC2_CH6, GPIO56), (ADC2_CH7, GPIO57))); _for_each_inner_analog_function!((ADCn_CHm((ADC1_CH0, ADCn_CHm, 1, 0), GPIO42), ((ADC1_CH1, ADCn_CHm, 1, 1), GPIO43), ((ADC1_CH2, ADCn_CHm, 1, 2), GPIO44), ((ADC1_CH3, ADCn_CHm, 1, 3), GPIO45), ((ADC1_CH4, ADCn_CHm, 1, 4), GPIO46), diff --git a/esp-metadata/devices/esp32s31/gpio.toml b/esp-metadata/devices/esp32s31/gpio.toml index 0421d19f08a..57d0819ce98 100644 --- a/esp-metadata/devices/esp32s31/gpio.toml +++ b/esp-metadata/devices/esp32s31/gpio.toml @@ -7,8 +7,8 @@ constant_0_input = 0xc0 constant_1_input = 0x80 # GPIO29 and GPIO41 are not bonded. pins = [ - { pin = 0, lp = { 0 = "LP_GPIO0" } }, # analog = { 0 = "XTAL_32K_N" } }, - { pin = 1, lp = { 0 = "LP_GPIO1" } }, # analog = { 0 = "XTAL_32K_P" } }, + { pin = 0, analog = { 0 = "XTAL_32K_N" }, lp = { 0 = "LP_GPIO0" } }, + { pin = 1, analog = { 0 = "XTAL_32K_P" }, lp = { 0 = "LP_GPIO1" } }, { pin = 2, functions = { 3 = "LCD_DATA19" }, lp = { 0 = "LP_GPIO2" } }, { pin = 3, functions = { 3 = "LCD_DATA20" }, lp = { 0 = "LP_GPIO3" } }, { pin = 4, functions = { 3 = "LCD_DATA21" }, lp = { 0 = "LP_GPIO4" } }, diff --git a/esp-metadata/src/cfg/gpio.rs b/esp-metadata/src/cfg/gpio.rs index 7b224c434e7..20784b5de0b 100644 --- a/esp-metadata/src/cfg/gpio.rs +++ b/esp-metadata/src/cfg/gpio.rs @@ -17,7 +17,6 @@ use crate::{ }; /// Additional properties (besides those defined in cfg.rs) for [device.gpio]. -/// These don't get turned into symbols, but are used to generate code. #[derive(Debug, Default, Clone, serde::Deserialize, serde::Serialize)] #[serde(deny_unknown_fields)] pub(crate) struct GpioPinsAndSignals { @@ -31,7 +30,14 @@ pub(crate) struct GpioPinsAndSignals { pub output_signals: Vec, } -impl GenericProperty for GpioPinsAndSignals {} +impl GenericProperty for GpioPinsAndSignals { + fn cfgs(&self) -> Option> { + self.pins + .iter() + .any(|p| p.is_xtal32k()) + .then(|| vec!["soc_has_xtal32k_pads".to_string()]) + } +} /// Possible special cases that may affect pin availability or functionality. /// @@ -148,6 +154,13 @@ pub(crate) struct PinConfig { } impl PinConfig { + /// Returns `true` if this pin is wired to one of the 32 kHz crystal (XTAL32K) pads. + pub(crate) fn is_xtal32k(&self) -> bool { + (0..AnalogMap::COUNT) + .filter_map(|af| self.analog.get(af)) + .any(|signal| matches!(signal, "XTAL_32K_P" | "XTAL_32K_N")) + } + pub(crate) fn limitations(&self) -> Vec { let mut limitations = self.limitations.clone(); diff --git a/esp-metadata/src/lib.rs b/esp-metadata/src/lib.rs index e7af50809a6..bc6cc35e6a6 100644 --- a/esp-metadata/src/lib.rs +++ b/esp-metadata/src/lib.rs @@ -781,7 +781,16 @@ This pin may be available with certain limitations. Check your hardware to make #(#[doc = #docs])* #pin <= virtual () }; all_peripherals.push(quote! { @peri_type #tokens }); - singleton_peripherals.push(quote! { #pin }); + + // The pin type is always defined - drivers and the `for_each_gpio` family of + // macros refer to it unconditionally. Only the `Peripherals` field is hidden, so + // that an application cannot safely take a pin the crystal is driving. + let cfg = if gpio.is_xtal32k() { + quote! { #[cfg(not(use_xtal32k))] } + } else { + quote! {} + }; + singleton_peripherals.push(quote! { #cfg #pin }); } }