diff --git a/.gitmodules b/.gitmodules index 2888e69d7..af6af23eb 100644 --- a/.gitmodules +++ b/.gitmodules @@ -7,3 +7,9 @@ [submodule "piton/design/chipset/rv64_platform/bootrom/u-boot/uboot"] path = piton/design/chipset/rv64_platform/bootrom/u-boot/uboot url = git@github.com:u-boot/u-boot.git +[submodule "piton/design/chip/tile/blackparrot/black-parrot"] + path = piton/design/chip/tile/blackparrot/black-parrot + url = https://github.com/black-parrot/black-parrot.git +[submodule "piton/design/chip/tile/blackparrot/black-parrot-subsystems"] + path = piton/design/chip/tile/blackparrot/black-parrot-subsystems + url = https://github.com/black-parrot-hdk/black-parrot-subsystems diff --git a/README.md b/README.md index 4129ecd86..87e9855e8 100644 --- a/README.md +++ b/README.md @@ -505,3 +505,6 @@ The command will tell print the afi and agfi of your image. You can track the sy 8. After the synthesis is done - you can go load it in your F1 instance! +# Support for the BlackParrot RV64GC Core + +This version of OpenPiton supports the [64bit BlackParrot RISC-V processor](https://github.com/black-parrot/black-parrot) from University of Washington and Boston University. BlackParrot has been equipped with the P-MESH Cache Engine (PCE), which connects the BlackParrot Cache Engine Interface to the L1.5 cache provided by OpenPiton's P-Mesh. Instructions to run are identical to running with Ariane, except to use the -blackparrot flag instead. diff --git a/piton/blackparrot_settings.bash b/piton/blackparrot_settings.bash new file mode 100644 index 000000000..3eabee198 --- /dev/null +++ b/piton/blackparrot_settings.bash @@ -0,0 +1,12 @@ +export BLACKPARROT_ROOT=$DV_ROOT/design/chip/tile/blackparrot +export BLACKPARROT_RTL_DIR=$BLACKPARROT_ROOT/black-parrot +export BLACKPARROT_SUBSYSTEMS_DIR=$BLACKPARROT_ROOT/black-parrot-subsystems +export BP_COMMON_DIR=$BLACKPARROT_RTL_DIR/bp_common +export BP_TOP_DIR=$BLACKPARROT_RTL_DIR/bp_top +export BP_FE_DIR=$BLACKPARROT_RTL_DIR/bp_fe +export BP_BE_DIR=$BLACKPARROT_RTL_DIR/bp_be +export BP_ME_DIR=$BLACKPARROT_RTL_DIR/bp_me +export BP_EXTERNAL_DIR=$BLACKPARROT_RTL_DIR/external +export BASEJUMP_STL_DIR=$BP_EXTERNAL_DIR/basejump_stl +export HARDFLOAT_DIR=$BP_EXTERNAL_DIR/HardFloat + diff --git a/piton/design/chip/rtl/chip.v.pyv b/piton/design/chip/rtl/chip.v.pyv index 9f553283c..1be82a351 100644 --- a/piton/design/chip/rtl/chip.v.pyv +++ b/piton/design/chip/rtl/chip.v.pyv @@ -1137,6 +1137,8 @@ module chip( currenttype = "`PICORV32_TILE" elif (PITON_ARIANE): currenttype = "`ARIANE_RV64_TILE" + elif (PITON_BLACKPARROT): + currenttype = "`BLACKPARROT_RV64_TILE" else: currenttype = "`SPARC_TILE" diff --git a/piton/design/chip/tile/ariane b/piton/design/chip/tile/ariane index 4c01614f8..4d67f5998 160000 --- a/piton/design/chip/tile/ariane +++ b/piton/design/chip/tile/ariane @@ -1 +1 @@ -Subproject commit 4c01614f83cd9dd91d115aa190bd4fc6a284b59e +Subproject commit 4d67f59980a187bafce053fded1f65f5ce6b94b5 diff --git a/piton/design/chip/tile/blackparrot/Flist.blackparrot b/piton/design/chip/tile/blackparrot/Flist.blackparrot new file mode 100644 index 000000000..3234e26f7 --- /dev/null +++ b/piton/design/chip/tile/blackparrot/Flist.blackparrot @@ -0,0 +1,4 @@ +$BLACKPARROT_ROOT/rtl/bp_common_piton_pkg.sv ++incdir+$BLACKPARROT_SUBSYSTEMS_DIR/openpiton/v/ +$BLACKPARROT_SUBSYSTEMS_DIR/openpiton/v/bp_pce.sv +$BLACKPARROT_SUBSYSTEMS_DIR/openpiton/v/bp_piton_tile.sv diff --git a/piton/design/chip/tile/blackparrot/black-parrot b/piton/design/chip/tile/blackparrot/black-parrot new file mode 160000 index 000000000..08edfb479 --- /dev/null +++ b/piton/design/chip/tile/blackparrot/black-parrot @@ -0,0 +1 @@ +Subproject commit 08edfb479c7b5d55d665a63464785044c6b4cd35 diff --git a/piton/design/chip/tile/blackparrot/black-parrot-subsystems b/piton/design/chip/tile/blackparrot/black-parrot-subsystems new file mode 160000 index 000000000..b7616dd12 --- /dev/null +++ b/piton/design/chip/tile/blackparrot/black-parrot-subsystems @@ -0,0 +1 @@ +Subproject commit b7616dd1218be25733ca698c2e0fc6137824c987 diff --git a/piton/design/chip/tile/blackparrot/rtl/bp_common_piton_pkg.sv b/piton/design/chip/tile/blackparrot/rtl/bp_common_piton_pkg.sv new file mode 100644 index 000000000..1362d2b18 --- /dev/null +++ b/piton/design/chip/tile/blackparrot/rtl/bp_common_piton_pkg.sv @@ -0,0 +1,83 @@ +/* + * bp_common_test_pkg.sv + * + * This package contains extra testing configs which are not intended to be + * synthesized or used in production. However, they are useful for testing. + * This file can also be used as a template for 3rd parties wishing to + * synthesize extra configs without modifying the BP source directly. + * + */ + + `include "bp_common_defines.svh" + +package bp_common_pkg; + + `include "bp_common_accelerator_pkgdef.svh" + `include "bp_common_addr_pkgdef.svh" + //`include "bp_common_aviary_pkgdef.svh" + `include "bp_common_aviary_cfg_pkgdef.svh" + + // Default configuration is unicore + localparam bp_proc_param_s bp_unicore_cfg_p = bp_default_cfg_p; + + localparam bp_proc_param_s bp_unicore_parrotpiton_override_p = + '{cc_x_dim : 16 // Maximum number of BlackParrot cores, increase if more are needed + ,cc_y_dim : 1 + ,ic_y_dim : 0 + ,icache_features : (1 << e_cfg_enabled) | (1 << e_cfg_misaligned) | (1 << e_cfg_coherent) + ,icache_sets : 128 + ,icache_assoc : 4 + ,icache_block_width : 256 + ,icache_fill_width : 256 + ,dcache_features : (1 << e_cfg_enabled) | (1 << e_cfg_coherent) | (1 << e_cfg_hit_under_miss) + ,dcache_sets : 256 + ,dcache_assoc : 2 + ,dcache_block_width : 128 + ,dcache_fill_width : 128 + // Actually L1.5 features + ,l2_features : (1 << e_cfg_lr_sc) + | (1 << e_cfg_amo_swap) + | (1 << e_cfg_amo_fetch_logic) + | (1 << e_cfg_amo_fetch_arithmetic) + ,default : "inv" + }; + `bp_aviary_derive_cfg(bp_unicore_parrotpiton_cfg_p + ,bp_unicore_parrotpiton_override_p + ,bp_unicore_cfg_p + ); + + parameter bp_proc_param_s [max_cfgs-1:0] all_cfgs_gp = + { + // Various testing configs + bp_unicore_parrotpiton_cfg_p + ,bp_unicore_cfg_p + + // A custom BP configuration generated from Makefile + ,bp_custom_cfg_p + // The default BP + ,bp_default_cfg_p + }; + + // This enum MUST be kept up to date with the parameter array above + typedef enum bit [lg_max_cfgs-1:0] + { + e_bp_unicore_parrotpiton_cfg = 3 + ,e_bp_unicore_cfg = 2 + + // A custom BP configuration generated from `defines + ,e_bp_custom_cfg = 1 + // The default BP + ,e_bp_default_cfg = 0 + } bp_params_e; + + `include "bp_common_bedrock_pkgdef.svh" + `include "bp_common_cache_pkgdef.svh" + `include "bp_common_cache_engine_pkgdef.svh" + `include "bp_common_cfg_bus_pkgdef.svh" + `include "bp_common_clint_pkgdef.svh" + `include "bp_common_core_pkgdef.svh" + `include "bp_common_host_pkgdef.svh" + `include "bp_common_rv64_pkgdef.svh" + +endpackage + diff --git a/piton/design/chip/tile/blackparrot/rtl/bsg_popcount_patched.sv b/piton/design/chip/tile/blackparrot/rtl/bsg_popcount_patched.sv new file mode 100644 index 000000000..4569303c7 --- /dev/null +++ b/piton/design/chip/tile/blackparrot/rtl/bsg_popcount_patched.sv @@ -0,0 +1,79 @@ +`include "bsg_defines.sv" + +// MBT popcount +// +// 10-24-14 +// + +//module bsg_popcount #(parameter `BSG_INV_PARAM(width_p)) +module bsg_popcount #(parameter width_p=1) + (input [width_p-1:0] i + , output [$clog2(width_p+1)-1:0] o + ); + + // perf fixme: better to round up to nearest power of two and then + // recurse with side full and one side minimal + // + // e.g-> 80 -> 128/2 = 64 --> (64,16) + // + // possibly slightly better is to use 2^N-1: + // + // for items that are 5..7 bits wide, we make sure to + // split into a 4 and a 1/2/3; since the four is relatively optimized. + // + + localparam first_half_lp = `BSG_MAX(4,width_p - (width_p >> 1)); + localparam second_half_lp = width_p - first_half_lp; + + if (width_p <= 3) + begin : lt3 + assign o[0] = ^i; + + if (width_p == 2) + assign o[1] = & i; + else + if (width_p == 3) + assign o[1] = (&i[1:0]) | (&i[2:1]) | (i[0]&i[2]); + end + else + // http://www.wseas.us/e-library/conferences/2006hangzhou/papers/531-262.pdf + + if (width_p == 4) + begin : four + // half adders + wire [1:0] s0 = { ^i[3:2], ^i[1:0]}; + wire [1:0] c0 = { &i[3:2], &i[1:0]}; + + // low bit is xor of all bits + assign o[0] = ^s0; + + // middle bit is: ab ^ cd + // or (a^b) & (c^d) + + assign o[1] = (^c0) | (&s0); + + // high bit is and of all bits + + assign o[2] = &c0; + end + else + begin : recurse + wire [$clog2(first_half_lp+1)-1:0] lo; + wire [$clog2(second_half_lp+1)-1:0] hi; + + bsg_popcount #(.width_p(first_half_lp)) + left(.i(i[0+:first_half_lp]) + ,.o(lo) + ); + + bsg_popcount #(.width_p(second_half_lp)) + right(.i(i[first_half_lp+:second_half_lp]) + ,.o(hi) + ); + + assign o = lo+hi; + end + +endmodule // bsg_popcount + +`BSG_ABSTRACT_MODULE(bsg_popcount) diff --git a/piton/design/chip/tile/l2/rtl/l2_pipe1.v b/piton/design/chip/tile/l2/rtl/l2_pipe1.v index 531c6d040..67b0994bf 100644 --- a/piton/design/chip/tile/l2/rtl/l2_pipe1.v +++ b/piton/design/chip/tile/l2/rtl/l2_pipe1.v @@ -367,6 +367,7 @@ wire stall_smc_buf_S4; wire msg_from_mshr_S4; wire req_recycle_S4; wire inv_fwd_pending_S4; +wire msg_data_8B_amo_S4; wire msg_send_valid; wire msg_send_ready; @@ -695,6 +696,7 @@ l2_pipe1_ctrl ctrl( .msg_from_mshr_S4 (msg_from_mshr_S4), .req_recycle_S4 (req_recycle_S4), .inv_fwd_pending_S4 (inv_fwd_pending_S4), + .msg_data_8B_amo_S4 (msg_data_8B_amo_S4), .dir_sharer_S4 (dir_sharer_S4), .dir_sharer_counter_S4 (dir_sharer_counter_S4), .cas_cmp_en_S4 (cas_cmp_en_S4), @@ -862,6 +864,7 @@ l2_pipe1_dpath dpath( .msg_from_mshr_S4 (msg_from_mshr_S4), .req_recycle_S4 (req_recycle_S4), .inv_fwd_pending_S4 (inv_fwd_pending_S4), + .msg_data_8B_amo_S4 (msg_data_8B_amo_S4), .cas_cmp_en_S4 (cas_cmp_en_S4), .atomic_read_data_en_S4 (atomic_read_data_en_S4), .cas_cmp_data_size_S4 (cas_cmp_data_size_S4), diff --git a/piton/design/chip/tile/l2/rtl/l2_pipe1_ctrl.v.pyv b/piton/design/chip/tile/l2/rtl/l2_pipe1_ctrl.v.pyv index ca5c7adfb..01fe2664a 100644 --- a/piton/design/chip/tile/l2/rtl/l2_pipe1_ctrl.v.pyv +++ b/piton/design/chip/tile/l2/rtl/l2_pipe1_ctrl.v.pyv @@ -281,6 +281,7 @@ module l2_pipe1_ctrl( output reg msg_from_mshr_S4, output reg req_recycle_S4, output reg inv_fwd_pending_S4, + output reg msg_data_8B_amo_S4, output wire [`L2_OWNER_BITS-1:0] dir_sharer_S4, output reg [`L2_OWNER_BITS-1:0] dir_sharer_counter_S4, @@ -369,7 +370,9 @@ reg [`L2_ADDR_TYPE_WIDTH-1:0] addr_type_S1; reg [`L2_ADDR_OP_WIDTH-1:0] addr_op_S1; reg special_addr_type_S1; reg msg_data_rd_S1; +reg msg_amo_S1; reg msg_data_16B_amo_S1; +reg msg_data_8B_amo_S1; always @ * begin @@ -883,8 +886,24 @@ end always @ * begin - msg_data_16B_amo_S1 = valid_S1 && ((msg_type_trans_S1 == `MSG_TYPE_SWAP_P1_REQ) || (msg_type_trans_S1 == `MSG_TYPE_SWAP_P2_REQ) || (msg_type_trans_S1 == `MSG_TYPE_SWAPWB_P1_REQ) || (msg_type_trans_S1 == `MSG_TYPE_SWAPWB_P2_REQ)) && (data_size_S1 == `MSG_DATA_SIZE_16B); + msg_amo_S1 = valid_S1 + && (msg_type_trans_S1 == `MSG_TYPE_AMO_ADD_P1_REQ || msg_type_trans_S1 == `MSG_TYPE_AMO_ADD_P2_REQ + || msg_type_trans_S1 == `MSG_TYPE_AMO_AND_P1_REQ || msg_type_trans_S1 == `MSG_TYPE_AMO_AND_P2_REQ + || msg_type_trans_S1 == `MSG_TYPE_AMO_OR_P1_REQ || msg_type_trans_S1 == `MSG_TYPE_AMO_OR_P2_REQ + || msg_type_trans_S1 == `MSG_TYPE_AMO_XOR_P1_REQ || msg_type_trans_S1 == `MSG_TYPE_AMO_XOR_P2_REQ + || msg_type_trans_S1 == `MSG_TYPE_AMO_MAX_P1_REQ || msg_type_trans_S1 == `MSG_TYPE_AMO_MAX_P2_REQ + || msg_type_trans_S1 == `MSG_TYPE_AMO_MAXU_P1_REQ || msg_type_trans_S1 == `MSG_TYPE_AMO_MAXU_P2_REQ + || msg_type_trans_S1 == `MSG_TYPE_AMO_MIN_P1_REQ || msg_type_trans_S1 == `MSG_TYPE_AMO_MIN_P2_REQ + || msg_type_trans_S1 == `MSG_TYPE_AMO_MINU_P1_REQ || msg_type_trans_S1 == `MSG_TYPE_AMO_MINU_P2_REQ + || msg_type_trans_S1 == `MSG_TYPE_SWAP_P1_REQ || msg_type_trans_S1 == `MSG_TYPE_SWAP_P2_REQ + || msg_type_trans_S1 == `MSG_TYPE_SWAPWB_P1_REQ || msg_type_trans_S1 == `MSG_TYPE_SWAPWB_P2_REQ); +end + +always @ * +begin + msg_data_16B_amo_S1 = valid_S1 && msg_amo_S1 && (data_size_S1 == `MSG_DATA_SIZE_16B); //msg_data_16B_amo_masked_S1 = valid_S1 && ((msg_type_trans_S1 == `MSG_TYPE_SWAPWB_P1_REQ) || (msg_type_trans_S1 == `MSG_TYPE_SWAPWB_P2_REQ)) && (data_size_S1 == `MSG_DATA_SIZE_16B); + msg_data_8B_amo_S1 = valid_S1 && msg_amo_S1 && (data_size_S1 == `MSG_DATA_SIZE_8B); end always @ * @@ -1056,6 +1075,7 @@ reg mshr_smc_miss_S2_f; reg [`L2_MSHR_INDEX_WIDTH-1:0] mshr_pending_index_S2_f; reg special_addr_type_S2_f; reg msg_data_rd_S2_f; +reg msg_data_8B_amo_S2_f; always @ (posedge clk) begin @@ -1074,6 +1094,7 @@ begin special_addr_type_S2_f <= 0; msg_data_rd_S2_f <= 0; msg_data_16B_amo_S2_f <= 1'b0; + msg_data_8B_amo_S2_f <= 1'b0; amo_alu_op_S2_f <= `L2_AMO_ALU_OP_WIDTH'b0; end else if (!stall_S2) @@ -1095,6 +1116,7 @@ begin special_addr_type_S2_f <= special_addr_type_S1; msg_data_rd_S2_f <= msg_data_rd_S1; msg_data_16B_amo_S2_f <= msg_data_16B_amo_S1; + msg_data_8B_amo_S2_f <= msg_data_8B_amo_S1; amo_alu_op_S2_f <= amo_alu_op_S1; end end @@ -2443,6 +2465,7 @@ reg [`L2_MSHR_STATE_BITS-1:0] mshr_state_in_S3_f; reg [`L2_MSHR_INDEX_WIDTH-1:0] mshr_pending_index_S3_f; reg special_addr_type_S3_f; reg req_recycle_S3_f; +reg msg_data_8B_amo_S3_f; always @ (posedge clk) begin @@ -2466,6 +2489,7 @@ begin mshr_pending_index_S3_f <= 0; special_addr_type_S3_f <= 0; req_recycle_S3_f <= 0; + msg_data_8B_amo_S3_f <= 0; end else if (!stall_S3) begin @@ -2487,6 +2511,7 @@ begin mshr_pending_index_S3_f <= mshr_pending_index_S2_f; special_addr_type_S3_f <= special_addr_type_S2_f; req_recycle_S3_f <= req_recycle_S2; + msg_data_8B_amo_S3_f <= msg_data_8B_amo_S2_f; end end @@ -2624,6 +2649,7 @@ reg [`L2_MSHR_INDEX_WIDTH-1:0] mshr_pending_index_S4_f; reg special_addr_type_S4_f; reg [`L2_DIR_ARRAY_WIDTH-1:0] dir_data_S4_f; reg req_recycle_S4_f; +reg msg_data_8B_amo_S4_f; always @ (posedge clk) @@ -2649,6 +2675,7 @@ begin special_addr_type_S4_f <= 0; dir_data_S4_f <= 0; req_recycle_S4_f <= 0; + msg_data_8B_amo_S4_f <= 0; end else if (!stall_S4) begin @@ -2671,6 +2698,7 @@ begin special_addr_type_S4_f <= special_addr_type_S3_f; dir_data_S4_f <= dir_data_S3; req_recycle_S4_f <= req_recycle_S3; + msg_data_8B_amo_S4_f <= msg_data_8B_amo_S3_f; end end @@ -2722,6 +2750,7 @@ begin special_addr_type_S4 = special_addr_type_S4_f; dir_data_S4 = dir_data_S4_f; msg_from_mshr_S4 = msg_from_mshr_S4_f; + msg_data_8B_amo_S4 = msg_data_8B_amo_S4_f; end diff --git a/piton/design/chip/tile/l2/rtl/l2_pipe1_dpath.v.pyv b/piton/design/chip/tile/l2/rtl/l2_pipe1_dpath.v.pyv index eed51240c..d642a23d0 100644 --- a/piton/design/chip/tile/l2/rtl/l2_pipe1_dpath.v.pyv +++ b/piton/design/chip/tile/l2/rtl/l2_pipe1_dpath.v.pyv @@ -211,6 +211,7 @@ module l2_pipe1_dpath( input wire msg_from_mshr_S4, input wire req_recycle_S4, input wire inv_fwd_pending_S4, + input wire msg_data_8B_amo_S4, `ifndef NO_RTL_CSM //input from the broadcast counter @@ -2136,6 +2137,18 @@ begin msg_send_data_S4 = addr_S4[3] ? {2{data_data_ecc_S4[127:64]}} : {2{data_data_ecc_S4[63:0]}}; end `endif + else if (atomic_read_data_en_S4 == 1 && msg_data_8B_amo_S4 == 1) + begin + msg_send_data_S4 = addr_S4[3] ? {2{data_data_ecc_S4[127:64]}} : {2{data_data_ecc_S4[63:0]}}; + end + else if (atomic_read_data_en_S4 == 1 && msg_data_8B_amo_S4 == 0 && addr_S4[3] == 1) + begin + msg_send_data_S4 = !addr_S4[2] ? {4{data_data_ecc_S4[127:96]}} : {4{data_data_ecc_S4[95:64]}}; + end + else if (atomic_read_data_en_S4 == 1 && msg_data_8B_amo_S4 == 0 && addr_S4[3] == 0) + begin + msg_send_data_S4 = !addr_S4[2] ? {4{data_data_ecc_S4[63:32]}} : {4{data_data_ecc_S4[31:0]}}; + end else begin msg_send_data_S4 = data_data_ecc_S4; diff --git a/piton/design/chip/tile/rtl/tile.v.pyv b/piton/design/chip/tile/rtl/tile.v.pyv index 4c6048b01..5895ae2b2 100644 --- a/piton/design/chip/tile/rtl/tile.v.pyv +++ b/piton/design/chip/tile/rtl/tile.v.pyv @@ -819,6 +819,87 @@ if (TILE_TYPE == `SPARC_TILE) begin : g_sparc_core ); `endif // ifdef PITON_OST1 +end +endgenerate +generate +if (TILE_TYPE == `BLACKPARROT_RV64_TILE) begin : g_blackparrot_core + ////////////////////// + // BlackParrot Core // + ////////////////////// + + wire bp_transducer_l15_val; + reg got_header_ack; + + bp_piton_tile + proc + (.clk_i (clk_gated) + ,.reset_i (~rst_n_f) + ,.config_coreid_flat (flat_tileid) + ,.config_coreid_x (config_coreid_x) + ,.config_coreid_y (config_coreid_y) + + ,.timer_irq_i (timer_irq_i) + ,.software_irq_i (ipi_i) + ,.m_external_irq_i (irq_i[0]) + ,.s_external_irq_i (irq_i[1]) + + ,.transducer_l15_rqtype (transducer_l15_rqtype) + ,.transducer_l15_nc (transducer_l15_nc) + ,.transducer_l15_size (transducer_l15_size) + ,.transducer_l15_val (bp_transducer_l15_val) + ,.transducer_l15_address (transducer_l15_address) + ,.transducer_l15_data (transducer_l15_data) + ,.transducer_l15_l1rplway (transducer_l15_l1rplway) + ,.transducer_l15_threadid (transducer_l15_threadid) + ,.transducer_l15_amo_op (transducer_l15_amo_op) + ,.transducer_l15_prefetch (transducer_l15_prefetch) + ,.transducer_l15_invalidate_cacheline (transducer_l15_invalidate_cacheline) + ,.transducer_l15_blockstore (transducer_l15_blockstore) + ,.transducer_l15_blockinitstore (transducer_l15_blockinitstore) + ,.transducer_l15_data_next_entry (transducer_l15_data_next_entry) + ,.transducer_l15_csm_data (transducer_l15_csm_data) + ,.l15_transducer_ack (l15_transducer_ack) + + ,.l15_transducer_val (l15_transducer_val) + ,.l15_transducer_returntype (l15_transducer_returntype) + ,.l15_transducer_data_0 (l15_transducer_data_0) + ,.l15_transducer_data_1 (l15_transducer_data_1) + ,.l15_transducer_data_2 (l15_transducer_data_2) + ,.l15_transducer_data_3 (l15_transducer_data_3) + ,.l15_transducer_noncacheable (l15_transducer_noncacheable) + ,.l15_transducer_atomic (l15_transducer_atomic) + ,.l15_transducer_threadid (l15_transducer_threadid) + ,.l15_transducer_inval_address_15_4 (l15_transducer_inval_address_15_4) + ,.l15_transducer_inval_icache_inval (l15_transducer_inval_icache_inval) + ,.l15_transducer_inval_dcache_inval (l15_transducer_inval_dcache_inval) + ,.l15_transducer_inval_icache_all_way (l15_transducer_inval_icache_all_way) + ,.l15_transducer_inval_dcache_all_way (l15_transducer_inval_dcache_all_way) + ,.l15_transducer_inval_way (l15_transducer_inval_way) + ,.transducer_l15_req_ack (transducer_l15_req_ack) + ); + + // Reset the L1.5. This must be flopped 4 cycles after rst_n_f + reg reset_r, reset_rr, reset_rrr, reset_rrrr; + always @(posedge clk_gated) begin + reset_r <= rst_n_f; + reset_rr <= reset_r; + reset_rrr <= reset_rr; + reset_rrrr <= reset_rrr; + end + assign spc_grst_l = reset_rrrr; + + assign transducer_l15_val = bp_transducer_l15_val & ~got_header_ack; + + always @(posedge clk_gated) begin + if (~rst_n_f) + got_header_ack <= 1'b0; + // TODO: Confirm if this works in all cases + else if (l15_transducer_header_ack & ~l15_transducer_ack) + got_header_ack <= 1'b1; + else if (l15_transducer_ack) + got_header_ack <= 1'b0; + end + end endgenerate generate diff --git a/piton/design/chipset/include/chipset_define.vh b/piton/design/chipset/include/chipset_define.vh index 026d98494..d15abd0af 100644 --- a/piton/design/chipset/include/chipset_define.vh +++ b/piton/design/chipset/include/chipset_define.vh @@ -104,8 +104,10 @@ `define PITON_TEST_GOOD_END 40'h8100000000 `define PITON_TEST_BAD_END 40'h8200000000 -`ifndef PITON_ARIANE -`define OLED_STRING "OpenPiton rel 10Princeton Parallel Group" -`else +`ifdef PITON_ARIANE `define OLED_STRING "OpenPiton+ArianePrinceton & ETHZA Collaboration " +`elsif PITON_BLACKPARROT +`define OLED_STRING "OpenPiton+ BlackParrot Collaboration " +`else +`define OLED_STRING "OpenPiton rel 10Princeton Parallel Group" `endif diff --git a/piton/design/include/define.h.pyv b/piton/design/include/define.h.pyv index dd0a92420..dddbe2201 100644 --- a/piton/design/include/define.h.pyv +++ b/piton/design/include/define.h.pyv @@ -576,6 +576,7 @@ print("`define PITON_Y_TILES %d" % PITON_Y_TILES) `define SPARC_TILE 0 `define PICORV32_TILE 1 `define ARIANE_RV64_TILE 2 +`define BLACKPARROT_RV64_TILE 3 `endif diff --git a/piton/design/xilinx/design.tcl b/piton/design/xilinx/design.tcl index 61c944dd0..5d565ebef 100644 --- a/piton/design/xilinx/design.tcl +++ b/piton/design/xilinx/design.tcl @@ -30,13 +30,16 @@ set DESIGN_NAME "system" -set DESIGN_INCLUDE_DIRS "" +set DESIGN_INCLUDE_DIRS [concat \ + ${BLACKPARROT_INCLUDE_DIRS} \ +] set DESIGN_DEFAULT_VERILOG_MACROS "PITON_FULL_SYSTEM PITON_FPGA_NO_DMBR MERGE_L1_DCACHE FPGA_SYN_1THREAD FPGA_FORCE_SRAM_ICACHE_TAG FPGA_FORCE_SRAM_LSU_ICACHE FPGA_FORCE_SRAM_DCACHE_TAG FPGA_FORCE_SRAM_LSU_DCACHE FPGA_FORCE_SRAM_RF16X160 FPGA_FORCE_SRAM_RF32X80 CONFIG_DISABLE_BIST_CLEAR" set DESIGN_RTL_IMPL_FILES [concat \ ${SYSTEM_RTL_IMPL_FILES} \ ${CHIP_RTL_IMPL_FILES} \ + ${BLACKPARROT_RTL_IMPL_FILES} \ ${PASSTHRU_RTL_IMPL_FILES} \ ${CHIPSET_RTL_IMPL_FILES} \ ] diff --git a/piton/design/xilinx/genesys2/devices_blackparrot.xml b/piton/design/xilinx/genesys2/devices_blackparrot.xml new file mode 100644 index 000000000..7eeb3baee --- /dev/null +++ b/piton/design/xilinx/genesys2/devices_blackparrot.xml @@ -0,0 +1,77 @@ + + + + + chip + + + + mem + 0x80000000 + + 0x40000000 + + + iob + 0x9f00000000 + 0x10 + + + + sd + 0xf000000000 + + 0xff0300000 + + + uart + 0x0000c2c000 + + 0xd4000 + + + + + net + 0x0000d00000 + 0x100000 + + + + + ariane_bootrom + 0x0000010000 + 0x10000 + + + + + ariane_clint + 0x0000300000 + 0xc0000 + + + + + ariane_plic + 0x0000400000 + 0x4000000 + + + + + diff --git a/piton/tools/bin/pyhplib.py b/piton/tools/bin/pyhplib.py index 2cdffcaab..fc3e211ef 100644 --- a/piton/tools/bin/pyhplib.py +++ b/piton/tools/bin/pyhplib.py @@ -60,14 +60,15 @@ PITON_OST1 = int(os.environ.get('PITON_OST1', '0')) PITON_ARIANE = int(os.environ.get('PITON_ARIANE', '0')) +PITON_BLACKPARROT = int(os.environ.get('PITON_BLACKPARROT', '0')) PITON_PICO = int(os.environ.get('PITON_PICO', '0')) PITON_PICO_HET = int(os.environ.get('PITON_PICO_HET', '0')) PITON_RV64_PLATFORM = int(os.environ.get('PITON_RV64_PLATFORM', '0')) -if PITON_ARIANE or PITON_PICO: - NUM_THREADS = PITON_NUM_TILES -else: +if PITON_OST1: NUM_THREADS = 2 * PITON_NUM_TILES +else: + NUM_THREADS = PITON_NUM_TILES # cache configurations CONFIG_L15_SIZE = int(os.environ.get('CONFIG_L15_SIZE', '8192')) @@ -136,6 +137,10 @@ def __init__(self, d, w): if int(os.getenv("PITON_ARIANE")): fileName = "devices_ariane.xml" +if os.getenv("PITON_BLACKPARROT") is not None: + if int(os.getenv("PITON_BLACKPARROT")): + fileName = "devices_blackparrot.xml" + DEVICES_XML_FILENAME = os.path.join(os.getenv("PROTOSYN_RUNTIME_DESIGN_PATH", ""), os.getenv("PROTOSYN_RUNTIME_BOARD", ""), fileName) diff --git a/piton/tools/src/proto/common/blackparrot.tcl b/piton/tools/src/proto/common/blackparrot.tcl new file mode 100644 index 000000000..c13c47701 --- /dev/null +++ b/piton/tools/src/proto/common/blackparrot.tcl @@ -0,0 +1,131 @@ +proc vivado_parse_flist {flist_path} { + set f [exec echo [split [string trim [read [open $flist_path r]]] "\n"] | envsubst] + set flist [list ] + set dir_list [list ] + set def_list [list ] + foreach x $f { + if {![string match "" $x]} { + # If the item starts with +incdir+, directory files need to be added + if {[string match "#*" $x]} { + # get rid of comment line + } elseif {[string match "+incdir+*" $x]} { + set trimchars "+incdir+" + set temp [string trimleft $x $trimchars] + set expanded [subst $temp] + lappend dir_list $expanded + } elseif {[string match "+define+*" $x]} { + set trimchars "+define+" + set temp [string trimleft $x $trimchars] + set expanded [subst $temp] + lappend def_list $expanded + } else { + set expanded [subst $x] + lappend flist $expanded + } + } + } + + return [list $flist $dir_list $def_list] +} + +set ARIANE_ROOT $::env(ARIANE_ROOT) + +set BLACKPARROT_ROOT $::env(BLACKPARROT_ROOT) +set BLACKPARROT_RTL_DIR $::env(BLACKPARROT_RTL_DIR) +set BLACKPARROT_SUBSYSTEMS_DIR $::env(BLACKPARROT_SUBSYSTEMS_DIR) +set BP_COMMON_DIR $::env(BP_COMMON_DIR) +set BP_TOP_DIR $::env(BP_TOP_DIR) +set BP_FE_DIR $::env(BP_FE_DIR) +set BP_BE_DIR $::env(BP_BE_DIR) +set BP_ME_DIR $::env(BP_ME_DIR) +set BP_EXTERNAL_DIR $::env(BP_EXTERNAL_DIR) +set BASEJUMP_STL_DIR $::env(BASEJUMP_STL_DIR) +set HARDFLOAT_DIR $::env(HARDFLOAT_DIR) + +set rtl_files {} +set include_dirs {} + +set vlist [vivado_parse_flist $BP_TOP_DIR/syn/flist.vcs] +set vsources_list [lindex $vlist 0] +set vincludes_list [lindex $vlist 1] +set rtl_files [concat $rtl_files $vsources_list] +set include_dirs [concat $include_dirs $vincludes_list] + +set vlist [vivado_parse_flist $BLACKPARROT_ROOT/Flist.blackparrot] +set vsources_list [lindex $vlist 0] +set vincludes_list [lindex $vlist 1] +set rtl_files [concat $rtl_files $vsources_list] +set include_dirs [concat $include_dirs $vincludes_list] + +set file_obj [get_filesets sources_1] +foreach v $rtl_files { + # Skip configuration package + if {[string first bp_common_pkg $v] != -1} { + continue + + # Skip problematic modules + } elseif {[string first bsg_popcount $v] != -1} { + continue + + # Remove synth memories + } elseif {[string first bsg_mem_1r1w_sync_synth $v] != -1} { + continue + } elseif {[string first bsg_mem_1rw_sync_synth $v] != -1} { + continue + } elseif {[string first bsg_mem_1rw_sync_mask_write_bit_synth $v] != -1} { + continue + } elseif {[string first bsg_mem_1rw_sync_mask_write_byte_synth $v] != -1} { + continue + + # Hardened memories + } elseif {[string first bsg_mem_1r1w_sync $v] != -1} { + set f $BASEJUMP_STL_DIR/hard/ultrascale_plus/bsg_mem/bsg_mem_1r1w_sync.sv + } elseif {[string first bsg_mem_1rw_sync $v] != -1} { + set f $BASEJUMP_STL_DIR/hard/ultrascale_plus/bsg_mem/bsg_mem_1rw_sync.sv + } elseif {[string first bsg_mem_1rw_sync_mask_write_bit $v] != -1} { + set f $BASEJUMP_STL_DIR/hard/ultrascale_plus/bsg_mem/bsg_mem_1rw_sync_mask_write_bit.sv \ + } elseif {[string first bsg_mem_1rw_sync_mask_write_byte $v] != -1} { + set f $BASEJUMP_STL_DIR/hard/ultrascale_plus/bsg_mem/bsg_mem_1rw_sync_mask_write_byte.sv + + # Other modules + } elseif {[string first bsg_mul_add_unsigned $v] != -1} { + set f $BASEJUMP_STL_DIR/hard/ultrascale_plus/bsg_misc/bsg_mul_add_unsigned.sv + } elseif {[string first bsg_launch_sync_sync $v] != -1} { + set f $BASEJUMP_STL_DIR/hard/ultrascale_plus/bsg_async/bsg_launch_sync_sync.sv + } elseif {[string first bsg_mux $v] != -1} { + set f $BASEJUMP_STL_DIR/hard/ultrascale_plus/bsg_misc/bsg_mux.sv + } else { + set f $v + } + + lappend BLACKPARROT_RTL_IMPL_FILES $f +} +# Adding memories +lappend BLACKPARROT_RTL_IMPL_FILES $BASEJUMP_STL_DIR/hard/ultrascale_plus/bsg_mem/bsg_mem_1r1w_sync.sv +lappend BLACKPARROT_RTL_IMPL_FILES $BASEJUMP_STL_DIR/hard/ultrascale_plus/bsg_mem/bsg_mem_1rw_sync.sv +lappend BLACKPARROT_RTL_IMPL_FILES $BASEJUMP_STL_DIR/hard/ultrascale_plus/bsg_mem/bsg_mem_1rw_sync_mask_write_bit.sv +lappend BLACKPARROT_RTL_IMPL_FILES $BASEJUMP_STL_DIR/hard/ultrascale_plus/bsg_mem/bsg_mem_1rw_sync_mask_write_byte.sv +lappend BLACKPARROT_RTL_IMPL_FILES $BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1rw_sync_mask_write_bit_from_1r1w.sv + +# Patching +lappend BLACKPARROT_RTL_IMPL_FILES $BLACKPARROT_ROOT/rtl/bsg_popcount_patched.sv + +# Adding missing muxes +lappend BLACKPARROT_RTL_IMPL_FILES $BASEJUMP_STL_DIR/bsg_misc/bsg_mux_bitwise.sv +lappend BLACKPARROT_RTL_IMPL_FILES $BASEJUMP_STL_DIR/bsg_misc/bsg_mux_one_hot.sv +lappend BLACKPARROT_RTL_IMPL_FILES $BASEJUMP_STL_DIR/bsg_misc/bsg_mux_segmented.sv +add_files -quiet -norecurse -fileset $file_obj $BLACKPARROT_RTL_IMPL_FILES + +foreach i $include_dirs { + lappend BLACKPARROT_INCLUDE_DIRS $i +} +lappend BLACKPARROT_INCLUDE_DIRS $ARIANE_ROOT/src/common_cells/include +lappend BLACKPARROT_INCLUDE_DIRS $ARIANE_ROOT/corev_apu/register_interface/include + +puts "*************** RTL FILES ****************" +puts $BLACKPARROT_RTL_IMPL_FILES +puts "******************************************" +puts "*************** INCLUDE DIRS *************" +puts $BLACKPARROT_INCLUDE_DIRS +puts "******************************************" + diff --git a/piton/tools/src/proto/common/rtl_setup.tcl b/piton/tools/src/proto/common/rtl_setup.tcl index ae700b81d..6b825baff 100644 --- a/piton/tools/src/proto/common/rtl_setup.tcl +++ b/piton/tools/src/proto/common/rtl_setup.tcl @@ -740,7 +740,7 @@ set CHIPSET_INCLUDE_FILES [list \ "${DV_ROOT}/design/chipset/include/uart16550_define.vh" \ "${DV_ROOT}/design/chipset/include/chipset_define.vh" \ "${DV_ROOT}/design/chipset/noc_axi4_bridge/rtl/noc_axi4_bridge_define.vh" \ - "${DV_ROOT}/design/chip/tile/ariane/src/common_cells/include/common_cells/registers.svh" + "${DV_ROOT}/design/chip/tile/ariane/common/submodules/common_cells/include/common_cells/registers.svh" ] set CHIPSET_IP_FILE_PREFIXES [list \ diff --git a/piton/tools/src/proto/common/setup.tcl b/piton/tools/src/proto/common/setup.tcl index ffd26822b..546f14485 100644 --- a/piton/tools/src/proto/common/setup.tcl +++ b/piton/tools/src/proto/common/setup.tcl @@ -35,6 +35,13 @@ set BOARD_DIR "${DESIGN_DIR}/$BOARD" set VIVADO_VERSION [ string range [ version -short ] 0 3 ] source $DV_ROOT/tools/src/proto/common/rtl_setup.tcl + +set BLACKPARROT_RTL_IMPL_FILES {} +set BLACKPARROT_INCLUDE_DIRS {} +if {[info exists ::env(PITON_BLACKPARROT)]} { + source ${DV_ROOT}/tools/src/proto/common/blackparrot.tcl +} + source $DESIGN_DIR/design.tcl source $DV_ROOT/tools/src/proto/${BOARD}/board.tcl @@ -97,10 +104,17 @@ if {[info exists ::env(PITON_ARIANE)]} { append ALL_DEFAULT_VERILOG_MACROS " PITON_ARIANE PITON_RV64_PLATFORM PITON_RV64_DEBUGUNIT PITON_RV64_CLINT PITON_RV64_PLIC WT_DCACHE" } +if {[info exists ::env(PITON_BLACKPARROT)]} { + append ALL_DEFAULT_VERILOG_MACROS " PITON_BLACKPARROT PITON_RV64_PLATFORM PITON_RV64_CLINT PITON_RV64_PLIC" +} + for {set k 0} {$k < $::env(PITON_NUM_TILES)} {incr k} { if {[info exists "::env(RTL_ARIANE$k)"]} { append ALL_DEFAULT_VERILOG_MACROS " RTL_ARIANE$k" } + if {[info exists "::env(RTL_BLACKPARROT$k)"]} { + append ALL_DEFAULT_VERILOG_MACROS " RTL_BLACKPARROT$k" + } if {[info exists "::env(RTL_PICO$k)"]} { append ALL_DEFAULT_VERILOG_MACROS " RTL_PICO$k" } @@ -120,8 +134,8 @@ set ALL_RTL_IMPL_FILES [pyhp_preprocess ${ALL_RTL_IMPL_FILES}] set ALL_INCLUDE_FILES [pyhp_preprocess ${ALL_INCLUDE_FILES}] -if {[info exists ::env(PITON_ARIANE)]} { - puts "INFO: compiling DTS and bootroms for Ariane (MAX_HARTS=$::env(PITON_NUM_TILES), UART_FREQ=$env(CONFIG_SYS_FREQ))..." +if {[info exists ::env(PITON_RV64_PLATFORM)]} { + puts "INFO: compiling RV64 DTS and bootroms (MAX_HARTS=$::env(PITON_NUM_TILES), UART_FREQ=$env(CONFIG_SYS_FREQ))..." # credit goes to https://github.com/PrincetonUniversity/openpiton/issues/50 diff --git a/piton/tools/src/proto/protosyn,2.5 b/piton/tools/src/proto/protosyn,2.5 index 5818ca49c..16238f38d 100755 --- a/piton/tools/src/proto/protosyn,2.5 +++ b/piton/tools/src/proto/protosyn,2.5 @@ -74,6 +74,7 @@ def usage(): print(" pico (32bit RISCV core)", file=sys.stderr) print(" pico_het (heterogeneous pico+sparc arrangement)", file=sys.stderr) print(" ariane (64bit RISCV core)", file=sys.stderr) + print(" blackparrot (64bit RISCV core)", file=sys.stderr) print("\n --network_config ", file=sys.stderr) print(" Name of the network type to be used:", file=sys.stderr) print(" 2dmesh_config (default)", file=sys.stderr) @@ -493,7 +494,7 @@ def makeDefList(options): #defines.append(df) # disable CSM in this case - if options.core == 'ariane': + if options.core != 'sparc': defines.append("NO_RTL_CSM") if (options.board == "f1"): @@ -768,6 +769,14 @@ def main(): os.environ['RTL_ARIANE' + str(i)] = "1" print_info('setenv RTL_ARIANE' + str(i)) + elif options.core == 'blackparrot': + os.environ['PITON_BLACKPARROT'] = "1" + os.environ['PITON_RV64_PLATFORM'] = "1" + + for i in range(int(options.num_tiles)): + os.environ['RTL_BLACKPARROT' + str(i)] = "1" + print_info('setenv RTL_BLACKPARROT' + str(i)) + elif options.core == 'sparc': # this is the default os.environ['PITON_OST1'] = "1" @@ -852,6 +861,9 @@ def main(): if options.core == 'ariane': config += ' -ariane' + if options.core == 'blackparrot': + config += ' -blackparrot' + print_info("Synthesizing a test: %s" % options.test_name) print_info("Compilation started") ret_val = os.system('sims -sys=manycore' + config + ' -vcs_build -vcs_build_args=+libext+.v -vcs_build_args=-Mupdate > %s/compilation.log' % rc_dir.log) diff --git a/piton/tools/src/proto/vivado/gen_project.tcl b/piton/tools/src/proto/vivado/gen_project.tcl index 71183f47c..127c8753f 100644 --- a/piton/tools/src/proto/vivado/gen_project.tcl +++ b/piton/tools/src/proto/vivado/gen_project.tcl @@ -81,7 +81,13 @@ add_files -norecurse -fileset $fileset_obj $files_to_add foreach inc_file $ALL_INCLUDE_FILES { if {[file exists $inc_file]} { set file_obj [get_files -of_objects $fileset_obj [list "$inc_file"]] - set_property "file_type" "Verilog Header" $file_obj + if {[file extension $inc_file] == ".svh"} { + set_property "file_type" "SystemVerilog Header" $file_obj + } elseif {[info exists ::env(PITON_BLACKPARROT)]} { + set_property "file_type" "SystemVerilog Header" $file_obj + } else { + set_property "file_type" "Verilog Header" $file_obj + } set_property "is_enabled" "1" $file_obj set_property "is_global_include" "1" $file_obj set_property "library" "xil_defaultlib" $file_obj @@ -96,6 +102,8 @@ foreach impl_file $ALL_RTL_IMPL_FILES { set file_obj [get_files -of_objects $fileset_obj [list "$impl_file"]] if {[file extension $impl_file] == ".sv"} { set_property "file_type" "SystemVerilog" $file_obj + } elseif {[info exists ::env(PITON_BLACKPARROT)]} { + set_property "file_type" "SystemVerilog" $file_obj } else { set_property "file_type" "Verilog" $file_obj } diff --git a/piton/tools/src/sims/manycore.config b/piton/tools/src/sims/manycore.config index 2f6fc0c81..15a88b1f6 100644 --- a/piton/tools/src/sims/manycore.config +++ b/piton/tools/src/sims/manycore.config @@ -24,6 +24,23 @@ -model=manycore -toplevel=cmp_top +#ifdef FLIST_BLACKPARROT + -flist=$DV_ROOT/design/chip/tile/blackparrot/Flist.blackparrot + -flist=$DV_ROOT/design/chip/tile/blackparrot/black-parrot/bp_top/syn/flist.vcs + // Including Ariane Flist for the CLINT and PLIC + -flist=$DV_ROOT/design/chip/tile/ariane/Flist.ariane + -flist=$DV_ROOT/design/chipset/rv64_platform/Flist.rv64_platform + -vcs_build_args="-sverilog +systemverilogext+.sv -ntb_opts uvm-1.1 +vpi" + -vcs_build_args="-assert svaext" + -vcs_build_args=-timescale=1ps/1ps + -rv64 + -rv64_platform + -config_rtl=PITON_BLACKPARROT + -config_rtl=PITON_RV64_PLATFORM + -config_rtl=PITON_RV64_CLINT + -config_rtl=PITON_RV64_PLIC + -config_rtl=PITON_RV64_DEBUGUNIT +#endif -flist=$DV_ROOT/design/include/Flist.include -flist=$DV_ROOT/design/common/rtl/Flist.common -flist=$DV_ROOT/design/chipset/include/Flist.include diff --git a/piton/tools/src/sims/sims,2.0 b/piton/tools/src/sims/sims,2.0 index d2905648f..24f29b28b 100755 --- a/piton/tools/src/sims/sims,2.0 +++ b/piton/tools/src/sims/sims,2.0 @@ -173,6 +173,7 @@ Getopt::Long::Configure ('no_auto_abbrev') ; 'parallel' => 0, 'ost1' => 0, 'ariane' => 0, + 'blackparrot' => 0, 'pico' => 0, 'pico_het' => 0, 'post_process_cmd' => [], @@ -326,6 +327,7 @@ GetOptions (\%opt, 'parallel!', 'ost1!', 'ariane!', + 'blackparrot!', 'pico!', 'pico_het!', 'sparcv9!', @@ -345,17 +347,19 @@ GetOptions (\%opt, ) ; die ("DIE. -ariane and -pico/-pico_het cannot be set simultaneously") if ($opt{ariane} && ($opt{pico} || $opt{pico_het})) ; +die ("DIE. -blackparrot and -pico/-pico_het cannot be set simultaneously") if ($opt{blackparrot} && ($opt{pico} || $opt{pico_het})) ; die ("DIE. -pico and -pico_het cannot both be set") if ($opt{pico} && $opt{pico_het}) ; # Setting ost1 by default. This works better than default to 1 # for heterogeneous-ISA stuff -if (!$opt{pico} && !$opt{ariane}) { +if (!$opt{pico} && !$opt{ariane} && !$opt{blackparrot}) { $opt{ost1} = 1 ; } push (@{$opt{config_cpp_args}}, "-DFLIST_OST1") if ($opt{ost1} || $opt{pico_het}) ; push (@{$opt{config_cpp_args}}, "-DFLIST_PICO") if ($opt{pico} || $opt{pico_het}) ; push (@{$opt{config_cpp_args}}, "-DFLIST_ARIANE") if ($opt{ariane}) ; +push (@{$opt{config_cpp_args}}, "-DFLIST_BLACKPARROT") if ($opt{blackparrot}) ; push (@{$opt{config_cpp_args}}, "-DFLIST_ORAM") if ($opt{oram}) ; ################################################################################ @@ -1133,7 +1137,7 @@ sub gen_flist $line =~ s/^\s*(.*?)\s*$/$1/ ; $line .= "\n" ; - if (($line =~ /^\s*\/\//) or ($line =~ /^\s*$/)) { + if (($line =~ /^\s*\/\//) or ($line =~ /^\s*$/) or ($line =~ /^\s*#/)) { next ; } @@ -1265,6 +1269,11 @@ sub pre_build # Generate the flist file &gen_flist (); +if ($opt{blackparrot}) { + system("sed -i '/.*bp_common_piton_pkg.sv/d' flist"); + system("sed -i 's#.*bp_common_pkg.sv#$ENV{BLACKPARROT_ROOT}/rtl/bp_common_piton_pkg.sv#g' flist"); + } + system("cp -f flist $cur_dir"); if($opt{rv64_platform}) { @@ -1513,7 +1522,7 @@ sub generic_sim_build if ($opt{riv_build}) { $build_cmd = "vlib work; vlog " ; } - + if ($opt{vlt_build}) { $build_cmd = "verilator -cc " ; $build_cmd .= "-exe $dv_root/tools/verilator/my_top.cpp " ; @@ -2167,7 +2176,7 @@ sub assemble_diag die "DIE. could not clean up assembly diag run area" if ($?) ; # add default path to look for precompiled RISCV 64bit assembly tests diags - if ($opt{ariane} and $opt{precompiled}) { + if (($opt{blackparrot} or $opt{ariane}) and $opt{precompiled}) { push @{$opt{asm_diag_root}}, "$ENV{ARIANE_ROOT}/tmp/riscv-tests/build/isa"; push @{$opt{asm_diag_root}}, "$ENV{ARIANE_ROOT}/tmp/riscv-tests/build/benchmarks"; } @@ -2257,7 +2266,7 @@ sub assemble_diag if ($opt{rv64}) { # RISCV flow for RV64 if (!$opt{rv64_target_triple}) { - if ($opt{ariane}) { + if ($opt{ariane} or $opt{blackparrot}) { $ENV{RV64_TARGET_TRIPLE} = "riscv64-unknown-elf" ; } } else { @@ -2267,16 +2276,22 @@ sub assemble_diag if ($opt{ariane}) { $ENV{RV64_MARCH} = "rv64imafdc" ; } + if ($opt{blackparrot}) { + $ENV{RV64_MARCH} = "rv64imafdc" ; + } } else { $ENV{RV64_MARCH} = $opt{rv64_march} ; } if (!$opt{rv64_mabi}) { - if ($opt{ariane}) { + if ($opt{ariane} or $opt{blackparrot}) { $ENV{RV64_MABI} = "lp64d" ; } } else { $ENV{RV64_MABI} = $opt{rv64_mabi} ; } + if ($opt{blackparrot}) { + push (@{$opt{gcc_args}}, "-DPITON_NOC_IPI") + } # only recompile if necessary if (!$opt{precompiled}) { print "$prg: assembling 64bit riscv diag (RV64IMAC)\n" ; @@ -2726,6 +2741,7 @@ sub parse_args $ENV{PITON_PICO} = $opt{pico}; $ENV{PITON_PICO_HET} = $opt{pico_het}; $ENV{PITON_ARIANE} = $opt{ariane}; + $ENV{PITON_BLACKPARROT} = $opt{blackparrot}; $ENV{PITON_RV64_PLATFORM} = "1" if ($opt{rv64_platform}); push (@{$opt{config_rtl}}, "PITON_PICO_HET") if ($opt{pico_het}); @@ -2759,6 +2775,8 @@ sub parse_args push (@{$opt{config_rtl}}, "RTL_PICO" . $i); } elsif ($opt{ariane}) { push (@{$opt{config_rtl}}, "RTL_ARIANE" . $i); + } elsif ($opt{blackparrot}) { + push (@{$opt{config_rtl}}, "RTL_BLACKPARROT" . $i); } elsif ($opt{ost1}) { push (@{$opt{config_rtl}}, "RTL_SPARC" . $i); } @@ -3045,6 +3063,11 @@ VERILOG COMPILATION RELATED this specifies that the ARIANE RV64GC core shall be used in this case, programs are compiled and assembled using the RISCV GCC toolchain. + -blackparrot + this specifies that the BLACKPARROT RV64GC core shall be used + in this case, programs are compiled and assembled using the RISCV GCC toolchain. + + VERILOG RUNTIME RELATED -vcs_run/-novcs_run diff --git a/piton/tools/src/tursi/tursi,1.0 b/piton/tools/src/tursi/tursi,1.0 index 0a76e0a82..2192ceffd 100755 --- a/piton/tools/src/tursi/tursi,1.0 +++ b/piton/tools/src/tursi/tursi,1.0 @@ -479,6 +479,17 @@ def main(): args.config_rtl.append('RTL_ARIANE' + str(i)) print_info('defining RTL_ARIANE' + str(i)) + elif args.core == 'blackparrot': + args.config_rtl.append('PITON_BLACKPARROT') + + ## Temporary until we create a solution for SystemVerilog code + print_error('Due to lack of support for "pickling" of SystemVerilog code, the BlackParrot core configuration option is not supported') + sys.exit(1) + + for i in range(int(args.num_tiles)): + args.config_rtl.append('RTL_BLACKPARROT' + str(i)) + print_info('defining RTL_BLACKPARROT' + str(i)) + elif args.core == 'sparc': # this is the default args.config_rtl.append('PITON_OST1') diff --git a/piton/verif/diag/assembly/include/riscv/ariane/crt.S b/piton/verif/diag/assembly/include/riscv/ariane/crt.S index 5a128d499..dbf5d9a83 100644 --- a/piton/verif/diag/assembly/include/riscv/ariane/crt.S +++ b/piton/verif/diag/assembly/include/riscv/ariane/crt.S @@ -162,6 +162,20 @@ _start: sll sp, sp, STKSHIFT add sp, sp, tp +#ifdef PITON_NOC_IPI + li t1, 0 + li t2, PITON_NUMTILES + addi t2, t2, -1 + beq t2, t1, _init + li t4, 0x9800000800 + bne a0, t1, _init +loop: + addi t1, t1, 1 + slli t5, t1, 49 + sd t5, 0(t4) + bltu t1, t2, loop +#endif + j _init .align 2 diff --git a/piton/verif/diag/c/riscv/ariane/hello_world_token.c b/piton/verif/diag/c/riscv/ariane/hello_world_token.c new file mode 100644 index 000000000..0eaee7bfc --- /dev/null +++ b/piton/verif/diag/c/riscv/ariane/hello_world_token.c @@ -0,0 +1,73 @@ +// Copyright 2018 ETH Zurich and University of Bologna. +// Copyright and related rights are licensed under the Solderpad Hardware +// License, Version 0.51 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law +// or agreed to in writing, software, hardware and materials distributed under +// this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR +// CONDITIONS OF ANY KIND, either express or implied. See the License for the +// specific language governing permissions and limitations under the License. +// +// Author: Michael Schaffner , ETH Zurich, Fei Gao +// Date: 26.11.2018 +// Description: test the data sharing among massive amount of cores. +// + +#include +#include +#include "util.h" + +int main(int argc, char** argv) { + + // synchronization variable + // amo_cnt[i+1][0] is the token shared by core i and core i+1 + // the length 20 is to make sure that different tokens are stored in different cache lines. + // Support 128 cores at most + volatile static uint32_t amo_cnt[128][20] = {0}; + + amo_cnt[0][0] = 1; + + uint32_t id, core_num; + int i; + id = argv[0][0]; + core_num = argv[0][1]; + + // two cores try to edit the same variable + for (i=0;i<5;i++) + if (id == 0) + { + ATOMIC_OP(amo_cnt[id][8], 1, add, w); + ATOMIC_OP(amo_cnt[core_num-1][8], 1, add, w); + } + else + { + ATOMIC_OP(amo_cnt[id][8], 1, add, w); + ATOMIC_OP(amo_cnt[id-1][8], 1, add, w); + } + + ATOMIC_OP(amo_cnt[id][16], 1, add, w); + + // synchronize between it's neighbor + if (id < core_num-1) + { + while(amo_cnt[id+1][16] != 1); + } + else + { + while(amo_cnt[0][16] != 1); + } + + + // synchronize with other cores and wait until it is this core's turn + while(amo_cnt[id][0] != 1); + + // assemble number and print. Reduce print info length to save time + // "{id} 10" is expected + printf("%d %d\n", id, amo_cnt[id][8]); + + // increment atomic counter + ATOMIC_OP(amo_cnt[id+1][0], 1, add, w); + + return 0; +} + diff --git a/piton/verif/diag/master_diaglist_princeton b/piton/verif/diag/master_diaglist_princeton index 8f169030e..b2bd0ffbc 100644 --- a/piton/verif/diag/master_diaglist_princeton +++ b/piton/verif/diag/master_diaglist_princeton @@ -86,6 +86,304 @@ pico-amoxor amoxor_w.S + + + // note: these asm tests assume that the RISCV tests have been precompiled with the + // correct environment + + + blackparrot-rv64ui-p-add rv64ui-p-add.S + blackparrot-rv64ui-p-addi rv64ui-p-addi.S + blackparrot-rv64ui-p-slli rv64ui-p-slli.S + blackparrot-rv64ui-p-addiw rv64ui-p-addiw.S + blackparrot-rv64ui-p-addw rv64ui-p-addw.S + blackparrot-rv64ui-p-and rv64ui-p-and.S + blackparrot-rv64ui-p-auipc rv64ui-p-auipc.S + blackparrot-rv64ui-p-beq rv64ui-p-beq.S + blackparrot-rv64ui-p-bge rv64ui-p-bge.S + blackparrot-rv64ui-p-bgeu rv64ui-p-bgeu.S + blackparrot-rv64ui-p-andi rv64ui-p-andi.S + blackparrot-rv64ui-p-blt rv64ui-p-blt.S + blackparrot-rv64ui-p-bltu rv64ui-p-bltu.S + blackparrot-rv64ui-p-bne rv64ui-p-bne.S + // blackparrot-rv64ui-p-simple rv64ui-p-simple.S + blackparrot-rv64ui-p-jal rv64ui-p-jal.S + blackparrot-rv64ui-p-jalr rv64ui-p-jalr.S + blackparrot-rv64ui-p-or rv64ui-p-or.S + blackparrot-rv64ui-p-ori rv64ui-p-ori.S + blackparrot-rv64ui-p-sub rv64ui-p-sub.S + blackparrot-rv64ui-p-subw rv64ui-p-subw.S + blackparrot-rv64ui-p-xor rv64ui-p-xor.S + blackparrot-rv64ui-p-xori rv64ui-p-xori.S + blackparrot-rv64ui-p-slliw rv64ui-p-slliw.S + blackparrot-rv64ui-p-sll rv64ui-p-sll.S + blackparrot-rv64ui-p-sllw rv64ui-p-sllw.S + blackparrot-rv64ui-p-slt rv64ui-p-slt.S + blackparrot-rv64ui-p-slti rv64ui-p-slti.S + blackparrot-rv64ui-p-sltiu rv64ui-p-sltiu.S + blackparrot-rv64ui-p-sltu rv64ui-p-sltu.S + blackparrot-rv64ui-p-sra rv64ui-p-sra.S + blackparrot-rv64ui-p-srai rv64ui-p-srai.S + blackparrot-rv64ui-p-sraiw rv64ui-p-sraiw.S + blackparrot-rv64ui-p-sraw rv64ui-p-sraw.S + blackparrot-rv64ui-p-srl rv64ui-p-srl.S + blackparrot-rv64ui-p-srli rv64ui-p-srli.S + blackparrot-rv64ui-p-srliw rv64ui-p-srliw.S + blackparrot-rv64ui-p-srlw rv64ui-p-srlw.S + blackparrot-rv64ui-p-lb rv64ui-p-lb.S + blackparrot-rv64ui-p-lbu rv64ui-p-lbu.S + blackparrot-rv64ui-p-ld rv64ui-p-ld.S + blackparrot-rv64ui-p-lh rv64ui-p-lh.S + blackparrot-rv64ui-p-lhu rv64ui-p-lhu.S + blackparrot-rv64ui-p-lui rv64ui-p-lui.S + blackparrot-rv64ui-p-lw rv64ui-p-lw.S + blackparrot-rv64ui-p-lwu rv64ui-p-lwu.S + // blackparrot-rv64mi-p-csr rv64mi-p-csr.S + blackparrot-rv64mi-p-mcsr rv64mi-p-mcsr.S + blackparrot-rv64mi-p-illegal rv64mi-p-illegal.S + blackparrot-rv64mi-p-ma_addr rv64mi-p-ma_addr.S + blackparrot-rv64mi-p-ma_fetch rv64mi-p-ma_fetch.S + blackparrot-rv64mi-p-sbreak rv64mi-p-sbreak.S + // blackparrot-rv64mi-p-scall rv64mi-p-scall.S + // blackparrot-rv64si-p-csr rv64si-p-csr.S + blackparrot-rv64si-p-ma_fetch rv64si-p-ma_fetch.S + blackparrot-rv64si-p-scall rv64si-p-scall.S + // blackparrot-rv64si-p-wfi rv64si-p-wfi.S + blackparrot-rv64si-p-sbreak rv64si-p-sbreak.S + blackparrot-rv64si-p-dirty rv64si-p-dirty.S + blackparrot-rv64uc-p-rvc rv64uc-p-rvc.S + blackparrot-rv64um-p-mul rv64um-p-mul.S + blackparrot-rv64um-p-mulh rv64um-p-mulh.S + blackparrot-rv64um-p-mulhsu rv64um-p-mulhsu.S + blackparrot-rv64um-p-mulhu rv64um-p-mulhu.S + blackparrot-rv64um-p-div rv64um-p-div.S + blackparrot-rv64um-p-divu rv64um-p-divu.S + blackparrot-rv64um-p-rem rv64um-p-rem.S + blackparrot-rv64um-p-remu rv64um-p-remu.S + blackparrot-rv64um-p-mulw rv64um-p-mulw.S + blackparrot-rv64um-p-divw rv64um-p-divw.S + blackparrot-rv64um-p-divuw rv64um-p-divuw.S + blackparrot-rv64um-p-remw rv64um-p-remw.S + blackparrot-rv64um-p-remuw rv64um-p-remuw.S + + + + // note: these asm tests assume that the RISCV tests have been precompiled with the + // correct environment + + // note: we have to offset the trap here since the core operates in VM + + blackparrot-rv64ui-v-add rv64ui-v-add.S + blackparrot-rv64ui-v-addi rv64ui-v-addi.S + blackparrot-rv64ui-v-addiw rv64ui-v-addiw.S + blackparrot-rv64ui-v-addw rv64ui-v-addw.S + blackparrot-rv64ui-v-and rv64ui-v-and.S + blackparrot-rv64ui-v-auipc rv64ui-v-auipc.S + blackparrot-rv64ui-v-beq rv64ui-v-beq.S + blackparrot-rv64ui-v-bge rv64ui-v-bge.S + blackparrot-rv64ui-v-bgeu rv64ui-v-bgeu.S + blackparrot-rv64ui-v-andi rv64ui-v-andi.S + blackparrot-rv64ui-v-blt rv64ui-v-blt.S + blackparrot-rv64ui-v-bltu rv64ui-v-bltu.S + blackparrot-rv64ui-v-bne rv64ui-v-bne.S + // blackparrot-rv64ui-v-simple rv64ui-v-simple.S + blackparrot-rv64ui-v-jal rv64ui-v-jal.S + blackparrot-rv64ui-v-jalr rv64ui-v-jalr.S + blackparrot-rv64ui-v-or rv64ui-v-or.S + blackparrot-rv64ui-v-ori rv64ui-v-ori.S + blackparrot-rv64ui-v-sub rv64ui-v-sub.S + blackparrot-rv64ui-v-subw rv64ui-v-subw.S + blackparrot-rv64ui-v-xor rv64ui-v-xor.S + blackparrot-rv64ui-v-xori rv64ui-v-xori.S + blackparrot-rv64ui-v-sll rv64ui-v-sll.S + blackparrot-rv64ui-v-slli rv64ui-v-slli.S + blackparrot-rv64ui-v-slliw rv64ui-v-slliw.S + blackparrot-rv64ui-v-slt rv64ui-v-slt.S + blackparrot-rv64ui-v-slti rv64ui-v-slti.S + blackparrot-rv64ui-v-sltiu rv64ui-v-sltiu.S + blackparrot-rv64ui-v-sltu rv64ui-v-sltu.S + blackparrot-rv64ui-v-sra rv64ui-v-sra.S + blackparrot-rv64ui-v-srai rv64ui-v-srai.S + blackparrot-rv64ui-v-sraiw rv64ui-v-sraiw.S + blackparrot-rv64ui-v-sraw rv64ui-v-sraw.S + blackparrot-rv64ui-v-srl rv64ui-v-srl.S + blackparrot-rv64ui-v-srli rv64ui-v-srli.S + blackparrot-rv64ui-v-srliw rv64ui-v-srliw.S + blackparrot-rv64ui-v-srlw rv64ui-v-srlw.S + blackparrot-rv64ui-v-lb rv64ui-v-lb.S + blackparrot-rv64ui-v-lbu rv64ui-v-lbu.S + blackparrot-rv64ui-v-ld rv64ui-v-ld.S + blackparrot-rv64ui-v-lh rv64ui-v-lh.S + blackparrot-rv64ui-v-lhu rv64ui-v-lhu.S + blackparrot-rv64ui-v-lui rv64ui-v-lui.S + blackparrot-rv64um-v-mul rv64um-v-mul.S + blackparrot-rv64um-v-mulh rv64um-v-mulh.S + blackparrot-rv64um-v-mulhsu rv64um-v-mulhsu.S + blackparrot-rv64um-v-mulhu rv64um-v-mulhu.S + blackparrot-rv64um-v-div rv64um-v-div.S + blackparrot-rv64um-v-divu rv64um-v-divu.S + blackparrot-rv64um-v-rem rv64um-v-rem.S + blackparrot-rv64um-v-remu rv64um-v-remu.S + blackparrot-rv64um-v-mulw rv64um-v-mulw.S + blackparrot-rv64um-v-divw rv64um-v-divw.S + blackparrot-rv64um-v-divuw rv64um-v-divuw.S + blackparrot-rv64um-v-remw rv64um-v-remw.S + blackparrot-rv64um-v-remuw rv64um-v-remuw.S + + + + // note: these asm tests assume that the RISCV tests have been precompiled with the + // correct environment + + + blackparrot-rv64ua-p-amoadd_d rv64ua-p-amoadd_d.S + blackparrot-rv64ua-p-amoadd_w rv64ua-p-amoadd_w.S + blackparrot-rv64ua-p-amoor_d rv64ua-p-amoor_d.S + blackparrot-rv64ua-p-amoor_w rv64ua-p-amoor_w.S + blackparrot-rv64ua-p-amoand_d rv64ua-p-amoand_d.S + blackparrot-rv64ua-p-amoand_w rv64ua-p-amoand_w.S + blackparrot-rv64ua-p-amoswap_d rv64ua-p-amoswap_d.S + blackparrot-rv64ua-p-amoswap_w rv64ua-p-amoswap_w.S + blackparrot-rv64ua-p-amoxor_d rv64ua-p-amoxor_d.S + blackparrot-rv64ua-p-amoxor_w rv64ua-p-amoxor_w.S + blackparrot-rv64ua-p-amomax_d rv64ua-p-amomax_d.S + blackparrot-rv64ua-p-amomaxu_d rv64ua-p-amomaxu_d.S + blackparrot-rv64ua-p-amomaxu_w rv64ua-p-amomaxu_w.S + blackparrot-rv64ua-p-amomax_w rv64ua-p-amomax_w.S + blackparrot-rv64ua-p-amomin_d rv64ua-p-amomin_d.S + blackparrot-rv64ua-p-amomin_w rv64ua-p-amomin_w.S + blackparrot-rv64ua-p-amominu_d rv64ua-p-amominu_d.S + blackparrot-rv64ua-p-amominu_w rv64ua-p-amominu_w.S + blackparrot-rv64ua-p-lrsc rv64ua-p-lrsc.S + + + + // note: these asm tests assume that the RISCV tests have been precompiled with the + // correct environment + + // note: we have to offset the trap here since the core operates in VM + + blackparrot-rv64ua-v-amoadd_d rv64ua-v-amoadd_d.S + blackparrot-rv64ua-v-amoadd_w rv64ua-v-amoadd_w.S + blackparrot-rv64ua-v-amoor_d rv64ua-v-amoor_d.S + blackparrot-rv64ua-v-amoor_w rv64ua-v-amoor_w.S + blackparrot-rv64ua-v-amoand_d rv64ua-v-amoand_d.S + blackparrot-rv64ua-v-amoand_w rv64ua-v-amoand_w.S + blackparrot-rv64ua-v-amoswap_d rv64ua-v-amoswap_d.S + blackparrot-rv64ua-v-amoswap_w rv64ua-v-amoswap_w.S + blackparrot-rv64ua-v-amoxor_d rv64ua-v-amoxor_d.S + blackparrot-rv64ua-v-amoxor_w rv64ua-v-amoxor_w.S + blackparrot-rv64ua-v-amomax_d rv64ua-v-amomax_d.S + blackparrot-rv64ua-v-amomaxu_d rv64ua-v-amomaxu_d.S + blackparrot-rv64ua-v-amomaxu_w rv64ua-v-amomaxu_w.S + blackparrot-rv64ua-v-amomax_w rv64ua-v-amomax_w.S + blackparrot-rv64ua-v-amomin_d rv64ua-v-amomin_d.S + blackparrot-rv64ua-v-amomin_w rv64ua-v-amomin_w.S + blackparrot-rv64ua-v-amominu_d rv64ua-v-amominu_d.S + blackparrot-rv64ua-v-amominu_w rv64ua-v-amominu_w.S + blackparrot-rv64ua-v-lrsc rv64ua-v-lrsc.S + + + + // note: these asm tests assume that the RISCV tests have been precompiled with the + // correct environment + + + blackparrot-rv64uf-p-fadd rv64uf-p-fadd.S + blackparrot-rv64uf-p-fclass rv64uf-p-fclass.S + blackparrot-rv64uf-p-fcmp rv64uf-p-fcmp.S + blackparrot-rv64uf-p-fcvt rv64uf-p-fcvt.S + blackparrot-rv64uf-p-fcvt_w rv64uf-p-fcvt_w.S + blackparrot-rv64uf-p-fdiv rv64uf-p-fdiv.S + blackparrot-rv64uf-p-fmadd rv64uf-p-fmadd.S + blackparrot-rv64uf-p-fmin rv64uf-p-fmin.S + blackparrot-rv64uf-p-ldst rv64uf-p-ldst.S + blackparrot-rv64uf-p-move rv64uf-p-move.S + blackparrot-rv64uf-p-recoding rv64uf-p-recoding.S + blackparrot-rv64ud-p-fadd rv64ud-p-fadd.S + blackparrot-rv64ud-p-fclass rv64ud-p-fclass.S + blackparrot-rv64ud-p-fcmp rv64ud-p-fcmp.S + blackparrot-rv64ud-p-fcvt rv64ud-p-fcvt.S + blackparrot-rv64ud-p-fcvt_w rv64ud-p-fcvt_w.S + blackparrot-rv64ud-p-fdiv rv64ud-p-fdiv.S + blackparrot-rv64ud-p-fmadd rv64ud-p-fmadd.S + blackparrot-rv64ud-p-fmin rv64ud-p-fmin.S + blackparrot-rv64ud-p-ldst rv64ud-p-ldst.S + blackparrot-rv64ud-p-move rv64ud-p-move.S + blackparrot-rv64ud-p-recoding rv64ud-p-recoding.S + // blackparrot-rv64ud-p-structural rv64ud-p-structural.S + + + + // note: these asm tests assume that the RISCV tests have been precompiled with the + // correct environment + + // note: we have to offset the trap here since the core operates in VM + + blackparrot-rv64uf-v-fadd rv64uf-v-fadd.S + blackparrot-rv64uf-v-fclass rv64uf-v-fclass.S + blackparrot-rv64uf-v-fcmp rv64uf-v-fcmp.S + blackparrot-rv64uf-v-fcvt rv64uf-v-fcvt.S + blackparrot-rv64uf-v-fcvt_w rv64uf-v-fcvt_w.S + blackparrot-rv64uf-v-fdiv rv64uf-v-fdiv.S + blackparrot-rv64uf-v-fmadd rv64uf-v-fmadd.S + blackparrot-rv64uf-v-fmin rv64uf-v-fmin.S + blackparrot-rv64uf-v-ldst rv64uf-v-ldst.S + blackparrot-rv64uf-v-move rv64uf-v-move.S + blackparrot-rv64uf-v-recoding rv64uf-v-recoding.S + blackparrot-rv64ud-v-fadd rv64ud-v-fadd.S + blackparrot-rv64ud-v-fclass rv64ud-v-fclass.S + blackparrot-rv64ud-v-fcmp rv64ud-v-fcmp.S + blackparrot-rv64ud-v-fcvt rv64ud-v-fcvt.S + blackparrot-rv64ud-v-fcvt_w rv64ud-v-fcvt_w.S + blackparrot-rv64ud-v-fdiv rv64ud-v-fdiv.S + blackparrot-rv64ud-v-fmadd rv64ud-v-fmadd.S + blackparrot-rv64ud-v-fmin rv64ud-v-fmin.S + blackparrot-rv64ud-v-ldst rv64ud-v-ldst.S + blackparrot-rv64ud-v-move rv64ud-v-move.S + blackparrot-rv64ud-v-recoding rv64ud-v-recoding.S + // blackparrot-rv64ud-v-structural rv64ud-v-structural.S + + + + // note: these asm tests assume that the RISCV tests have been precompiled with the + // correct environment + + + blackparrot-dhrystone dhrystone.riscv + blackparrot-median median.riscv + blackparrot-multiply multiply.riscv + blackparrot-pmp pmp.riscv + blackparrot-qsort qsort.riscv + blackparrot-rsort rsort.riscv + blackparrot-towers towers.riscv + blackparrot-vvadd vvadd.riscv + + + + + + blackparrot-hello-world hello_world.c + blackparrot-accu accu_test.c + blackparrot-amo-align amo_align.c + + + + + + + + + + + blackparrot-hello-world-many hello_world_many.c + + + + + + + diff --git a/piton/verif/env/manycore/cross_module.h.pyv b/piton/verif/env/manycore/cross_module.h.pyv index a893b0956..13d72092b 100644 --- a/piton/verif/env/manycore/cross_module.h.pyv +++ b/piton/verif/env/manycore/cross_module.h.pyv @@ -102,6 +102,7 @@ for i in range(PITON_NUM_TILES): `define ARIANE_CORE%d `TILE%d.g_ariane_core.core.ariane.i_cva6 `define SPARC_CORE%d `TILE%d.g_sparc_core.core `define PICO_CORE%d `TILE%d.g_picorv32_core.core + `define BLACKPARROT_CORE%d `TILE%d.g_blackparrot_core.proc.core_minimal `define CCX_TRANSDUCER%d `TILE%d.g_sparc_core.ccx_l15_transducer `define PICO_TRANSDUCER%d `TILE%d.g_picorv32_core.pico_l15_transducer `define L15_TOP%d `TILE%d.l15.l15 diff --git a/piton/verif/env/manycore/devices_blackparrot.xml b/piton/verif/env/manycore/devices_blackparrot.xml new file mode 100644 index 000000000..fb770bbd4 --- /dev/null +++ b/piton/verif/env/manycore/devices_blackparrot.xml @@ -0,0 +1,61 @@ + + + + + chip + + + + mem + 0x80000000 + + 0x40000000 + + + iob + 0x9f00000000 + 0x10 + + + + uart + 0xfff0c2c000 + + 0x4000 + + + + + + ariane_bootrom + 0x0000010000 + 0x10000 + + + + + ariane_clint + 0x0000300000 + 0xc0000 + + + + ariane_plic + 0x0000400000 + 0x4000000 + + diff --git a/piton/verif/env/manycore/pc_cmp.v.pyv b/piton/verif/env/manycore/pc_cmp.v.pyv index 4ef433a51..b04173db9 100644 --- a/piton/verif/env/manycore/pc_cmp.v.pyv +++ b/piton/verif/env/manycore/pc_cmp.v.pyv @@ -233,6 +233,31 @@ endtask // get_thread_status end end `else // RTL_ARIANE0 + `ifdef RTL_BLACKPARROT0 + assign spc0_thread_id = 2'b00; + assign spc0_rtl_pc = spc0_phy_pc_w; + + always @(posedge clk) begin + if (~rst_l) begin + active_thread[(0*4)] <= 1'b0; + active_thread[(0*4)+1] <= 1'b0; + active_thread[(0*4)+2] <= 1'b0; + active_thread[(0*4)+3] <= 1'b0; + //spc0_inst_done <= 0; + //spc0_phy_pc_w <= 0; + end else begin + active_thread[(0*4)] <= 1'b1; + active_thread[(0*4)+1] <= 1'b1; + active_thread[(0*4)+2] <= 1'b1; + active_thread[(0*4)+3] <= 1'b1; + end + end + + always @(posedge clk) begin + spc0_inst_done <= `BLACKPARROT_CORE0.be.calculator.commit_pkt_cast_o.instret; + spc0_phy_pc_w <= 48'($signed(48'(`BLACKPARROT_CORE0.be.calculator.commit_pkt_cast_o.pc))); + end + `else `ifdef RTL_PICO0 assign spc0_thread_id = 2'b00; assign spc0_rtl_pc = spc0_phy_pc_w; @@ -253,11 +278,12 @@ endtask // get_thread_status spc0_phy_pc_w <= {{16{`PICO_CORE0.reg_pc[31]}}, `PICO_CORE0.reg_pc[31:0]}; end `endif // RTL_PICO0 + `endif // RTL_BLACKPARROT0 `endif // RTL_ARIANE0 `endif // RTL_SPARC0 ''' - pattern = ["SPARC0", "RTL_ARIANE0", "RTL_PICO0", "PATH0", "spc0", "sas_m0", "pcs0", "pcf0", "pcd0", "pce0", \ - "IFQDP0", "DTUPATH0", "PICO_CORE0", "ARIANE_CORE0", "active_thread[(0"]; + pattern = ["SPARC0", "RTL_BLACKPARROT0", "RTL_ARIANE0", "RTL_PICO0", "PATH0", "spc0", "sas_m0", "pcs0", "pcf0", "pcd0", "pce0", \ + "IFQDP0", "DTUPATH0", "PICO_CORE0", "ARIANE_CORE0", "BLACKPARROT_CORE0", "active_thread[(0"]; tt = ReplicatePattern(t, pattern); print(tt) %>